EEEN40197 Advanced Power Electronics

Lecture notes – AJF

2019

Contents
• Introduction to high-frequency power supplies
• Circuit averaging for converter dynamic analysis
• Two-transistor forward converter
• Principle of zero-voltage switching
• Phase-shift controlled, full-bridge DC-DC converter

1
EEEN40197.
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 High-Frequency Power Supplies
Aim
• To introduce the structure and applications of high-frequency power supplies, and to
provide a context for the material on transformer-coupled converters, soft-switching
and dynamic analysis techniques.

Introduction
High-frequency power supplies or switched-mode power supplies are widely used to derive
low-voltage DC supplies from the single-phase AC utility. The applications are widespread
and include electronic, computer and communication equipment, consumer electronics and
many industrial systems. Power levels range from a few watts to a few kilowatts. At the
higher power end of the range there has in recent years been significant growth in demand
from applications such as domestic electric vehicle charging (up to 7 kW) and power
supplies for large server farms. In the case of server farms, many 3 kW units are typically
connected in parallel to provide the large DC powers that are required.

System Structure
High-frequency power supplies operate by first rectifying the AC input to provide high-
voltage DC, which is then converted into high-frequency AC, typically at around 100 kHz,
and then passed through a physically small high-frequency transformer, before finally being
rectified and smoothed to form the output, Fig 1. The use of a high switching frequency is
important to minimize the size and cost of the transformer and L-C filter components, and
consequently there is a constant pressure to increase the frequency to higher levels. Some
low-power units can operate at up to 1 MHz. Furthermore, as frequencies are increased and
transformers shrink, new winding / manufacturing techniques become possible such as
planar transformers where the windings can be formed by tracks on the circuit board.

However, semiconductor switching losses usually limit the maximum frequency. Techniques
to reduce or eliminate switching losses such as zero-voltage switching are therefore of high
interest in these applications. In addition, new power semiconductor devices based on wide
band-gap materials are becoming available, which are capable of switching at higher
frequencies, and are anticipated to enable further frequency increases. Examples of these
are silicon carbide (SiC) and gallium nitride (GaN) devices.

The forward converter is one of the most commonly used transformer-coupled DC-DC
converters and is described later in the course.
Input DC-link HF transformer &
rectifier capacitor DC-DC converter

DC load
AC VDC connection

Output
Control feedback
Transistor system
gate signal
Fig 1. High-frequency power supply.

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The simplest circuit for the input rectifier is a single-phase diode bridge and smoothing
capacitor. However, this approach is unacceptable for all but the very lowest power levels
due to the high peak current, and the high harmonic content of the current drawn from the
grid, which results in a poor power factor. The input current to the rectifier consists of
narrow pulses at the peaks of the AC voltage waveform as shown in Fig 2. This is because
the diodes will only conduct when the grid voltage magnitude exceeds the voltage on the
smoothing capacitor. The rectifier input current could be improved by adding a filter at the
AC input, but the values of the filter inductor and capacitor would need to be large due to
the relatively low frequency of the harmonics that need to be removed. As a result the filter
would be physically large, heavy and expensive, so is not normally a viable option. Instead,
active high-power-factor rectifiers are commonly used and are discussed below.

isupply

AC vsupply VDC

Fig 2. Rectifier with capacitor filter.

vsupply

isupply

Fig 3. High-frequency power supply.

DC-Link Capacitor Size

The DC-link capacitor between the rectifier and the transformer-coupled DC-DC converter
plays a crucial role in reconciling the instantaneous mismatch between the AC and DC
powers. Assuming a sinusoidal, unity-power-factor, AC current of amplitude I supply and
supply voltage of amplitude V supply , the AC input power is:
𝑃𝑠𝑠𝑠𝑠𝑠𝑦 = 𝑉𝑠𝑠𝑠𝑠𝑠𝑠 cos(𝜔𝜔) 𝐼𝑠𝑠𝑠𝑠𝑠𝑠 cos(𝜔𝜔) = 𝑉𝑠𝑠𝑠𝑠𝑠𝑠 𝐼𝑠𝑠𝑠𝑠𝑠𝑠 cos2 (𝜔𝜔) (1)

ω is the angular frequency of the AC supply. Re-arrraning:

𝑉𝑠𝑠𝑠𝑠𝑠𝑠 𝐼𝑠𝑠𝑠𝑠𝑠𝑠
𝑃𝑠𝑠𝑠𝑠𝑠𝑠 = [1 + cos(2𝜔𝜔)]
2
= 𝑉𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟 𝐼𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟 [1 + cos(2𝜔𝜔)] (2)

The DC component of the instantaneous input power will be equal to the power drawn by
the DC-DC converter, whilst the time-varying component of the AC power must be absorbed
by the DC-link capacitor. Assuming the DC-link capacitor has a smooth DC voltage of V DC ,
the DC-link capacitor current is
𝑉𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟 𝐼𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟
𝑖𝑐 = cos(2𝜔𝜔) (3)
𝑉𝐷𝐷

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That is, the capacitor current is at twice the grid frequency, which would be 100 Hz for a
50 Hz supply system.

The capacitor voltage ripple amplitude, v DC-ripple , can be calculated as the current ripple
amplitude multiplied by the capacitor reactance:
𝑉𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟 𝐼𝑠𝑠𝑠𝑠𝑠𝑠−𝑟𝑟𝑟
𝑣𝐷𝐷−𝑟𝑟𝑟𝑟𝑟𝑟 = (4)
2𝜔𝜔𝜔𝐷𝐷

ω is the angular frequency of the AC supply.

The capacitor size would be chosen to limit the 100 Hz ripple voltage on the DC-link voltage.
Since the capacitor is providing low-frequency energy storage it will have a large
capacitance value and would usually be an electrolytic type.

Fig 1 also shows a closed-loop control system around the high-frequency DC-DC converter,
which would continuously adjust the duty-ratio of the switching transistors to maintain the
required output voltage.

Active High-Power-Factor Rectifier

These circuits have become the standard for single-phase rectifiers in power supplies. High-
frequency switching techniques and physically small passive components are used to
provide high-quality, near-sinusoidal, input currents.

A common example, based on the boost converter, is illustrated in Fig 3. A full-wave

rectified voltage waveform is presented as the input to the boost converter, which, through
the use of an input current feedback loop, is controlled to offer a constant input resistance,
that is, to draw an input current that follows the full-wave rectified voltage. As a result the
input power factor is almost unity. However, a small high-frequency filter may be required
at the input to provide a path for the high-frequency inductor ripple current. To ensure
proper operation, the boost converter output voltage must be maintained above the peak
of the AC input, which is achieved by sizing the output capacitor to accommodate the twice
mains frequency pulsation in power flow that occurs through the boost converter, and also
by modulating the amplitude of the boost converter input current to compensate for
changes in the power drawn from the power supply output.

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 Figure 3. High-power-factor rectifier.
Tutorial problems
1. Why are diode bridge rectifiers with smoothing capacitors rarely used in high-
frequency power supplies?
2. Draw a diagram of a single-phase, high-power-factor rectifier and briefly explain its
operation.
3. A single-phase, high-power-factor rectifier as shown in Fig 3 operates from a 230 V
rms, 50 Hz supply.
a. What is the minimum permissible DC-link voltage if the circuit is to shape a
high quality sinusoidal input current?
Ans: 325.3 V
b. If the DC-link voltage is maintained at 400 V and the maximum load power is
1 kW, determine the rms current rating for the DC-link capacitor.
Ans: 3.45 A
c. Assuming that the maximum permissible ripple voltage amplitude across the
DC-link capacitor is 5 V, calculate a capacitor value.
Ans: 1.6 mF

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 Circuit Averaging for Converter Dynamic Analysis

Aim
• To practice the use of switch averaging and linearization to develop small-signal
equivalent circuits for power electronic converters.
• To use circuit averaging to derive the main transfer functions for the buck and boost DC-
DC converters and to examine the characteristics of the transfer functions.

Introduction
In addition to the steady-state analysis and design of a power converter where we are
typically concerned with circuit waveforms, peak current and voltage levels, and losses a
second aspect of performance that is also crucial is: how does the converter behave under
changing or transient conditions? For example:
• How does the converter respond to change in control input (usually the transistor
duty-ratio)? This is important for control loop design / performance / stability.
• How does the converter output voltage respond to a change in load? Large output
voltage deviations could disrupt the operation of the load.
• How does the converter output respond to a disturbance in the supply voltage?

Calculating these aspects of converter performance is difficult due to the switching action of
the semiconductors, which regularly changes the circuit topology. A number of approaches
have been developed for overcoming this problem, many of them using averaging
techniques to represent the high-frequency switching of the semiconductors in a simpler
way, enabling standard linear circuit / systems analysis to be used to examine transient
behaviour. A common limitation of these methods, however, is that they are limited to
relatively low frequencies, up to a maximum of half the switching frequency, therefore, all
knowledge of the switching frequency detail (ripple currents and voltages) is lost.

The circuit averaging approach presented here is a relatively simple and intuitive method for
the transient analysis of power electronic converters and its application is considered to the
two main DC-DC topologies, the buck and boost converters.

Buck and Boost Converters

As a reminder of the circuit topologies, the diagrams are shown in Fig 1 along with sketched
waveforms for the inductor voltage and current for a steady-state operating cycle. The
circuits are assumed to be lossless. Under steady-state conditions the inductor current
returns at the end of the cycle to the same value it had at the start of the cycle. The
transistor duty ratio, D, is defined as the transistor on-time divided by the switching period,
T. V in is the source voltage, I is the inductor current and V is output voltage.

By equating the rise and fall of the inductor current in a switching cycle, the standard
expressions are obtained for the voltage conversion ratios of the converters:

Buck converter: Boost converter: (1)

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 Fig 1. Converter circuits and waveforms: buck (left) and boost (right).

Buck converter average switch network

To form the averaged circuit model of the buck converter, the transistor-diode switch
network and the associated switched voltage and current V s and I s are considered, Fig 2 (a)
and (b). The switch network is voltage fed and the current drawn from the network is a
continuous current due to the position of the filter inductor. The switching voltage is the
waveform that appears across the freewheel diode; it is the output voltage from the
switching network and is responsible for driving current into the L-C output filter. The
switched current is the current drawn through the transistor from the supply and is the
input to the switching network. Writing expressions for the local average values of the
switched voltage and current:

and (2)
where the bar over a variable denotes the local average value. Implicit in eq(2) is the
assumption that the ripple components of the variables are linear.

In general D, V in and I could all be changing, so to obtain linear expressions for the averaged
switched voltage and current (that is expressions which don’t contain any products of
changing variables), small changes in each variable are considered around the steady-state
operating point. For example the local-average inductor current is written as the sum of a
steady-state component and a small-signal AC component: . Then (2) becomes:

(3)

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 (4)

Multiplying out:

(5)

(6)

Neglecting the non-linear terms on the basis that products of small changes will be
negligibly small, the final expressions for the local average switched voltage and current are:

(7)

(8)

These expressions may be represented diagrammatically by the averaged-switch equivalent

circuit in Fig 2(c) where the coupled windings represent an ideal DC transformer with turns
ratio 1:D DC . Voltages and currents are reflected between the windings in the same way as
in a normal transformer, but DC waveforms are also reflected between the windings. The
ideal DC transformer has infinite magnetizing inductance and zero leakage inductance.

Fig 2. Buck converter: (a) switch network, (b) switched voltage and current, (C) linearized,
averaged equivalent circuit of switch.

To form the overall averaged circuit model of the converter, the switching network in the
original converter diagram is replaced by the averaged, linearized switched network, Fig 3.

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 Fig 3. Buck converter averaged equivalent circuit.

The current generator I zAC has been included in parallel with the load resistance as an
independent input to the circuit to provide an analytical way of imposing load current
changes on the converter. For the purposes of small-signal AC analysis, for example to
obtain transfer functions, the steady-state components can be removed from the equivalent
circuit resulting in Fig 4.

Fig 4. Buck converter small-signal averaged equivalent circuit.

The averaged equivalent circuits may be used in circuit simulators to provide more rapid
simulation times than would be obtained with a detailed switched model, or they may be
analysed mathematically using standard linear circuit / systems techniques.

Buck converter transfer functions

The small-signal averaged equivalent circuit in Fig 4 has three independent inputs,
• small changes in the source voltage ,
• small changes in the control input, that is the duty ratio , and
• small changes in the load current represented by .

Since the equivalent circuit is linear, the principle of superposition holds, which states that
the effects of each input may be considered separately with all the other inputs set to zero.
The individual effects of each input may then be added together to find the overall
conditions in the circuit. Therefore by working in the Laplace domain, transfer functions
may be derived from the equivalent circuit that link each of the inputs to the converter
output:
• the control to output

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 • the source to output or line feed through

• the load current to output voltage or output impedance

where s is the Laplace operator.

By setting any two of the individual independent inputs to zero, expressions may be
determined for each of the three transfer functions. For example, to find the control to
output transfer function, the source voltage disturbance and load current disturbance are
both set to zero resulting in a simplified circuit, Fig 5.

Fig 5. Buck converter equivalent circuit for control to output transfer function.

From the equivalent circuit: and (9)

where and (10)

Eliminating between the two equations in (9), then substituting for Z 1 and Z 2 and re-
arranging results in the control to output transfer function:

(11)

which is second order with a pair of complex poles with a low frequency magnitude of
and an undamped natural frequency . The low-frequency magnitude of the transfer
function will vary with steady-state input voltage. A frequency response asymptote plot is
shown in Figure 6, that is a plot of the log magnitude and angle of against log
frequency.

By a similar method the other two transfer functions may be obtained:

(12)

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 (13)

Fig 6. Buck converter asymptote frequency response plot of

Boost converter average switch network

Following the same method as that used for the buck converter, the switching network and
the switched voltage and current waveforms are shown in Fig 6. In this case the switch
network is current fed by the input inductor, whilst the output voltage of the switch
network is fixed by the output filter capacitor. This is a reversal of the conditions for the
buck converter switch and they are sometimes described as being circuit duals of each
other. The switched voltage, again denoted V s , is across the transistor and forms the input
voltage to the switch network, whilst the switched current, I s , is the output current from
the network. As before, local average expressions may be written down for the switched
voltage and current:

and (14)
Then writing each circuit variable as the sum of a steady-state term and a small-signal term:

(15)

(16)

Multiplying out and separating the terms:

(17)

(18)

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As before the non-linear terms (products of small changes) are ignored on the basis that
products of small changes are negligibly small:

(19)

(20)

Eq (19) and (20) may then be represented diagrammatically by the averaged switch
equivalent circuit, Fig 7 (c).

Fig 7. Boost converter: (a) switch network, (b) switched voltage and current, (C) linearized,
averaged equivalent circuit of switch.

As before, an ideal DC transformer is used which this time has the turns ratio 1:1/(1-D DC ).
By replacing the switched network in the original converter diagram by its averaged
equivalent circuit, the overall average circuit model for the boost converter is produced,
Fig 8.

Figure 8. Boost converter averaged equivalent circuit.

Finally, for the purposes of small signal transfer function analysis, the steady-state
components of the variables in Fig 8 may be removed leaving the small signal averaged
equivalent circuit of the converter, Fig 9.

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 Figure 9. Boost converter small signal averaged equivalent circuit.

Boost converter transfer functions

Following the same procedure as before, each of the three independent inputs may be set
to zero in turn, allowing the equivalent circuit to be analysed for the transfer function
between the non-zero input and the converter output voltage. For example, to obtain the
control-to-output transfer function, the source voltage disturbance and load current
disturbance are both set to zero, resulting in the simplified equivalent circuit, Fig 10.

Fig 10. Boost converter equivalent circuit for control-to-output transfer function.

Summing the voltages around the left-hand circuit loop:

(21)

Considering the currents in the right-hand circuit loop:

(22)

Eliminating between eq (21) and (22) and re-arranging:

(23)

Expressing in terms of the converter input voltage, eq (1),

also, expressing in terms of and , giving , then:

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 (24)

The control-to-output voltage transfer function of the boost converter is second order, the
asymptote frequency response plot is shown in Fig 11, but has a number of unusual
features:
• The undamped natural frequency, which is given by not only
depends on the inductor and capacitor values, but also on the steady-state duty
ratio. The poles of the transfer function will therefore move as the steady-state duty
ratio changes.
• Similarly, the low frequency magnitude of the transfer function also depends on
steady-state duty ratio and steady-state input voltage.
• The transfer function has a zero at . This is a right-half plane zero,
which will move with steady-state duty ratio and the value of the load resistance.
Zeros in the right-half of the complex plane are always problematic from the point
of view of control design and a right-half plane zero that moves around is a further
complication which makes the boost converter particularly difficult to control.

Fig 11. Boost converter asymptote frequency response plot of

Following a similar method the other two transfer functions for the converter may be
derived:

(25)

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 (26)

Incorporation of non-ideal effects such as circuit losses

One of the most important second-order effects in converter operation that has been
omitted from the analysis so far is the impact of circuit losses, for example conduction
voltage drops in the semiconductors and the series resistance of the inductors and
capacitors. These may be readily incorporated into the analysis, in the case of the
semiconductors the effects of conduction drops would need to be included in the switched
waveforms and averaged, resulting in a modified averaged switch equivalent circuit,
whereas for the passive components, parasitic resistances may be directly inserted in the
small signal equivalent circuit. The transfer functions including the second order effects
could then be derived.

Tutorial Problems
1. The transistor in a buck converter has an on-state resistance R on , develop the linearized,
averaged equivalent circuit for the switch network.
2. The transistor in a buck converter has an on-state resistance R on , by drawing the
averaged equivalent circuit for the converter, show that the control to output transfer
function may be expressed as:

3. A buck converter operates from a 100 V source with a duty-ratio of 0.4. The load
resistance is 4 Ω and the transistor on-state resistance is 0.1 Ω.
a. Using the averaged equivalent circuit, calculate the steady-state output voltage.
b. Calculate the low frequency magnitude of the control to output voltage transfer
function.
4. The output filter capacitor in a buck converter has an equivalent series resistance R ESR .
a. Draw the linearized, averaged equivalent circuit for the converter including R ESR .
b. Determine the control-to-output voltage transfer function for the buck
converter including the capacitor equivalent series resistance.
c. Sketch and annotate the magnitude and angle frequency response plot for the
control-to-output transfer function.
5. The transistor in a buck converter has an on-state resistance R on .
a. Draw the linearized, averaged equivalent circuit for the converter.
b. Derive the load current to output voltage transfer function for the converter.
c. Sketch and annotate the magnitude and angle frequency response plot for the
load current to output voltage transfer function.
d. If L=200 μH, D DC =0.7 and R on =0.2 Ω, determine the frequency range over which
the output impedance is resistive.
e. Using the parameter values in part d, and assuming that the load current has a
5 A amplitude, 100 Hz ripple component, determine the associated output
voltage ripple. The load resistance is R=2 Ω.

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Example Exam Question – Taken from EEEN60194, 2016
(NB this question has 33 marks since the exam had only three questions. This year the
EEN60197 exam will contain four questions each of 25 marks.)

(a) Briefly explain why averaging techniques are often used in the analysis of power
electronic converters.
[2 marks]
(b) Briefly explain why it may be necessary to linearise the averaged model of a power
electronic converter.
[2 marks]
(c) Briefly explain how the averaged model of a power converter may be linearised.
[2 marks]
(d) A small-signal model is to be derived for the boost DC-DC converter, Figure Q.1, using
the circuit averaging technique. The circuit components may all be assumed ideal with
the exception of the transistor, which has an on-state resistance R on .
(i) Identify the switch network in the converter. Draw sketches of the switch
network, and the switched voltage and current waveforms. Include the effects
of R on and annotate the waveforms.
(ii) Determine linearised expressions for the averaged switched voltage and current.
(iii) Represent the linearised expressions for the switched voltage and current by an
equivalent circuit and determine a small-signal equivalent circuit for the
complete converter.
(iv) Show that the small-signal transfer function relating load current changes to
output voltage changes of the boost converter, sometimes called the output
impedance, Z 0 , may be expressed as:
(sL + R onDDC ) /(LC)
Z0 =
 1 R onDDC  (1− DDC ) + DDCR on / R
2
s + s
2
+  +
 RC L LC
where s is the Laplace operator and L, C and R are the values of the converter
inductor, output filter capacitor and load resistor respectively and D DC is the
steady-state transistor duty-ratio.
[5, 5, 5, 6 marks]
(e) A boost converter operates with a duty-ratio of 0.75. The inductor value is 50 μH. The
load resistor value is 5 Ω and the transistor on-state resistance is 0.02 Ω. Determine
the frequency range over which the output impedance of the converter is resistive
and calculate a value for the resistance.
[6 marks]

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 Figure Q.1
Total [33 marks]

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 Two-Transistor Forward Converter
Aim
• To introduce a transformer-coupled DC-DC converter circuit that is widely used in high
frequency power supplies and to analyse the steady-state operation.
• To study the impact of transfer leakage inductance on the forward converter waveforms
and overall conversion characteristics.
• To extend circuit averaging analysis to the two-transistor forward converter including
the effects of transformer leakage inductance.

Introduction
Transformer coupled DC-DC converters are a key building block in many power supply
systems. The high operating frequency of the converter results in a physically small and
relatively inexpensive transformer, which are important considerations in almost all
applications. By appropriate choice of the transformer turns-ratio, the converters can
produce almost any voltage conversion ratio, step up or step down. Furthermore the use of
a transformer allows the converter to produce a galvanically isolated output, which means
that the output can be connected to a different earth / ground than the input.

A large number of transformer-coupled DC-DC converter circuits exist, many based on the
simple buck converter. These circuits all operate in a very similar way, but have their own
advantages and disadvantages. Buck-derived transformer-isolated converters are usually
known by the generic name of forward converter. The following sections focus on the two-
transistor version. First the basic waveforms and conversion ratio are considered, then the
impact of transformer leakage inductance is considered on the converter operation and
overall voltage conversion characteristics.

Circuit Operation
The circuit diagram and main waveforms are shown in Figure 1. The transistors operate in
synchronism with a duty-ratio D and period T and all components are assumed to be ideal,
but the transformer has a non-zero magnetizing current. The transformer turn-ratio is 1:N.
The waveforms show a steady-state switching cycle, the transistors being turned on at the
origin. The inductor current is assumed to be continuous with a small triangular ripple
component. The sketched waveforms show the primary voltage and current and the
secondary current.

When the transistors turn on the DC input voltage is applied to the primary winding. The
voltage is reflected across to the secondary winding multiplied by the turns ratio and acts to
forward bias the series diode and reverse bias the freewheel diode; the inductor voltage is
therefore given by (𝑁𝑁𝑖𝑖 − 𝑉𝑜 ), causing the familiar linear rise in the inductor current during
the transistor on time. The inductor current flows through the transformer secondary and is
reflected through the turns-ratio into the primary, transferring energy from the source. In
addition the transformer magnetising current rises linearly from zero, flowing in the primary
circuit and also drawing energy from the source. The magnetizing current is not seen in the
secondary winding and the energy that the current draws from the source is stored in the
transformer core.

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When the transistors turn off, the inductor current diverts to the freewheel diode, the
inductor voltage is equal to −𝑉𝑜 and the inductor current falls linearly, returning to the level
it had at the start of the cycle. The expression for the voltage conversion ratio is found by
equating the positive and negative inductor volt-seconds:
(𝑁𝑁𝑖𝑖 − 𝑉𝑜 )𝐷𝐷 = 𝑉𝑜 (1 − 𝐷)𝑇 → 𝑉𝑜 = 𝑁𝑁𝑉𝑖𝑖 (1)

The conversion ratio expression is very similar to that of the buck converter, but is
multiplied by the transformer turns-ratio.

Ip 1:N IL

DC
Vin Vp Vsec Vo

Isec

Isec

Fig 1. Two-transistor forward converter and steady-state waveforms.

Also, when the transistors turn off, the stored energy in the transformer core acts to
maintain the flow of magnetising current, the conduction path being through the two
diodes in the primary circuit and the DC source. As a result, the primary voltage reverses,
the magnetising current falls linearly, returning the stored magnetic energy to the DC
source. Since the reverse voltage applied to the primary is equal in magnitude to the
forward voltage, the current decays to zero in a time equal to the transistors’ on time.
Therefore, for the magnetising current to fall to zero before the start of the next cycle, the
transistor duty-ratio must be limited to a maximum of 0.5.

The limitation on the duty ratio results in a fairly poor utilisation of the transformer; power
flow can only occur through the transformer for up to 50% of the time, the transformer is
idle for the remainder of the time. The poor transformer utilization results in the

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transformer being physically larger than it would be if the power flow was continuous. This
is not a serious problem at lower powers, up to 1 kW, but above this level the penalty of a
large transformer becomes more severe. Therefore above 1 kW more complicated
converter circuits tend to be used, typically with four transistors, in which the transformer is
operated more effectively. That is a true bi-directional voltage waveform is impressed on
the primary allowing power to flow through the transformer for almost 100% of the cycle.
At these higher powers the cost of the additional transistors outweighs the reduction in
transformer size and cost.

For lower power applications, around 100 W, single-transistor versions of the circuit are
often used. These can be found in the text books, but are not discussed here.

Transformer Leakage Inductance and Rectifier Overlap

Leakage inductance is usually represented in the equivalent circuit for a transformer by
small additional inductors connected in series with the primary and / or secondary windings.
In the case of the forward converter this means that the secondary winding of the
transformer can be thought of as a voltage source of NV p with a series source inductance,
N2L k , where L k is the primary-referred leakage inductance of the transformer and N2L k is the
secondary referred value. The equivalent circuit for the secondary side of the forward
converter is shown in Fig 2. The leakage inductance would typically be much smaller than
the converter filter inductor.

The presence of transformer leakage inductance has a significant effect on the forward
converter waveforms and on the overall voltage conversion ratio. This is because the
leakage inductance prevents the instantaneous change in secondary current seen in the
ideal waveforms of Fig 1 at the transistor switching instants. The waveforms in Fig 3 show
the operation of the equivalent circuit.

The transistors switch on at the origin and initially the inductor current is circulating in the
freewheeling diode, current I r . When voltage V in is applied to the primary, the secondary-
referred voltage NV in will forward bias the series diode in the secondary, but the leakage
inductance prevents any instantaneous change in transformer current. Since the freewheel
diode is in conduction, the voltage NV in will be impressed across the leakage inductance
producing a linear increase in current. The rate of change of current will be NV in / (N2L k ).

As the current in the series diode rises there will be an equal and opposite fall in current in
the freewheel diode, since the output filter inductor current is virtually constant due to the
comparatively large value of the filter inductor. That is there is a gradual transfer of the
filter inductor current from the freewheel diode to the series diode. Once the freewheel
diode current has fallen to zero, the secondary current I sec is unable to continue rising
rapidly. The leakage inductance and filter inductor are then effectively in series, however
since the filter inductor value is much greater than the leakage inductance, the voltage
across the leakage inductance can be assumed to be zero. The freewheel diode is therefore
reverse biased by NV in as seen in the V r waveform.

EEEN40197. Two-Transistor Forward Converter 3

AJF 13-01-19
A similar transient occurs when the transitors turn off and the primary voltage reverses,
there is a gradual transfer of current from the transformer and series diode to the
freewheel diode. The rate of change of current is now –V in /(NL k ).

The gradual transfer of the output filter current between the two diodes in the secondary
circuit is known as rectifier overlap and occurs in all rectifier circuits in which there is
significant source inductance, including rectifiers operating from the a grid supply.
N2Lk
Isec IL
Ir
DC
NVp Vsec Vr Vo

Fig 2. Equivalent circuit for rectifier overlap transient.

NVp NVin
NVin

Isec IL

IL

Ir

Vr NVin
TOL
DT
T
Fig 3. Rectifier overlap waveforms.

The modified currents in the transformer secondary will be reflected back into the primary
through the turns-ratio resulting in the waveforms shown in Fig 4. The rise of current when
the transistors turn on is limited by the presence of the transformer leakage inductance,
and at turn off the linearly-falling leakage inductor current flows in the primary circuit
diodes along with the magnetizing current. The energy stored in the leakage inductance is
therefore returned to the input supply.

Apart from the gradual rise and fall of the transformer current at the transistor switching
instants, rectifier overlap also affects the voltage waveform that drives the current in the
filter inductor. Fig 3 shows that the point when the V r voltage rises from zero to NV in is
delayed by the overlap time T OL . The reduction in the pulse width of the V r waveform will
reduce the average converter output voltage as seen in the following analysis.

EEEN40197. Two-Transistor Forward Converter 4

AJF 13-01-19
 Vp Vin
Vin

NIL IM
Ip

Iin

TOL
DT
T

Fig 4. Modified primary waveforms with transformer leakage inductance.

Assuming that the ripple current in the filter inductor is small, the overlap time can be
calculated
𝐼𝐿(𝑎𝑎) 𝐼𝐿(𝑎𝑎) 𝑁𝐿𝑘
𝑇𝑂𝑂 = = (2)
𝑉𝑖𝑖 /(𝑁𝐿𝑘 ) 𝑉𝑖𝑖

where I L(av) is the average filter inductor current.

Assuming no average voltage across the filter inductor under steady-state conditions, then
the converter output voltage V o will be equal to the average value of the V r waveform:
𝑁𝑉𝑖𝑖 (𝐷𝐷 − 𝑇𝑂𝑂 ) 𝑁 2 𝐿𝑘
𝑉𝑜 = = 𝑁𝑉𝑖𝑖 𝐷 − 𝐼 (3)
𝑇 𝑇 𝐿(𝑎𝑎)

Eq(3) shows that the converter output voltage is reduced from the ideal value in eq(1) by an
amount that depends on the average filter inductor current, which is equal to the load
current. This means that the converter appears to have a non-zero output resistance of
value N2L k /T. Whilst this apparent output resistance represents a loss in converter output
voltage, it is important to note that there are no power losses associated with it.

Circuit Averaging of the Two-Transistor Forward Converter

Following the same method used for the buck converter, the switch network is identified for
the two-transistor forward converter, Fig 5. The switch network is voltage fed by the supply
voltage V in and the continuous inductor current I L is drawn from the network. As with the
buck converter, the switching voltage waveform V s is at the output of the network whilst
the switched current I s is the current drawn from the DC supply. The isolation transformer is
kept within the switch network. Waveforms for V s and I s are shown in Fig 5.

Similar to the buck converter, the local average values of V s and I s are:
𝑉�𝑠 = 𝐷𝐷𝑉�𝑖𝑖 and 𝐼𝑠̅ = 𝐷𝐷𝐼𝐿̅ (4)

As before the bar over a variable denotes the local average value.

EEEN40197. Two-Transistor Forward Converter 5

AJF 13-01-19
 The averaged expressions for the switched voltage and current may be linearized following
the same procedure as that used for the buck converter; all variables are assumed to
comprise a steady state component (subscript DC) plus a small signal component (subscript
AC). Multiplying out and neglecting products of small signal quantities, the linearized local
average voltage and current become:
𝑉�𝑠𝑠𝑠 + 𝑉�𝑠𝑠𝑠 = 𝐷𝐷𝐷 𝑁𝑉�𝑖𝑖𝑖𝑖 + 𝐷𝐴𝐴 𝑁𝑉�𝑖𝑖𝑖𝑖 + 𝐷𝐷𝐷 𝑁𝑉�𝑖𝑖𝑖𝑖 (5)

𝐼𝑠𝑠𝑠 ̅ = 𝐷𝐷𝐷 𝑁𝐼𝐿𝐿𝐿

̅ + 𝐼𝑠𝑠𝑠 ̅ + 𝐷𝐴𝐴 𝑁𝐼𝐿𝐿𝐿
̅ + 𝐷𝐷𝐷 𝑁𝐼𝐿𝐿𝐿
̅ (6)

Eq (5) and (6) may be represented by the averaged-switch equivalent circuit in Fig 6. The
equivalent circuit is almost identical in topology to that of the buck converter, but now
includes the turns-ratio of the isolation transformer.

By combining the equivalent circuit with the converter output filter, the averaged circuit
model is obtained for the two-transistor forward converter. The equivalent circuit model
may be used to obtain the converter transfer functions following the same method as that
used for the buck converter.
Is PWM Switch Network

Vs(t) NVin
Ip 1:N IL(t)

Vin(t)
Vp Vs
Is(t) NIL
Isec
DT
T

Fig 5. PWM switch network (left) and switched voltage and current (right) for the two-
transistor forward converter.

IsDC+IsAC 1:NDDC ILDC+ILAC

- +
VinDC+VinAC DACNILDC DACNVinDC VsDC+VsAC

Fig 6. Linearised averaged equivalent circuit of switch network.

Circuit Averaging of the Two-Transistor Forward Converter with Leakage Inductance

By following the same method, the V s and I s waveforms for the switch network in Fig 5
when transistor leakage inductance is included are shown in Fig 7. The local average values
of V s and I s become:
𝑇𝑂𝑂 𝑇𝑂𝑂 𝑇𝑂𝑂 𝑁𝐼𝐿̅ 𝐿𝑘
𝑉�𝑠 = �𝐷 − � 𝑁𝑉�𝑖𝑖 and 𝐼𝑠̅ = �𝐷 − � 𝑁𝐼𝐿̅ where = (7)
𝑇 𝑇 𝑇 𝑇𝑉�𝑖𝑖

therefore
𝑁 2 𝐼𝐿̅ 𝐿𝑘 𝑁 2 𝐼�𝐿2 𝐿𝑘
𝑉�𝑠 = 𝐷𝐷𝑉�𝑖𝑖 − and 𝐼𝑠̅ = 𝐷𝐷𝐼𝐿̅ − (8)
𝑇 𝑇𝑉�𝑖𝑖

EEEN40197. Two-Transistor Forward Converter 6

AJF 13-01-19
 Vs(t) NVin

Is(t) NIL

TOL
DT
T

Fig 7. Switched voltage and current for the two-transistor forward converter with
transformer leakage inductance.

Linearising the expressions for the local average switch voltage and current is a little more
complicated here as eq(8) contains a quotient of two variables. Therefore, a more formal
mathematical method is used to obtain the small-signal expressions, namely the complete
or total differential of a function.

Suppose a function f depends on variables x, y and z, then a linear expression for small
changes in f at a specific operating point may be calculated as:
𝜕𝜕 𝜕𝜕 𝜕𝜕
𝑓𝐴𝐴 = 𝑥𝐴𝐴 + 𝑦𝐴𝐴 + 𝑧𝐴𝐴 (9)
𝜕𝜕 𝜕𝜕 𝜕𝜕

Applying this to eq(8):

𝜕𝑉�𝑠 𝜕𝑉�𝑠 𝜕𝑉�𝑠
𝑉�𝑠𝑠𝑠 = 𝑉�𝑖𝑖𝑖𝑖 + 𝐷𝐴𝐴 ̅
+ 𝐼𝐿𝐿𝐿
𝜕𝑉�𝑖𝑖 𝜕𝜕 𝜕𝐼𝐿̅
𝑁 2 𝐿𝑘
= 𝑉�𝑖𝑖𝑖𝑖 [𝑁𝐷𝐷𝐷 ] + 𝐷𝐴𝐴 [𝑁𝑉�𝑖𝑖𝑖𝑖 ] − 𝐼𝐿𝐿𝐿
̅ � � (10)
𝑇

and
𝜕𝐼𝑠̅ 𝜕𝐼𝑠̅ 𝜕𝐼𝑠̅
̅ = 𝑉�𝑖𝑖𝑖𝑖
𝐼𝑠𝑠𝑠 + 𝐷𝐴𝐴 ̅
+ 𝐼𝐿𝐿𝐿
𝜕𝑉�𝑖𝑖 𝜕𝜕 𝜕𝐼𝐿̅

̅ 𝐿𝑘
2
𝑁 2 𝐼𝐿𝐿𝐿 ̅ 𝐿𝑘
2𝑁 2 𝐼𝐿𝐿𝐿
= 𝑉�𝑖𝑖𝑖𝑖 � � + 𝐷𝐴𝐴 [𝑁𝐼 ̅
𝐿𝐿𝐿 ] + 𝐼 ̅
𝐿𝐿𝐿 �𝑁𝐷𝐷𝐷 − � (11)
𝑇𝑉�𝑖𝑖𝑖𝑖
2
𝑇𝑉�𝑖𝑖𝑖𝑖

The small-signal equivalent circuit of the PWM switch network can then be drawn as shown
in Fig 8, where the parameters k 1 , k 2 , and R e are defined as:
̅ 𝐿𝑘
2𝑁 2 𝐼𝐿𝐿𝐿 𝑇𝑉�𝑖𝑖𝑖𝑖
2
𝑘1 = 𝑁𝐼𝐿𝐿𝐿̅ , 𝑘2 = − and 𝑅𝑒 = 2 2 (12)
𝑇𝑉�𝑖𝑖𝑖𝑖 ̅ 𝐿𝑘
𝑁 𝐼𝐿𝐿𝐿

EEEN40197. Two-Transistor Forward Converter 7

AJF 13-01-19
 IsAC 1:NDDC N2Lk/T ILAC
- +
VinAC Re DACNVinDC VsAC

DACk1
ILACk2
Fig 8. Linearised small-signal equivalent circuit of two-transistor forward converter with
leakage inductance.

Tutorial Problems
1. A two-transistor forward converter operates from a 300 V DC source. The transformer
turns ratio 1:N = 1:0.2, the primary-referred magnetizing inductance is 3.0 mH and the
transformer leakage inductance may be neglected. The filter inductor has a value of
50 μH and the switching frequency is 25 kHz. If the converter supplies a power of 1 kW
to a 24 V load, determine the transistor duty ratio and the peak transistor current.
Ans: D=0.4, peak current =19.42 A.
2. A two-transistor forward converter is to operate from a DC source that varies from 350
to 450 V. The converter is to maintain a constant output voltage of 12 V. Assume all
components are ideal and that transformer leakage inductance is negligible. Determine
a suitable turns-ratio for the transformer.
Ans: 0.0686
3. A two-transistor forward converter operates from a DC source of 400 V DC. The
transformer turns ratio 1:N = 1:0.27, the primary referred leakage inductance is 20 μH
and the switching frequency is 100 kHz. If the converter supplies a current of 25 A to a
48 V load, determine the transistor duty-ratio.
Ans: 0.478
4. If the converter in Q3 is connected to a 1.0 Ω load, determine the maximum possible
output voltage that can be achieved.
Ans: 47.13 V
5. A two-transistor forward converter is to supply a 2 kW, 24 V load. The supply voltage is
300 V, the switching frequency is 80 kHz, and the primary-referred transformer leakage
inductance is assumed to be 12 μH. Determine a transformer turns ratio.
Ans: 1:N = 1:0.189
6. A two-transistor forward converter has a transformer turns-ratio of 1:N. All components
may be assumed ideal, the transformer magnetizing inductance is infitiely large and the
transformer leakage inductance is negligible. Show that the small-signal transfer
function between duty-ratio and output voltage may be expressed as:
𝑉�𝐴𝐴 𝑁𝑉�𝑖𝑖𝑖𝑖 /(𝐿𝐿)
=
𝐷𝐴𝐴 𝑠 2 + 𝑠 � 1 � + 1
𝑅𝑅 𝐿𝐿
7. If a two-transistor forward converter has a transformer turns-ratio of 1:N and a primary-
referred transformer leakage inductance of L k , and all other components are assumed
ideal, show that the small-signal transfer function between duty-ratio and output
voltage may be expressed as:
𝑉�𝐴𝐴 𝑁𝑉�𝑖𝑖𝑖𝑖 /(𝐿𝐿)
=
𝐷𝐴𝐴 1 𝑁2𝐿 1 + 𝑁 2 𝐿𝑘 /(𝑅𝑅)
𝑠 2 + 𝑠 �𝑅𝑅 + 𝐿𝐿 𝑘 � + 𝐿𝐿

EEEN40197. Two-Transistor Forward Converter 8

AJF 13-01-19
 Principle of Zero-Voltage Switching
Aim

To introduce the concept of zero-voltage switching using lossless, regenerative capacitor

snubbers.

1.0 Introduction

Inductive switching waveforms occur in most power electronic converters, resulting in high
instantaneous power dissipation in the devices at the switching instants and very rapid rates
of change of voltage and current, which may create electromagnetic compatibility problems
with sensitive control circuitry or nearby equipment. The power dissipation in devices during
switching is one of the main limitations on the maximum operating frequency of power
electronic converters; increasing the frequency results in more switching transitions per unit
time and a higher average power dissipation in the devices. Zero-voltage switching, or soft-
switching offers a solution and the basic principle is introduced here by considering a bi-
directional boost converter. First, inductive switching waveforms are briefly reviewed.

2.0 Inductive Switching Waveforms

The equivalent circuit in Figure 1 represents the usual switching conditions in many DC-DC
converter and inverter circuits. An inductive current, represented by the constant current
element, is commutated to and from a freewheel diode path as the transistor turns on and off
respectively. Figure 1 also shows sketched waveforms of the transistor voltage and current at
the switching instants. The device current is assumed to rise and fall linearly with rise and fall
times t r and t f respectively. The rise and fall times are determined by the inherent
characteristics of the device itself and also the drive circuit parameters. The device voltage is
assumed to change instantaneously.

At turn on the transistor current rises to the full circuit value I 0 whilst the device continues to
support the off-state voltage VDC . This occurs since the transistor voltage cannot fall until the
freewheel diode is able to support a reverse voltage – and this requires the diode current to be
zero. The overlap of voltage and current results in an energy loss in the device:

VDC I 0t r
Turn on energy loss = (1)
2

A similar condition is seen to occur at the turn off instant. The device voltage rises to the off-
state level VDC before the current can fall – again this occurs since a conducting diode cannot
support a reverse voltage. The energy loss in the transistor is:

VDC I 0t f
Turn off energy loss = (2)
2

In addition to the energy loss in eq(1) and (2), an energy loss will also occur due to the
reverse recovery of the freewheel diode, causing the transistor current to rise transiently
above I 0 at the turn on instant. This effect may be reduced by the use of a fast recovery
1
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
diode, however diode switching losses remain a significant part of the overall losses,
especially in higher voltage applications.

Dissipative snubber circuits such as the RCD snubber that was examined in the EEEN60192
lab experiment may be connected around a power device to improve the switching
waveforms and to reduce the energy loss in the device, however energy is lost in the snubber
resistor, which limits the benefit of the circuit, especially if an increased switching frequency
is required. In the following section a snubber technique is described whereby the snubber
capacitors are charged and discharged in a lossless manner, allowing high operating
frequencies to be achieved efficiently.

3.0 Lossless Capacitor Snubbers

The RCD snubber allows the transistor losses to be reduced as required, but the overall losses
may still be significant, for example in very high power systems or where the switching
frequency is very high. To overcome the problem at high power the snubber resistor may be
replaced by a network which re-cycles the capacitor energy back to the supply or into the
load. These circuits are known as regenerative snubbers.

For a very high frequency operation power converter circuits are usually used which
inherently provide a lossless snubber operation. To illustrate this principle an example of a
step-up DC-DC converter is described below.

3.1 Boost Converter with Lossless Capacitor Snubbers

The circuit is shown in Figure 2 along with waveforms for the inductor current I L and the
voltage VT 2 . In addition to the usual boost converter transistor and diode, T2 + D1 the circuit
also has components T1 + D2, and snubber capacitors C1 + C2. If power MOSFETs were
used, D1 and D2 could be the body diodes of the devices and not separate components.
Furthermore, the output capacitances of the devices will form part of the snubber capacitors.

The transistors operate in anti-phase, the duty-ratio of T2 being D. The inductor is designed
to have a small value resulting in a very large ripple current. The overall inductor current,
which consists of the ripple current superimposed on the DC current component, is seen to
reverse for part of each cycle.

The reversal of the inductor current is possible due to the additional components T1 + D2.
Without these components the converter would operate in the discontinuous inductor current
mode. The conducting devices are marked on the corresponding sections of the circuit
waveforms, Figure 2.

By considering the conduction sequence of the devices it is seen that there are no transistor
turn-on losses. Immediately before each transistor conducts the respective anti-parallel diode
is in conduction, D1 before T1, D2 before T2. Each transistor may be signalled to turn on
whilst the respective anti-parallel diode is conducting, that is with zero voltage across the
device, however, the transistor will not start conducting until the inductor current reverses.
There is no overlap of transistor voltage and current, and therefore no turn on losses.

2
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
Furthermore, the diode switching conditions are very favourable:
• The current in each diode falls to zero gradually, limited by the rate of change of filter
inductor current.
• The parallel transistor conducts after each diode, therefore the diodes are not subjected to
a large reverse bias voltage immediately after they have conducted. The stored minority
carriers therefore have time to recombine naturally before the diode is reverse biased.
• There is no reverse recovery transient or reverse recovery loss.

The operation of the snubber capacitors is illustrated by the expanded waveforms in Figure 3
for the turn-off transient of T2. A small delay time or dead-time is shown on the waveforms
between the turn-off of T2 and the turn on of T1.

As T2 turns off the inductor current is diverted into the snubber capacitors, charging C2 and
discharging C1. The rate of rise of voltage across T2 is restrained, thereby controlling the
turn-off loss. When the voltage across T2 has risen to V0 , the inductor current transfers to D1.
Energy is captured in C2 during this transient, but energy is also recovered from C1 and
passed back into the conversion process; the energy in C1 having been captured earlier in the
cycle when T1 turned off. The snubber operation is therefore completely lossless, each
capacitor being charged then discharged in a lossless manner. However, to achieve this
operation the dead-time must be greater than the charging / discharging time of the snubbers.

To analyse the charging and discharging of the snubber capacitors when T2 turns off, C1 and
C2 are assumed equal to each other with a value C, therefore:

dVT 1 dV
VT 1 + VT 2 = V0 ⇒ = − T 2 and I C1 = − I C 2 (3)
dt dt

Summing the currents at the mid-point of the switching leg:

IL
I C 2 = I L + I C1 therefore, using (3), I C 2 = − I C1 = (4)
2

The duration of the snubber charging / discharging period tch arg e is:

V0 2CV0
tch arg e = = (5)
 dVT 2  IL
 dt 

To ensure lossess charging and discharging of the snubbers, the leg dead-time must be greater
than tch arg e , and to minimise the transistor turn off losses the snubber capacitors would be
chosen to make tch arg e >> t f .

A similar analysis may be undertaken for the T1 turn off transient, however, since the
magnitude of I L is much smaller, the charge / discharge time of the snubber capacitors will
be much longer, requiring a larger dead-time.

3
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
 Figure 1. Inductive switching waveforms.

4
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
 Figure 2. Boost converter with lossless capacitor snubbers.

5
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
 Figure 3. Expanded waveforms for T2 turn off transient.

6
EEEN40197 Principle of Zero-Voltage Switching
AJF 13-01-19
 Phase-Shift Controlled, Full-Bridge DC-DC Converter
Aims

To introduce the phase-shift controlled, full-bridge converter and to analyse the zero-voltage
switching waveforms.

1.0 Introduction

High frequency isolation transformers are often required in DC-DC converters – the
transformer gives the converter galvanic isolation between input and output, which is often
needed in power supplies that are fed through a rectifier from the utility supply. The
transformer also allows large voltage conversion ratios to be achieved by appropriate choice
of the transformer turns ratio. To reduce transformer size (and also the size of the filter
components) a high switching frequency is desirable, however, this can have the penalty of
high switching losses. Therefore circuits which have low loss, zero-voltage switching
characteristics are of high interest in high frequency power supply applications.

The phase-shift controlled, full-bridge converter is increasingly used in higher power DC-DC
converters (above 500 W) where efficient, high frequency operation is required, for example
battery charging, or telecoms and ISP systems. It encapsulates many of the features of
modern high-frequency converters and therefore forms a valuable case study.

2.0 Phase-Shift Controlled Full-Bridge Converter

The converter circuit is shown in Figure 1. The high frequency AC output voltage from the
full–bridge is passed through a high-frequency transformer, rectified and then smoothed by
the L-C filter to produce the DC output voltage. The inductor LS connected in series with the
transformer has a small value, very much less than the filter inductor value and would
typically comprise stray primary circuit inductance and transformer leakage inductance. LS is
shown explicitly in the circuit diagram since it plays a central role in the operation of the
converter. Snubber capacitors CA1, CA2, CB1 and CB2 are shown in parallel with each
device: the capacitors are important in achieving zero-voltage switching, however, in some
applications the device output capacitances may perform this function and separate
components would be unnecessary.

2.1 Modulation Strategy

The modulation strategy for the transistors in the full-bridge is summarised by the sketched
waveforms in Figure 2. In the left-hand leg of the full-bridge, denoted leg A, the devices are
operated in anti-phase with fixed duty-ratio of 0.5. In the right-hand leg, leg B, the devices
are operated in anti-phase with fixed duty-ratios of 0.5, however, the switching action in leg
B is delayed behind that in leg A by a variable time δT / 2 . T is the device switching period
and δ is the control variable, 0 ≤ δ ≤ 1 .

Also shown in Figure 2 are the resulting full-bridge voltage waveforms: VA 2 the voltage
across the lower device in leg A, VB 2 the voltage across the lower device in leg B and
VAB = VA 2 − VB 2 the full-bridge output voltage. VAB is a quasi-square waveform with the
positive and negative pulse-widths being equal to δT / 2 and, therefore, controllable. When
1
EEEN40197 Phase-Shift Controlled Full Bridge DC-DC Converter
AJF 13-01-19
δ = 0 , VAB is always zero, and with δ = 1 , VAB becomes a perfect squarewave. The
frequency of VAB is fixed and equal to the switching frequency of the devices.

An important feature of this switching strategy is that the full-bridge output voltage is defined
at all instants. A small asymmetry in the operation of the devices could, therefore, result in
the VAB waveform having a small average component, which may cause transformer
saturation. Measures must be taken to protect against this: using a DC blocking capacitor,
gapping the transformer core or a form of current-mode control.

2.2 Converter Waveforms

Figure 3 shows idealised circuit waveforms for the DC-DC converter of Figure 1. The full-
bridge output voltage VAB is shown as a quasi-square waveform, and the full-bridge output
current I AB is drawn assuming that the current in the filter inductor I L is continuous and has
a small ripple component.

When the full-bridge output voltage is either + Vin or − Vin the rectifier output voltage, VDD is
equal to NVin ; the transformer turns-ratio being 1:N. Assuming that the output voltage has a
negligibly small ripple, then a voltage NVin − V0 is impressed across the filter inductor
causing a linear increase in current. This current flows through the rectifier and transformer
secondary, and is reflected into the transformer primary multiplied by N. When VAB = +Vin ,
rectifier diodes D1 and D4 conduct and I AB is positive. When VAB = −Vin , rectifier diodes D2
and D3 conduct and I AB is negative.

Whilst the full-bridge output voltage is zero the rectifier output voltage VDD is also zero,
resulting in a reverse voltage of V0 across the output filter inductor. The filter inductor
current therefore falls linearly. This current continues to flow through the bridge rectifier and
transformer secondary, and is reflected into the primary multiplied by N. The presence of the
inductor LS in series with the transformer primary prevents any abrupt change in the primary
current and, therefore, any abrupt change in the full-bridge output current.

The alternate driving and freewheeling of the filter inductor is very similar to the operation of
the output filter in the buck converter. This circuit may therefore be regarded as a transformer
isolated version of the buck converter. It is usually preferred over the single or two transistor
forward converters at higher power levels since power is passed through the transformer
during both the positive and negative halves of the switching period which generally results
in a physically smaller transformer for a given power throughput.

2.3 Effects of Stray Inductance – Rectifier Overlap

The effects of the stray inductance on the waveforms are seen at the instants when the full-
bridge output voltage switches from zero to either + Vin or − Vin . The presence of LS prevents
the inverter output current I AB from reversing instantaneously – instead the current reversal
takes place over a finite period of time denoted TOL in Figure 3.

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The diagrams and waveforms shown in Figure 4 explain he detailed reversal of I AB . The four
diagrams show the sequence of conduction paths through the rectifier as I AB reverses. It is
assumed that during the transient the filter inductor current remains constant with a value
I LO .

Initially VAB = VDD = 0 and I AB = NI LO , D1 and D4 being in conduction, with D2 and D3

being turned off. When VAB switches to the value − Vin , the voltage acts to forward bias
diodes D2 and D3, however, the presence of LS and the filter inductor prevent any
instantaneous current changes. Since all four rectifier diodes are forward biased, the inverter
output voltage VAB (= −Vin ) remains impressed across LS in the direction which tends to
reduce I AB , the rate of change of I AB being − Vin / LS . As I AB falls, the current in diodes D1
and D4 also falls. However, since I D1 + I D 2 = I D 3 + I D 4 = I LO , then:

dI D1 dI dI dI
= − D 2 and D 4 = − D 3 (1)
dt dt dt dt

The fall in I D1 and I D 4 is matched by an equal increase in I D 2 and I D 3 . The current paths are
shown in the second diagram of Figure 4.

When the current I AB falls to zero there is an equal current in all of the rectifier diodes, the
current level being I LO / 2 . The inverter output voltage VAB (= −Vin ) remains impressed across
LS , and causes I AB to increase in the negative direction, I D 2 and I D 3 continue to increase
and are now greater than I D1 and I D 4 , the current paths are shown in the third diagram of
Figure 4.

When the current in diodes D1 and D4 reaches zero and the current in diodes D2 and D3 is
equal to the filter inductor current I LO , any further increase in I D 2 and I D 3 is impossible. As
the currents I D1 and I D 4 are now equal to zero, the diodes D1 and D4 may be reverse biased.
The rectifier output voltage VDD therefore changes from zero to N VAB = NVin , the current
conduction path being shown in the final diagram of Figure 4.

Therefore, the inductance LS results in a controlled reversal of I AB , the rate of change of I AB

being Vin / LS . Whilst I AB is reversing there is a gradual transfer of current from one pair of
rectifier diodes to the other. All four rectifier diodes are in conduction during this current
reversal and the phenomenon is therefore known as overlap. This effect occurs in all rectifier
circuits which are supplied by a source with finite source inductance.

The duration of overlap period, TOL , that is the time taken for I AB to reverse may be written
down since dI AB / dt and the total current change are both known.

2 NI LO LS
TOL = (2)
Vin

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An important effect of overlap is to result in the DC output voltage becoming load-current
sensitive. From Figure 3 an expression for the DC output voltage may be written down by
inspection of the VDD waveform. There is no average or DC component of voltage across the
filter inductor, therefore the average output voltage is equal to the average of VDD .

2  δT 
V0 =  − TOL  NVin (3)
T 2 

Substituting for TOL from eq(2):

4 N 2 I LO LS
V0 = δNVin − (4)
T

and assuming that the ripple current in the filter inductor is small then I LO ≈ I 0 , the load
current, and eq(4) becomes:

4 N 2 I 0 LS
V0 = δNVin − (5)
T

Eq(5) gives the voltage conversion characteristic of the converter and shows that the output
voltage has a ‘no load’ value of δNVin but the output voltage falls with increasing load
current. The effective output resistance of the converter is 4 N 2 LS / T , however, there is no
power loss in the converter due to this effect.

The physical explanation for the drop in output voltage as load current is increased is that at
higher current levels the overlap time TOL is longer, resulting in a larger volt-second loss
from the VDD waveform.

The drop in output voltage with load current is an undesirable effect for two reasons:
• an increased transformer turns-ratio is required to allow a given output voltage to be
achieved. This in turn results in a higher primary current and higher current in the full-
bridge for a given load current.
• the control circuit must operate over a wider range of conditions in order to maintain the
output voltage at the required level. This may have implications for the stability of the
control loop and the transient performance of the converter.

To minimise this effect it is desirable to keep the inductor LS as small as possible.

2.4 Switching Conditions

The zero-voltage transition switching conditions are achieved in subtly different ways in the
two legs. In both cases the device output capacitances and snubber capacitors play a central
role, by limiting the rate of rise of device voltage at turn off and therefore allowing the device
current to fall to zero before the device voltage rises appreciably. However, in leg A, the
leading leg, a resonant action takes places involving the snubber capacitors and LS whilst in

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the lagging leg, leg B, the snubber capacitors are charged and discharged by the virtually
constant current of the output filter inductor.

Also, to permit the zero-voltage transitions to take place a small dead-time TD is present in
each leg between the turn off of one device and the turn on of the other.

2.4.1 Leg A

From an examination of the modulation waveforms, Figure 2, it is seen that the leg A
switching action results in the inverter output voltage VAB changing from an initial value of
zero to either plus or minus Vin .

Immediately prior to each leg A switching action VAB = VDD = 0 , and immediately following
each switching action the magnitude of VAB rises to Vin , which initiates the overlap
phenomenon, that is I AB reverses linearly whilst VDD remains at zero.

An equivalent circuit is shown in Figure 5a to illustrate the mechanism by which the snubber
capacitors are charged / discharged immediately following the turn off of TA1. Since this
transient takes place during the first part of the overlap period, the rectifier diodes are all in
conduction and the output filter inductor plays no part.

The initial conditions for the transient are: VA1 = 0, VA 2 = Vin and I AB = NI LO . I LO is the
output filter current at the leg A switching instant.

Writing down the circuit equations:

dVA1 dV
VA1 + VA 2 = Vin ⇒ = − A2 (6)
dt dt

dVA1 dV
VA1 + VLs = 0 ⇒ = − Ls (7)
dt dt

I CA1 = I CA 2 + I AB (8)

dVA1 dV
Substituting for I CA1 and I CA 2 in eq(8) using: I CA1 = C A and I CA 2 = C A A 2
dt dt

where CA1 and CA2 are each assumed to have a value C A gives:

dVA1 dVA 2 I AB
= + (9)
dt dt CA

Eliminating dVA 2 / dt using eq(6), then dVA1 / dt using eq(7), and finally eliminating VLs
using VLs = LS dVLs / dt produces an equation in I AB :

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 d 2 I AB I
2
+ AB = 0 (10)
dt 2C A LS

Eq(10) is a standard second-order differential equation which describes an undamped

resonant system. The solution is therefore of the form:

I AB = X sin wt + Y cos wt where w = 1 / 2C A LS (11)

The constants X and Y are determined by considering the initial conditions:

I AB (0) = NI LO ⇒ Y = NI LO (12)

dI AB
VLs (0) = 0 ⇒ ( 0) = 0 ⇒ X = 0 (13)
dt

The complete solution is, therefore,

I AB = NI LO cos ωt (14)

VLs = − ZNI LO sin ωt (15)

where Z = LS /(2C A )

and from equations (6), (7) and (15)

VA1 = ZNI LO sin ωt and VA 2 = Vin − ZNI LO sin ωt (16)

The circuit waveforms will change according to equations (14), (15) and (16) until VA1 = Vin
and VA 2 = 0 . At this instant I AB transfers to the lower anti-parallel diode in leg A, there is
then no further current flow in the snubber capacitors, and the overlap transition continues
with I AB changing linearly.

The duration of the resonant transition of the snubber capacitors may be obtained by setting
VA1 = Vin in equation (16).

1  V 
duration of transition = sin −1  in  (17)
ω  ZNI LO 

Sketched waveforms for VA1 and I Ls during the resonant transition are shown in Figure 5b.

To achieve low-loss, zero-voltage switching of the devices in leg A, the preceding equations
indicate that two conditions must be fulfilled.

(i) for VA1 to rise to Vin and VA 2 to fall to zero, equation (16) shows that ZNI LO ≥ Vin .

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 (ii) to allow the resonant transition to take place the leg dead-time TD must be greater
than the duration of the transition, from equation (17).

1  V 
TD ≥ sin −1  in  (18)
ω  ZNI LO 

In addition, to allow I AB to reverse during overlap, the dead-time must be less than or equal
to half of the overlap time, therefore:

1  V  T
sin −1  in  ≤ TD ≤ OL (19)
ω  ZNI LO  2

Since I LO the filter inductor current at the leg A switching instant is approximately equal to
the load current, condition (i) is a minimum load restriction, that is:

Vin
I0 ≥ (20)
ZN

To maintain zero voltage switching at low load current levels a large value of Z is desirable.
This implies a large LS and small C A . The minimum attainable value of C A is fixed by the
device output capacitance and in practice a larger value may be necessary to control the dv/dt
and ensure low device turn-off losses. The requirement for a large value of LS is in conflict
with the desire to minimise LS to keep the transformer turns ratio N as small as possible,
eq(5).

2.4.2 Leg B

By examining the modulation waveforms, Figure 2, it is seen that the leg B switching action
results in the full-bridge output voltage VAB and the bridge rectifier output voltage VDD both
collapsing to zero.

Since the rectifier output voltage falls to zero as the leg B output voltage changes, then during
the transition one pair of rectifier diodes remain reverse biased and the leg B snubber
capacitors are, therefore, charged / discharged by the primary stray inductance LS in series
with the secondary filter inductor. An equivalent circuit is shown in Figure 6 for the snubber
voltage transition immediately following the turn off of TB2.

The relatively large filter inductor dominates the charging / discharging of the leg B snubber
capacitors. The capacitors are therefore charged / discharged by a virtually constant current
equal to the primary-referred load current NI 0 . The rate of change of voltage during the
transition is:

dVB 2 dV NI 0
= − B1 = where CB1 = CB2 = C B (21)
dt dt 2CB

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 2CBVin
and the duration of the transition = (22)
NI 0

To ensure zero-voltage switching, the leg B dead-time must be greater than or equal to the
duration of the voltage transition. The maximum dead-time in leg B is large since I AB does
not reverse until after the next leg A switching transition.

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3.0 Tutorial Problems: ZVS and the Phase-Shift Controlled Full-Bridge Converter

1. By reducing the inductor value, explain how the boost DC-DC converter may be operated
with zero-voltage switching conditions. Illustrate your explanation with sketched circuit
waveforms. State, clearly, any other circuit modifications that may be necessary.

2. A zero-voltage switching boost converter operates from a 160 V source and supplies 10
kW to a 400 V load. The switching frequency is 30 kHz, the filter inductor has a value of
20 μH, and the snubber capacitors connected across each transistor have values of 15 nF.
Calculate the transistor currents at the turn off instants, and the durations of the snubber
charging / discharging transitions.

Ans: I L (min) = −17.5 A, time = 686 ns, I L (max) = 142.5 A, time = 84.2 ns

3. Sketch and explain the waveforms of H-bridge output voltage and output current for the
phase-shift controlled, zero-voltage switching full-bridge converter. Show, with a clearly
explained derivation that the converter output voltage may be expressed as:

4 N 2 I 0 LS
V0 = δNVin −
T

T is the switching period and δT / 2 is the time delay between the switching actions in the
leading and lagging legs, I 0 is the load current, LS is the primary-referred transformer
leakage inductance, and the transformer turns ratio is 1:N.

4. The phase-shift controlled full-bridge DC-DC converter is to operate from a 400 V DC

source and supply a current of 50 A to a 50 V load. The switching frequency is 50 kHz,
the primary series inductance LS has been chosen to be 20 µH and the maximum value of
the phase-shift control parameter δ is 0.9. Determine a value for the transformer turns
ratio.

Ans: 1:N = 1:0.152

5. By drawing equivalent circuits, explain how zero-voltage switching of the transistors is

achieved in the leading and lagging legs of the phase-shift modulated, full-bridge DC-DC
converter.

Using the equivalent circuit for the switching transient in the leading leg, show, with a
clearly explained derivation, that the voltages across the transistors change according to
the following equations:

VA1 = ZNI LO sin ωt and VA 2 = Vin − ZNI LO sin ωt

Z = LS /(2C A ) , ω = 1 / 2 LS C A , LS is the primary-referred transformer leakage

inductance, the snubber capacitors have a value C A , the transformer turns-ratio is 1:N,
and I LO is the value of the output inductor current at the switching instant, which may be
assumed to be approximately equal to the converter output current.

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 Assuming that LS = 6 μH, C A = 2 nF, N = 0.4, and Vin = 250 V, calculate the minimum
converter load current if zero-voltage switching is to be achieved in the leading leg of the
H bridge.

Ans: I 0 ≈ I LO = 16.2 A

6. Using the expressions in Q5 for the voltage transitions in the leading leg of the phase-
shift modulated DC-DC converter, determine the permissible range of values for the
dead-time in the leading leg if zero-voltage switching is to be achieved. Vin = 350 V, LS
= 10 μH, C A = 5 nF, N = 0.3, and the load current is 60 A.

Determine an expression for the optimum dead time and calculate its value.

The output voltage is 50 V and the maximum value of the phase shift control parameter,
δ , is 0.85. Calculate the maximum permissible operating frequency for the converter,
providing full derivation of any equations that you use.

Ans: 210 ns < dead time < 514 ns, optimum dead time = π /(2ω ) = 497 ns, maximum
switching frequency = 135 kHz

7. A phase-shift controlled full-bridge DC-DC converter is to operate from a 600 V DC

source, the output voltage is 50 V and the transformer turns-ratio is 1:0.1. The total
inductance in series with the transformer primary is 100 µH. If the converter is to
maintain zero-voltage switching operation for load values of 1.5 kW to 3 kW, calculate
the maximum value of snubber capacitor that may be used in the leading leg and
determine the leg dead time.

Ans: C A = 1.25 nF, dead time = 785 ns

4.0 Example Exam Question on ZVS and the Phase-Shift Controlled Full-Bridge
Converter (taken from previous MSc papers)

(a) Briefly explain the difference between inductive switching waveforms and zero-voltage
switching waveforms.
[3 marks]
(b) Explain the advantage and motivation of using zero-voltage switching.
[2 marks]
(c) Draw a circuit diagram of the zero-voltage switching boost converter and briefly
explain the converter operation.
[6 marks]

(d) The full-bridge, phase-shift controlled DC-DC converter is shown in Figure Q.

(i) Sketch and annotate waveforms of the two leg output voltages V A and V B , the H-
bridge output voltage V AB , the rectified secondary voltage V DD and the primary
current I AB . Align the waveforms under each other.

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 (ii) The converter in Figure Q operates from a 400 V source. The switching
frequency is 50 kHz, the transformer turns ratio is 1:0.2, LS = 10 µH, and the load
resistance is 1 Ω. Determine the phase shift between the two legs in the converter
if the load voltage is 48 V. Provide clear derivations for any expressions that you
use.
[6, 8 marks]

Figure Q
Total [25 marks]

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