A B C D E

Biwa Block Diagram Project code: 91.4H001.001

PCB P/N : 55.4H001.XXX
REVISION : 06237-3(GCE, Hannstar)
Mobile CPU
4 CLK GEN. Merom 479 4

-3-0313
ICS 9LPR502
G792
(RTM875T-605) 3
2G/2.33G 20
PCB STACKUP
2.0G : B0, QLYV
2.2G : B0, QLFS
4, 5 TOP
CPU DC/DC
HOST BUS [email protected] VCC MAX8770 36

DDR2 533/667MHz
SVIDEO/COMP
TVOUT 15
S INPUTS OUTPUTS
533/667 MHz Crestline
AGTL+ CPU I/F LVDS
S
DCBATOUT
VCC_CORE_S0
14" WXGA GND 0~1.3V
12,13 DDR Memory I/F LCD 14 47A
INTEGRATED GRAHPICS BOTTOM
DDR2 533/667MHz LVDS, CRT I/F
RGB CRT
CRT 15 SYSTEM DC/DC
ISL6236 37
533/667 MHz 71.CREST.M02, B0, QN12 6,7,8,9,10,11
12,13 X4 DMI INPUTS OUTPUTS
3 C-Link0 3
400M Byte/s PCMCIA I/F 5V_S5(5A)
PCMCIA DCBATOUT 3D3V_S5(5A)
Line In 5V_AUX_S5
TI 7412 PWR SW SLOT
30 Support
Codec AZALIA CardBus TPS2211 SYSTEM DC/DC
ALC268 ICH8M PCI BUS
27 TypeII
27
MAX8717 38
29 1394 1394 INPUTS OUTPUTS
6 PCIe ports
Mic In PCI/PCI BRIDGE CardReader CONN 26 1D05V_S0(13A)
25,26
MS/MS Pro/xD/ DCBATOUT
30 ACPI 1.1 1D8V_S3(10A)
MMC/SD/SDIO
3 SATA 6 in 1 G971 39
INT.MIC 1 PATA 66/100
27
1D8V_S3 1D5V_S0
10 USB 2.0/1.1 ports (4A)
30 OP AMP ETHERNET (10/100/1000MbE)
LAN
Giga LAN TXFM RJ45 APL5913 39
APA203130 High Definition Audio
24 24
BCM5787MKMLG 23 1D8V_S3 1D25V_S0
INT.SPKR LPC I/F (1.5A)
2 Serial Peripheral I/F PWR SW G2997F6U 39 2
Matrix Storage Technology(DO)
New card
28 P2231NFC
28 DDR_VREF_S0
30
G1412 30 Active Managemnet Technology(DO) PCIex1 Mini Card 1D8V_S3
(1.2A)
DDR_VREF_S3
Line Out Kedron a/b/g/n 28
G909 34
(No-SPDIF) C Link1
5V_AUX_S5 3D3V_AUX_S5
MODEM 71.0ICH8.A0U, B1, QN23 (100mA)

16,17,18,19
LPC BUS
RJ11
24 MDC Card MAXIM CHARGER
22 ISL6255 40
SATA

PATA

Super I/O INPUTS OUTPUTS

Winbond
KBC
Winbond SPI I/F 33
LPC
BIOS DEBUG CHG_PWR
PC87381 WPC8763L W25X80-VSSI-G
HDD21 USB22 CCD14
33 31 CONN. 33 DCBATOUT
19V 4.0A
4 PORT UP+5V
5V 100mA
1 Touch INT. 55.4H001.S04G
1
MINI USB 22 Finger FIR
CDROM Blue-tooth PT 32 Pad32 KB 32
Wistron Corporation
21 22 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

www.vinafix.vn
Size Document Number Rev
A3
Biwa -3
Date: Tuesday, March 13, 2007 Sheet 1 of 42
 A B C D E
ICH8M Functional Strap Definitions
ICH8-M EDS 21762 2.0V1 page 16
ICH8M Integrated Pull-up Crestline Strapping Signals and
Signal Usage/When Sampled Comment and Pull-down Resistors Configuration Crestline EDS 20954
page 7
1.0
ICH8-M EDS 21762 2.0V1
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: SIGNAL Resistor Type/Value CFG[2:0] FSB Frequency Select 001 = FSB533
offset 224h) HDA_BIT_CLK PULL-DOWN 20K 011 = FSB667
010 = FSB800
HDA_RST# NONE others = Reserved
4 HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h) CFG[4:3] Reserved
4
Rising Edge of PWROK. HDA_SDIN[3:0] PULL-DOWN 20K
GNT2# PCIE config2 bit0, This signal has a weak internal pull-up. HDA_SDOUT PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) 1 = DMI x4 (Default)
HDA_SYNC PULL-DOWN 20K CFG[8:6] Reserved
GPIO20 Reserved This signal should not be pulled high.
GNT[3:0] PULL-UP 20K 0 = Normal mode
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. Low Power PCI Express 1 = Low Power mode (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop GPIO[20] PULL-DOWN 20K (?)
and mobile. 0 = Reverse Lanes,15->0,14->1 ect..
LDA[3:0]#/FHW[3:0]# PULL-UP 20K CFG9 PCI Express Graphics 1= Normal operation(Default):Lane
Lane Reversal Numbered in order
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for LAN_RXD[2:0] PULL-UP 10K
GNT3# Swap Override. all cycles targeting FWH BIOS space).
Rising Edge of PWROK. Note: Software will not be able to clear the LDRQ[0] PULL-UP 20K CFG[11:10] Reserved
Top-Swap bit until the system is rebooted XOR/ALL Z test 00 = Reserved
without GNT3# being pulled down. LDRQ[1]/GPIO23 PULL-UP 20K
CFG[13:12] straps 01 = XOR mode enabled
PME# PULL-UP 20K 10 = All Z mode enabled
GNT0#/ Boot BIOS Destination Controllable via Boot BIOS Destination bit 11 = Normal Operation (Default)
SPI_CS1# Selection. (Config Registers:Offset 3410h:bit 11:10). PWRBTN# PULL-UP 20K
Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. CFG[15:14] Reserved Reserved
SATALED# PULL-UP 15K
Integrated VccSus1_05, Enables integrated VccSus1_05, VccSus1_5 and CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
INTVRMEN VccSus1_5 and VccCL1_5 VccCL1_5 VRM's when sampled high SPI_CS1# PULL-UP 20K 1 = Dynamic ODT Enabled (Default)
VRM Enable/Disable.
Always sampled. SPI_CLK PULL-UP 20K
CFG[18:17] Reserved
3 Integrated VccLAN1_05 Enables integrated VccLAN1_05 and VccCL1_05 VRM's
SPI_MOSI PULL-UP 20K
0 = Normal operation (Default):lane 3
LAN100_SLP and VccCL1_05 VRM when sampled high SPI_MISO PULL-UP 20K CFG19 DMI Lane Reversal Numbered in order
Enable/Disable.
Always sampled. TACH_[3:0] PULL-UP 20K (?) 1 =Reverse Lane,4->0,3->1 ect...

SPKR PULL-DOWN 20K 0 = Only SDVO or PCIE x1 is

PCI Express Lane Signal has weak internal pull-up. Sets bit 27 CFG20 SDVO/PCIE operational (Default)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) TP[3] PULL-UP 20K Concurrent 1 =SDVO and PCIE x1 are operating
of PWROK. simultaneously via the PEG port
USB[9:0][P,N] PULL-DOWN 15K
SPKR No Reboot. If sampled high, the system is strapped to the SDVOCRTL SDVO Present 0 = No SDVO Card present (Default)
Rising Edge of PWROK. "No Reboot" mode(ICH8 will disable the TCO Timer CL_RST# PULL-UP 13K _DATA
system reboot feature). The status is readable 1= SDVO Card present
via the NO REBOOT bit.
NOTE: All strap signals are sampled with respect to the leading
TP3 XOR Chain Entrance. This signal should not be pull low unless using edge of the Crestline GMCH PWORK in signal.
Rising Edge of PWROK. XOR Chain testing.

GPIO33/ Flash Descriptor This signal has a weak internal pull-up.

History
HDA_DOCK Security Override Strap Sampled low:the Flash Descriptor Security will be
_EN# Rising Edge of PWROK overridden. If high,the security measures will be 2007/02/16
in effect.This should only be used in manufacturing 1.Page 33: Add SIO 87381 for FIR Issue.
environments. 2.Page 31, change KBC from 8768L to 8763L.
3.Page 33, del U33(LPC golden Finger).
4.Page 24/32, change ERC1/ERC2 due to 77.61021.02L is Obsoleted Part !
5.Page 37, del TC22/TC19.
2 6.Page 38, del TC1/TC4. 2
===========================================================
ICH8M IDE Integrated Series 2007/02/09
1.Page 14:Modify "Q14" "BTBTN1" "WLBTN1" symbol.
2.Page 36, 37, 38: Replace 0ohm with 0ohm pad.
Termination Resistors ===========================================================
2007/02/08a
1.Page 14:Modify R428 to“FRONT_PWRLED#_1”and RN58 pin7 to“STBY_LED#_2”due to LED brightness issue.
DD[15:0], DIOW#, DIOR#, DREQ, 2.Page 38:Replace "TC26" with "77.C1561.01L".
approximately 33 ohm
DDACK#, IORDY, DA[2:0], DCS1#, ===========================================================
2007/02/08
DCS3#, IDEIRQ 1.Page 10:Replace "R244" with "0603-PAD".
2.Page 36:Replace open power gap with close power gap.

page 17
USB Table 3.Page 38:Add capacitor "TC26" for acoustic noise
===========================================================
PCI Routing USB
IDSEL INT REQ GNT Pair Device
G:CARDBUS 0 0 0 USB1
TI7412 AD22 B:1394
F:Flash Media 1 USB2
G:SD Host 2 USB3
3 USB4
1 55.4H001.S04G
1
4 MINIC1
PCIE Routing 5 BT Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LANE1 LAN BCM5787M 6 CCD Taipei Hsien 221, Taiwan, R.O.C.

LANE2 MiniCard WLAN 7 Finger Title

LANE3 NewCard WLAN 8 NEW Reference

www.vinafix.vn
Size Document Number Rev
9 NC A3
Biwa -2
Date: Tuesday, March 13, 2007 Sheet 2 of 42
 A B C D E

3D3V_S0
3D3V_S0
3D3V_S0
3D3V_CLKGEN_S0 2 1
2 1 3D3V_48MPWR_S0 3D3V_CLKPLL_S0 2 1 R325 0R0603-PAD

1
R327 0R0603-PAD R318 0R0603-PAD C240 C234 C260 C263

SC4D7U6D3V3KX-GP
1

1
C492 C261 C264 C487 C235 C239 C265
DY C262 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
SC1U6D3V2ZY-GP

4 4

3D3V_S0
2

2
DY DY DY
R174 R180 R179 R173
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
1

1
PCLKCLK2 U26
3D3V_CLKGEN_S0 2 55
VDDPCI SDATA SMBD_ICH 12,19
PCLKCLK3 3D3V_48MPWR_S0 9 56 SMBC_ICH 12,19
VDD48 SCLK
16 VDD
PCLKCLK4 53 VDDREF DREFCLK_1 RN21
DOTT_96/SRCT0 13 2 3 DREFCLK 7
PCLKCLK5 31 14 DREFCLK#_1 1 CKS 4 SRN33J-5-GP-U DREFCLK# 7
VDDSRC DOTC_96/SRCC0
47 VDDCPU
17 DREFSSCLK_1 2 3 RN22 DREFSSCLK 7
SRCT1/SE1
2

3D3V_CLKPLL_S0 12 18 DREFSSCLK#_1 1 CKS 4 SRN33J-5-GP-U

DY RTM 20
VDDI/O96MHZ SRCC1/SE2 DREFSSCLK# 7

<--
R162 R163 R164 R165 VDDPLL3I/O CLK_PCIE_SATA_1 RN23
-1 2/16 modify 26 VDDSRCI/O SRCT2/SATAT 21 2 3 CLK_PCIE_SATA 16
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 37 22 CLK_PCIE_SATA_1# 1 CKS 4 SRN33J-5-GP-U CLK_PCIE_SATA# 16
VDDSRCI/O SRCC2/SATAC
41
1

VDDI/OCPU CLK_MCH_3GPLL_1 2 RN24

SRCT3/CR#_C 24 3 CLK_MCH_3GPLL 7
TPAD30 TP55 PCLKCLK0 1 25 CLK_MCH_3GPLL_1# 1 CKS 4 SRN33J-5-GP-U CLK_MCH_3GPLL# 7
PCI0/CR#_A SRCC3/CR#_D
3 TPAD30 TP99 PCLKCLK1 3 27 CLK_PCIE_MINI_12 2 3 RN25 CLK_PCIE_MINI1 28
3
PCI1/CR#_B SRCT4 CLK_PCIE_MINI_12#
SRCC4 28 1 CKS 4 SRN33J-5-GP-U CLK_PCIE_MINI1# 28
31 PCLK_KBC R171 2 1 22R2J-2-GP PCLKCLK2 4 PCI2/TME
PCI_STOP#/SRCT5 30 PM_STPPCI# 17
33 PCLK_SIO R178 2 1 22R2J-2-GP PCLKCLK3 5 29 PM_STPCPU# 17
PCI3 CPU_STOP#/SRCC5
SA SIV Bug 26 PCLK_PCM 1 R177 2 PCLKCLK4 6 PCI4/SRC5_EN SRCT6 33 CLK_PCIE_ICH_1 1 4 RN19 CLK_PCIE_ICH 17
CL=20pF±0.2pF 33R2J-2-GP 32 CLK_PCIE_ICH_1# 2 CKS 3 SRN33J-5-GP-U CLK_PCIE_ICH# 17
C237 R170 2 SRCC6
17 PCLK_ICH 1 22R2J-2-GP PCLKCLK5 7 PCI_F5/ITP_EN
SC27P50V2JN-2-GP 36 CLK_PCIE_NEW_1 1 4 RN18 CLK_PCIE_NEW 28
GEN_XTAL_IN R154 2 SRCT7/CR#_F
1 2 1 10MR2J-L-GP 51 35 CLK_PCIE_NEW_1# 2 NEW 3 SRN33J-5-GP-U
2
DY 1 GEN_XTAL_OUT 52
X2 SRCC7/CR#_E CLK_PCIE_NEW# 28
X1
1

X2 R153 0R0402-PAD 39 CLK_PCIE_LAN_R 1 4 RN17 CLK_PCIE_LAN 23

X-14D31818M-44GP R172 2 CPUT2_ITP/SRCT8
17 CLK48_ICH 1 22R2J-2-GP CLK48 10 USB_48MHZ/FSLA CPUC2_ITP/SRCC8 38 CLK_PCIE_LAN#_R 2 CKS 3 SRN33J-5-GP-U CLK_PCIE_LAN# 23
C236 82.30005.951 4,7 CPU_SEL0 R169 2 1 2K2R2J-2-GP
SC27P50V2JN-2-GP 4,7 CPU_SEL1 49 43 CLK_MCH_BCLK_1 1 4 RN16 CLK_MCH_BCLK 6
2

GEN_XTAL_OUT_R FSLB/TEST_MODE CPUT1 CLK_MCH_BCLK_1#

1 2 CPUC1 42 2 CKS 3 SRN33J-5-GP-U CLK_MCH_BCLK# 6
4,7 CPU_SEL2 R144 2 1 2K2R2J-2-GP CPU_SEL2_R 54 REF0/FSLC/TEST_SEL CLK_CPU_BCLK_1 RN15
CPUT0 46 1 4 CLK_CPU_BCLK 4
17 CLK_ICH14 R145 2 1 22R2J-2-GP 8 45 CLK_CPU_BCLK_1# 2 CKS 3 SRN33J-5-GP-U CLK_CPU_BCLK# 4
GNDPCI CPUC0
11 GND48
<-- 33 CLK14_SIO R605 2 1 22R2J-2-GP 15 GND 3D3V_S0
-1 2/16 modify 19 GND CK_PWRGD/PD# 48 CLK_PWRGD 17
23 GNDSRC
26 CLK48_CARDBUS R176 2 1 CLK48 34 40 10KR2J-3-GP
22R2J-2-GP GNDSRC NC#40
44 GNDCPU 1 DY 2
50 R142
GNDREF
ICS9LPR502HGLFT-GP
2 71.09502.A0W CKS 2

ICS9LPR502HGLFT-GP setting table RTM875T-605 setting table

PIN NAME DESCRIPTION PIN NAME DESCRIPTION
Byte 5, bit 7 Byte 5, bit 7 SEL2 SEL1 SEL0
0 = PCI0 enabled (default) 0 = PCI0 enabled (default) CPU FSB
PCI0/CR#_A 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
PCI0/CR#_A 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair FSC FSB FSA
Byte 5, bit 6 Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default), 0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair 1= CR#_A controls SRC2 pair 1 0 1 100M X
Byte 5, bit 5 Byte 5, bit 5 0 0 1 133M X
0 = PCI1 enabled (default) 0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 0 1 1 166M 667M
PCI1/CR#_B Byte 5, bit 4 PCI1/CR#_B Byte 5, bit 4
200M 800M
0 = CR#_B controls SRC1 pair (default) 0 = CR#_B controls SRC1 pair (default) 0 1 0
1
1= CR#_B controls SRC4 pair 1= CR#_B controls SRC4 pair 55.4H001.S04G 1

0 = Overclocking of CPU and SRC Allowed 0 = Overclocking of CPU and SRC Allowed
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed
Wistron Corporation
0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCI3/SRC-5_EN 1 = Pins29,30 as SRC-5 differential pair. Taipei Hsien 221, Taiwan, R.O.C.

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#. 0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# Title
PCI4/SRC5_EN 1 = Pins29,30 as SRC-5 differential pair. PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
Clock Generator
0 =SRC8/SRC8# 0 =SRC8/SRC8# Size Document Number Rev

www.vinafix.vn
PCI_F5/ITP_EN 1 = ITP/ITP# PCI_F5/ITP_EN 1 = ITP/ITP#
Biwa -2
Date: Tuesday, March 13, 2007 Sheet 3 of 42
A B C D E
 A B C D E

H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
U41A 1 OF 4 TP13 TPAD30 H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# H_D#[63..0]
4 L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6 4

ADDR GROUP 0
H_A#6 K5 A6#

1
H_A#7 M3 H5 H_DEFER# 6
H_A#8 A7# DEFER# R117
N2 F21

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP
A9# DBSY# H_DBSY# 6
H_A#10 N3
H_A#11 A10#
P5 F1 H_BREQ#0 6

2
H_A#12 A11# BR0# Place testpoint on
P2 A12#
H_A#13 L2 D20 H_IERR# H_IERR# with a GND
H_A#14 A13# IERR# 0.1" away
P4 A14# INIT# B3 H_INIT# 16
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 H_CPURST# 6,42 U41B 2 OF 4
6 H_ADSTB#0 ADSTB0#
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 H2 REQ0# RS0# H_RS#1 H_D#1 D0# D32# H_D#33
REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
H_REQ#3 J3 REQ2# RS2# H_D#3 D2# D34# H_D#35
REQ3# TRDY# G2 H_TRDY# 6 G22 D3# D35# V26
H_REQ#4 L1 H_D#4 F23 V23 H_D#36
REQ4# D4# D36#

DATA GRP0
DATA GRP2
G6 H_HIT# 6 H_THERMDA H_D#5 G25 T22 H_D#37
H_A#17 HIT# H_D#6 D5# D37# H_D#38
Y2 A17# HITM# E4 H_HITM# 6 E25 D6# D38# U25

1
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# XDP_BPM#0 TP27 TPAD30 C486 H_D#8 D7# D39# H_D#40
R3 A19# BPM0# AD4 K24 D8# D40# Y25
H_A#20 W6 XDP/ITP SIGNALS AD3 XDP_BPM#1 TP23 TPAD30 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41

2
A20# BPM1# D9# D41#
ADDR GROUP 1

H_A#21 U4 AD1 XDP_BPM#2 TP11 TPAD30 H_THERMDC H_D#10 J24 Y23 H_D#42
H_A#22 A21# BPM2# XDP_BPM#3 TP22 TPAD30 H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 J23 D11# D43# W24
H_A#23 U1 AC2 XDP_BPM#4 TP16 TPAD30 H_D#12 H22 W25 H_D#44
H_A#24 A23# PRDY# XDP_BPM#5 TP8 TPAD30 H_D#13 D12# D44# H_D#45
R4 A24# PREQ# AC1 F26 D13# D45# AA23
H_A#25 T5 AC5 XDP_TCK TP26 TPAD30 H_D#14 K22 AA24 H_D#46
3 H_A#26 A25# TCK XDP_TDI TP33 TPAD30 1D05V_S0 H_D#15 D14# D46# H_D#47 3
T3 A26# TDI AA6 H23 D15# D47# AB25
H_A#27 W2 AB3 XDP_TDO TP18 TPAD30 J26 Y26 H_DSTBN#2 6
A27# TDO 6 H_DSTBN#0 DSTBN0# DSTBN2#
H_A#28 W5 AB5 XDP_TMS TP28 TPAD30 H26 AA26 H_DSTBP#2 6
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2#
H_A#29 Y4 AB6 XDP_TRST# TP35 TPAD30 H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#

2
H_A#30 U2 C20 XDP_DBRESET# TP40 TPAD30
H_A#31 A30# DBR#
V4 A31#
H_A#32 W3 R118 H_D#16 N22 AE24 H_D#48
H_A#33 A32# H_D#17 K25 D16# D48# H_D#49
AA4 A33# THERMAL 56R2J-4-GP D17# D49# AD24
H_A#34 AB2 DY H_D#18 P26 AA21 H_D#50

1
H_A#35 A34# CPU_PROCHOT#_R D18# D50#
AA3 A35# PROCHOT# D21 2 R119 1 CPU_PROCHOT# 36 H_D#19 R23
D19# D51# AB22 H_D#51
V1 A24 H_THERMDA 20 0R2J-2-GP H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 20 H_D#21 M24 AC26 H_D#53
THRMDC D21# D53#

DATA GRP1
DATA GRP3
16 H_A20M# A6 H_D#22 L22 AD20 H_D#54
A20M# H_D#23 M23 D22# D54# H_D#55
16 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP# 7,16,34 D23# D55# AE22
ICH

16 H_IGNNE# C4 H_D#24 P25 AF23 H_D#56

IGNNE# H_D#25 P23 D24# D56# H_D#57
D25# D57# AC25
D5 PM_THRMTRIP# H_D#26 P22 AE21 H_D#58
16 H_STPCLK# STPCLK# D26# D58#
C6 HCLK A22 should connect to H_D#27 T24 AD21 H_D#59
16 H_INTR LINT0 BCLK0 CLK_CPU_BCLK 3 D27# D59#
B4 A21 ICH8 and MCH Layout Note: H_D#28 R24 AC22 H_D#60
16 H_NMI LINT1 BCLK1 CLK_CPU_BCLK# 3 D28# D60#
A3 without T-ing "CPU_GTLREF0" H_D#29 L25 AD23 H_D#61
16 H_SMI# SMI# 1D05V_S0 D29# D61#
( No stub) 0.5" max length. H_D#30 T25 AF22 H_D#62
TPAD30 TP25 RSVD_CPU_1 H_D#31 N25 D30# D62# H_D#63
M4 RSVD#M4 D31# D63# AC23

2
TPAD30 TP30 RSVD_CPU_2 N5 L26 AE25 H_DSTBN#3 6
RSVD#N5 6 H_DSTBN#1 DSTBN1# DSTBN3#
TPAD30 TP14 RSVD_CPU_3 T2 R320 M26 AF24 H_DSTBP#3 6
RESERVED

RSVD#T2 6 H_DSTBP#1 DSTBP1# DSTBP3#

TPAD30 TP19 RSVD_CPU_4 V3 1KR2F-3-GP N24 AC20 H_DINV#3 6
RSVD#V3 6 H_DINV#1 DINV1# DINV3#
TPAD30 TP15 RSVD_CPU_5 B2
TPAD30 TP20 RSVD_CPU_6 RSVD#B2 CPU_GTLREF0 COMP0 R322 1 27D4R2F-L1-GP
C3 AD26 R26 2

1 1
TPAD30 TP17 RSVD_CPU_7 RSVD#C3 TEST1 GTLREF COMP0 COMP1 R3211 54D9R2F-L1-GP
D2 RSVD#D2 C23 TEST1 MISC COMP1 U26 2
TPAD30 TP41 RSVD_CPU_8 D22 TEST2 D25 AA1 COMP2 R75 1 2 27D4R2F-L1-GP
2 TPAD30 TP21 RSVD_CPU_9 RSVD#D22 R319 RSVD_CPU_12 C24 TEST2 COMP2 COMP3 R74 1 54D9R2F-L1-GP 2
D3 RSVD#D3 TPAD30 TP42 TEST3 COMP3 Y1 2
TPAD30 TP32 RSVD_CPU_10 F6 2KR2F-3-GP TPAD30 TP43 TEST4 AF26
RSVD#F6 RSVD_CPU_13 AF1 TEST4
TPAD30 TP12 TEST5 DPRSTP# E5 H_DPRSTP# 7,16,36
TPAD30 TP10 RSVD_CPU_11 B1 TPAD30 TP44 RSVD_CPU_14 A26 B5 H_DPSLP# 16

2
KEY_NC TEST6 DPSLP#
DPWR# D24 H_DPWR# 6
BGA479-SKT6-GPU3 3,7 CPU_SEL0 B22 D6 H_PWRGD 16,34,42
BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 36
2nd source: 62.10053.401

BGA479-SKT6-GPU3
1D05V_S0
Layout Note:
TEST1 Comp0, 2 connect with Zo=27.4 ohm, make
XDP_TMS R90
1 DY 2
trace length shorter than 0.5" .
1 2 39R2F-GP R324 1KR2J-1-GP
Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
XDP_TDI R98 2 150R2F-1-GP TEST2 trace length shorter than 0.5" .
1 1
R323
DY 2
1KR2J-1-GP make sure "TEST4" routing is
20060925 original 27R2F reference to GND and away other
XDP_TCK R91 1 2 27D4R2F-L1-GP
noisy signals
XDP_TRST# R103 1 2 649R2F-GP

All place within 2" to CPU

1 55.4H001.S04G 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (1 of 2)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
4 of 42
SA
 A B C D E

VCC_CORE_S0 U41D 4 OF 4

VCC_CORE_S0 VCC_CORE_S0 A4 P6
VSS VSS
4 A8 VSS VSS P21 4
U41C 3 OF 4 A11 P24
VSS VSS
A14 VSS VSS R2

1
A7 AB20 C115 C214 C126 C210 A16 R5
VCC VCC VSS VSS
A9 VCC VCC AB7 A19 VSS VSS R22

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
A10 AC7 A23 R25
DY

2
VCC VCC VSS VSS
A12 VCC VCC AC9 AF2 VSS VSS T1
A13 VCC VCC AC12 B6 VSS VSS T4
A15 VCC VCC AC13 B8 VSS VSS T23
A17 VCC VCC AC15 B11 VSS VSS T26
A18 VCC VCC AC17 B13 VSS VSS U3
A20 VCC VCC AC18 B16 VSS VSS U6
B7 VCC VCC AD7 B19 VSS VSS U21
B9 VCC VCC AD9 B21 VSS VSS U24
B10 VCC VCC AD10 B24 VSS VSS V2
B12 VCC VCC AD12 C5 VSS VSS V5
B14 VCC VCC AD14 C8 VSS VSS V22
B15 AD15 VCC_CORE_S0 C11 V25
VCC VCC VSS VSS
B17 VCC VCC AD17 C14 VSS VSS W1
B18 VCC VCC AD18 C16 VSS VSS W4
B20 VCC VCC AE9 C19 VSS VSS W23

1
C9 AE10 C151 C434 C463 C207 C447 C433 C152 C456 C170 C187 C199 C462 C458 C208 C2 W26
VCC VCC VSS VSS
C10 AE12 C22 Y3
VCC VCC DY DY DY DY DY DY DY DY VSS VSS

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP

SC10U6D3V6KX-4GP
C12 AE13 C25 Y6

2
VCC VCC VSS VSS
C13 VCC VCC AE15 D1 VSS VSS Y21
C15 VCC VCC AE17 D4 VSS VSS Y24
C17 VCC VCC AE18 D8 VSS VSS AA2
C18 VCC VCC AE20 D11 VSS VSS AA5
D9 VCC VCC AF9 D13 VSS VSS AA8
3 D10 AF10 D16 AA11 3
VCC VCC VSS VSS
D12 VCC VCC AF12 D19 VSS VSS AA14
D14 VCC VCC AF14 D23 VSS VSS AA16
D15 VCC VCC AF15 D26 VSS VSS AA19
D17 VCC VCC AF17 E3 VSS VSS AA22
D18 VCC VCC AF18 E6 VSS VSS AA25
E7 AF20 1D05V_S0 E8 AB1
VCC VCC VSS VSS
E9 VCC E11 VSS VSS AB4
E10 VCC VCCP G21 CPU_G21 1 2 E14 VSS VSS AB8
E12 V6 CPU_V6 R116 10R0402-PAD
2 E16 AB11
VCC VCCP R102 0R0402-PAD VSS VSS
E13 VCC VCCP J6 E19 VSS VSS AB13
E15 VCC VCCP K6 E21 VSS VSS AB16
1

E17 VCC VCCP M6 E24 VSS VSS AB19

SCD1U10V2KX-4GP

E18 J21 C131 F5 AB23

VCC VCCP VSS VSS
SCD1U10V2KX-4GP

E20 K21 C220 F8 AB26

2

VCC VCCP VSS VSS

F7 VCC VCCP M21 F11 VSS VSS AC3
F9 N21 1D05V_S0 F13 AC6
VCC VCCP VSS VSS
F10 VCC VCCP N6 layout note: "1D5V_VCCA_S0" F16 VSS VSS AC8
F12 R21 F19 AC11
F14
VCC VCCP
R6 as short as possible F2
VSS VSS
AC14
VCC VCCP VSS VSS
F15 VCC VCCP T21 F22 VSS VSS AC16
F17 VCC VCCP T6 F25 VSS VSS AC19

1
F18 V21 1D5V_VCCA_S0 1D5V_S0 C217 C219 C137 C125 C133 C216 C130 C218 G4 AC21
VCC VCCP VSS VSS
F20 W21 G1 AC24
VCC VCCP L15 DY DY VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AA7 G23 AD2

2
VCC VSS VSS
AA9 VCC VCCA B26 1 2 G26 VSS VSS AD5
AA10 C26 HCB1608KF121T30-GP H3 AD8
VCC VCCA VSS VSS
1

AA12 H_VID[0..6] C488 68.00230.041 H6 AD11

VCC H_VID[0..6] 36 VSS VSS
AA13 AD6 H_VID0 C489 H21 AD13
2 VCC VID0 H_VID1 SCD01U16V2KX-3GP SC4D7U6D3V3KX-GP VSS VSS 2
AA15 AF5 H24 AD16
2

VCC VID1 H_VID2 VCC_CORE_S0 VSS VSS

AA17 VCC VID2 AE5 J2 VSS VSS AD19
AA18 AF4 H_VID3 J5 AD22
VCC VID3 H_VID4 VSS VSS
AA20 VCC VID4 AE3 J22 VSS VSS AD25
1

AB9 AF3 H_VID5 J25 AE1

VCC VID5 H_VID6 R97 VSS VSS
AC10 VCC VID6 AE2 K1 VSS VSS AE4
AB10 100R2F-L1-GP-U K4 AE8
VCC VSS VSS
AB12 VCC K23 VSS VSS AE11
AB14 AF7 VCC_SENSE 36 K26 AE14
2

VCC VCCSENSE VSS VSS

AB15 VCC L3 VSS VSS AE16
AB17 VCC L6 VSS VSS AE19
AB18 VCC VSSSENSE AE7 VSS_SENSE 36 L21 VSS VSS AE23
L24 VSS VSS AE26
1

Layout Note: M2 A2
R89 VSS VSS
M5 VSS VSS AF6
BGA479-SKT6-GPU3 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M22 AF8
62.10079.001 should be of equal length. VSS VSS
M25 VSS VSS AF11
2nd source: 62.10053.401 N1 AF13
2

VSS VSS
N4 VSS VSS AF16
Layout Note: N23 AF19
Provide a test point (with VSS VSS
N26 VSS VSS AF21
no stub) to connect a P3 A25
differential probe VSS VSS
VSS AF25
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm BGA479-SKT6-GPU3
resistors terminate the
55 ohm transmission line.
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
5 of 42
SA
 A B C D E

U40A 1 OF 10
H_D#[63..0] H_A#[35..3]
4 H_D#[63..0] H_A#[35..3] 4
H_D#0 E2 J13 H_A#3
H_D#1 H_D#0 H_A#3 H_A#4
G2 H_D#1 H_A#4 B11
4 H_D#2 G7 C11 H_A#5 4
H_D#3 H_D#2 H_A#5 H_A#6
M6 H_D#3 H_A#6 M11
H_D#4 H7 C15 H_A#7
1D05V_S0 H_D#5 H_D#4 H_A#7 H_A#8
H_SWING routing Trace width and H3 H_D#5 H_A#8 F16
H_D#6 G4 L13 H_A#9
Spacing use 10 / 20 mil H_D#6 H_A#9

1
H_D#7 F3 G17 H_A#10
R315 H_D#8 H_D#7 H_A#10 H_A#11
N8 H_D#8 H_A#11 C14
221R2F-2-GP H_D#9 H2 K16 H_A#12
H_D#10 H_D#9 H_A#12 H_A#13
H_SWING Resistors and M10 H_D#10 H_A#13 B13
H_D#11 N12 L16 H_A#14

2
Capacitors close MCH H_D#12 N9
H_D#11 H_A#14
J17 H_A#15
H_SWING H_D#13 H_D#12 H_A#15 H_A#16
500 mil ( MAX ) H5 H_D#13 H_A#16 B14

SCD1U10V2KX-4GP
H_D#14 P13 K19 H_A#17
H_D#14 H_A#17

1
C479 H_D#15 K9 P15 H_A#18
H_D#15 H_A#18
1

R316 H_D#16 M2 R17 H_A#19

100R2F-L1-GP-U H_D#17 H_D#16 H_A#19 H_A#20
W10 H_D#17 H_A#20 B16
H_D#18 Y8 H20 H_A#21
2

H_D#19 H_D#18 H_A#21 H_A#22

V4 L19

2
H_D#20 H_D#19 H_A#22 H_A#23
M3 H_D#20 H_A#23 D17
H_D#21 J1 M17 H_A#24
H_D#22 H_D#21 H_A#24 H_A#25
N5 H_D#22 H_A#25 N16
H_D#23 N3 J19 H_A#26
H_D#24 H_D#23 H_A#26 H_A#27
W6 H_D#24 H_A#27 B18
H_D#25 W9 E19 H_A#28
H_D#26 H_D#25 H_A#28 H_A#29
H_SCOMP and H_SCOMP# Resistors and N2 H_D#26 H_A#29 B17
H_D#27 Y7 B15 H_A#30
Capacitors close MCH 500 mil ( MAX ) H_D#28 Y9
H_D#27 H_A#30
E17 H_A#31
H_D#29 H_D#28 H_A#31 H_A#32
P4 H_D#29 H_A#32 C18
H_D#30 W3 A19 H_A#33
3 H_D#31 H_D#30 H_A#33 H_A#34 3
N1 H_D#31 H_A#34 B19
H_D#32 AD12 N19 H_A#35
1D05V_S0 H_D#33 H_D#32 H_A#35
AE3 H_D#33
H_D#34 AD9 G12

HOST
H_D#34 H_ADS# H_ADS# 4
1 2 H_SCOMP H_D#35 AC9 H_D#35 H_ADSTB#0 H17 H_ADSTB#0 4
R314 54D9R2F-L1-GP H_D#36 AC7 G20
H_D#36 H_ADSTB#1 H_ADSTB#1 4
1D05V_S0 H_D#37 AC14 C8 H_BNR# 4
H_D#38 H_D#37 H_BNR#
AD11 H_D#38 H_BPRI# E8 H_BPRI# 4
1 2 H_SCOMP# H_D#39 AC11 H_D#39 H_BREQ# F12 H_BREQ#0 4
R313 54D9R2F-L1-GP H_D#40 AB2 D6
H_D#40 H_DEFER# H_DEFER# 4
H_D#41 AD7 C10 H_DBSY# 4
H_D#42 H_D#41 H_DBSY#
AB1 H_D#42 HPLL_CLK AM5 CLK_MCH_BCLK 3
H_D#43 Y3 AM7 CLK_MCH_BCLK# 3
H_D#44 H_D#43 HPLL_CLK#
AC6 H_D#44 H_DPWR# H8 H_DPWR# 4
H_RCOMP routing Trace width and H_D#45 AE2 K7 H_DRDY# 4
H_D#46 H_D#45 H_DRDY#
AC5 E4 H_HIT# 4
Spacing use 10 / 20 mil H_D#47 AG3
H_D#46 H_HIT#
C6 H_HITM# 4
H_D#48 H_D#47 H_HITM#
AJ9 H_D#48 H_LOCK# G10 H_LOCK# 4
H_D#49 AH8 B7 H_TRDY# 4
H_D#49 H_TRDY#
1 2 H_RCOMP H_D#50 AJ14 H_D#50
R312 24D9R2F-L-GP H_D#51 AE9
H_D#52 H_D#51
AE11 H_D#52
H_D#53 AH12 H_DINV#[3..0]
H_D#53 H_DINV#[3..0] 4
H_D#54 AJ5 K5 H_DINV#0
H_D#55 H_D#54 H_DINV#0 H_DINV#1
AH5 H_D#55 H_DINV#1 L2
H_D#56 AJ6 AD13 H_DINV#2
H_D#57 H_D#56 H_DINV#2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#58
AE7
AJ7
H_D#57 H_DINV#3 AE13
H_DSTBN#[3..0]
H_D#58 H_DSTBN#[3..0] 4
H_D#59 AJ2 M7 H_DSTBN#0
2 H_D#60 H_D#59 H_DSTBN#0 H_DSTBN#1 2
AE5 H_D#60 H_DSTBN#1 K3
H_D#61 AJ3 AD2 H_DSTBN#2
H_D#62 H_D#61 H_DSTBN#2 H_DSTBN#3
AH2 H_D#62 H_DSTBN#3 AH11
H_D#63 AH13 H_DSTBP#[3..0]
H_D#63 H_DSTBP#[3..0] 4
H_REF Decoupling Crestline L7 H_DSTBP#0
H_DSTBP#0 H_DSTBP#1
K2
close Crestline 100 mil H_SWING B3
H_DSTBP#1
AC2 H_DSTBP#2
H_RCOMP H_SWING H_DSTBP#2 H_DSTBP#3
C2 H_RCOMP H_DSTBP#3 AJ10
1D05V_S0 H_REQ#[4..0] 4
H_SCOMP W1 M14 H_REQ#0
H_SCOMP# H_SCOMP H_REQ#0 H_REQ#1
W2 H_SCOMP# H_REQ#1 E13
2

A11 H_REQ#2
R311 H_REQ#2 H_REQ#3
4,42 H_CPURST# B6 H_CPURST# H_REQ#3 H13
1KR2F-3-GP E5 B12 H_REQ#4
4 H_CPUSLP# H_CPUSLP# H_REQ#4
H_RS#[2..0] 4
E12 H_RS#0
1

H_AVREF H_RS#0 H_RS#1

B9 H_AVREF H_RS#1 D7
A9 D8 H_RS#2
H_DVREF H_RS#2
1

R309 R310 C471

0R0402-PAD 2KR2F-3-GP SCD1U16V2ZY-2GP
1
2

CRB v0.9 REQUEST

1 55.4H001.S04G 1
H_DVREF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (1 of 6)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
6 of 42
SA
 A B C D E

U40B 2 OF 10
1D05V_S0
P36 AV29 3D3V_S0
RSVD#P36 SM_CK0 M_CLK_DDR0 12
P37 RSVD#P37 SM_CK1 BB23 M_CLK_DDR1 12

1
1D8V_S3 R35 BA25
RSVD#R35 SM_CK3 M_CLK_DDR2 12
N35 AV23 M_CLK_DDR3 12 R72
RSVD#N35 SM_CK4

8
7
6
5
R299 20R2F-GP AR12 24D9R2F-L-GP
M_RCOMPP RSVD#AR12 RN36
1 2 AR13 RSVD#AR13 SM_CK#0 AW30 M_CLK_DDR#0 12
AM12 BA23 M_CLK_DDR#1 12 SRN10KJ-6-GP

2
R301 20R2F-GP RSVD#AM12 SM_CK#1 U40C 3 OF 10
AN13 RSVD#AN13 SM_CK#3 AW25 M_CLK_DDR#2 12
1 2 M_RCOMPN J12 RSVD#J12 SM_CK#4 AW23 M_CLK_DDR#3 12
AR37 14 GMCH_BKLTCTL J40 N43 PEG_CMP

1
2
3
4
RSVD#AR37 L_BKLT_CTRL PEG_COMPI
AM36 BE29 M_CKE0 12,13 31 GMCH_BL_ON H39 M43

DDR MUXING
RSVD#AM36 SM_CKE0 LCTLA_CLK L_BKLT_EN PEG_COMPO
4 AL36 RSVD#AL36 SM_CKE1 AY32 M_CKE1 12,13 E39 L_CTRL_CLK 4
AM37 BD39 M_CKE2 12,13 LCTLB_DATA E40
RSVD#AM37 SM_CKE3 L_CTRL_DATA
D20 RSVD#D20 SM_CKE4 BG37 M_CKE3 12,13 14 CLK_DDC_EDID C37 L_DDC_CLK PEG_RX#0 J51
14 DAT_DDC_EDID D35 L_DDC_DATA PEG_RX#1 L51
SM_CS#0 BG20 M_CS0# 12,13 14 GMCH_LCDVDD_ON K40 L_VDD_EN PEG_RX#2 N47
SM_CS#1 BK16 M_CS1# 12,13 PEG_RX#3 T45
SM_CS#2 BG16 M_CS2# 12,13 2 1 R76 LIBG L41 LVDS_IBG PEG_RX#4 T50
H10 BE13 M_CS3# 12,13 2K4R2F-GP L_LVBG L43 U40
RSVD#H10 SM_CS#3 TPAD30 TP9 LVDS_VBG PEG_RX#5
B51 RSVD#B51 N41 LVDS_VREFH PEG_RX#6 Y44

RSVD
BJ20 RSVD#BJ20 SM_ODT0 BH18 M_ODT0 12,13 N40 LVDS_VREFL PEG_RX#7 Y40
3D3V_S0 BK22 BJ15 M_ODT1 12,13 14 GMCH_TXACLK- D46 AB51
RSVD#BK22 SM_ODT1 LVDSA_CLK# PEG_RX#8
BF19 RSVD#BF19 SM_ODT2 BJ14 M_ODT2 12,13 14 GMCH_TXACLK+ C45 LVDSA_CLK PEG_RX#9 W49

LVDS
R94 1 2 DUMMY-R2 CFG18 BH20 BE16 M_ODT3 12,13 14 GMCH_TXBCLK- D44 AD44
RSVD#BH20 SM_ODT3 LVDSB_CLK# PEG_RX#10
BK18 RSVD#BK18 14 GMCH_TXBCLK+ E42 LVDSB_CLK PEG_RX#11 AD40
R81 1 2 DUMMY-R2 CFG19 BJ18 BK31 SM_RCOMP_VOH AG46
RSVD#BJ18 SM_RCOMP_VOH SM_RCOMP_VOL PEG_RX#12
BF23 RSVD#BF23 SM_RCOMP_VOL BL31 14 GMCH_TXAOUT0- G51 LVDSA_DATA#0 PEG_RX#13 AH49
R79 1 2 DUMMY-R2 CFG20 BG23 14 GMCH_TXAOUT1- E51 AG45
RSVD#BG23 M_RCOMPP 1D8V_S3 1D8V_S3 LVDSA_DATA#1 PEG_RX#14
BC23 RSVD#BC23 SM_RCOMP BL15 14 GMCH_TXAOUT2- F49 LVDSA_DATA#2 PEG_RX#15 AG41
R307 1 2 DUMMY-R2 CFG3 BD24 BK14 M_RCOMPN DDR_VREF_S3 1KR2F-3-GP R296 C48
RSVD#BD24 SM_RCOMP# GMCH_TXAOUT3- LVDSA_DATA#3
R304 1
1 DY 2 1KR2F-3-GP 1 2 TPAD30 TP6 PEG_RX0 J50
2 DUMMY-R2 CFG4
SM_VREF#AR49 AR49 R251 14 GMCH_TXAOUT0+ G50 LVDSA_DATA0 PEG_RX1 L50
BH39 AW4 1 DY 1KR2F-3-GP
2 SM_RCOMP_VOH 14 GMCH_TXAOUT1+ E50 M47
R300 1 RSVD#BH39 SM_VREF#AW4 LVDSA_DATA1 PEG_RX2
2 DUMMY-R2 CFG5 AW20 RSVD#AW20
R254 14 GMCH_TXAOUT2+ F48 LVDSA_DATA2 PEG_RX3 U44

1
BK20 C442 C439 D47 T49
R111 1 RSVD#BK20 LVDSA_DATA3 PEG_RX4
2 DUMMY-R2 CFG6 SC2D2U6D3V3MX-1-GP R295 TPAD30 TP7 GMCH_TXAOUT3+
PEG_RX5 T41
B42 DREFCLK SCD01U16V2KX-3GP 3K01R2F-3-GP 14 GMCH_TXBOUT0- G44 W45

2
R110 1 DPLL_REF_CLK DREFCLK 3 LVDSB_DATA#0 PEG_RX6
2 DUMMY-R2 CFG7 B44 RSVD#B44 DPLL_REF_CLK# C42 DREFCLK#
DREFCLK# 3 14 GMCH_TXBOUT1- B47 LVDSB_DATA#1 PEG_RX7 W41
C44 H48 DREFSSCLK 14 GMCH_TXBOUT2- B45 AB50

PCI_EXPRESS GRAPHICS
R308 1 RSVD#C44 DPLL_REF_SSCLK DREFSSCLK 3 LVDSB_DATA#2 PEG_RX8
2 DUMMY-R2 CFG8 A35 RSVD#A35 DPLL_REF_SSCLK# H47 DREFSSCLK#
DREFSSCLK# 3
SM_RCOMP_VOL
PEG_RX9 Y48
3 B37 AC45 3
RSVD#B37 PEG_RX10

2
R306 1 2 DUMMY-R2 CFG9 B36 K44 CLK_MCH_3GPLL 3 C427 C440 14 GMCH_TXBOUT0+ E44 AC41
RSVD#B36 PEG_CLK R289 LVDSB_DATA0 PEG_RX11
B34 K45 A47 AH47

CLK
RSVD#B34 PEG_CLK# CLK_MCH_3GPLL# 3 14 GMCH_TXBOUT1+ LVDSB_DATA1 PEG_RX12
R107 1 2 DUMMY-R2 CFG10 C34 SC2D2U6D3V3MX-1-GP SCD01U16V2KX-3GP 1KR2F-3-GP A45 AG49
14 GMCH_TXBOUT2+

2
RSVD#C34 LVDSB_DATA2 PEG_RX13
PEG_RX14 AH45
R109 1 2 DUMMY-R2 CFG11 AG42

1
PEG_RX15
R113 1 2 DUMMY-R2 CFG12 AN47 DMI_TXN0 N45
DMI_RXN0 DMI_TXN1 DMI_TXN0 17 PEG_TX#0
DMI_RXN1 AJ38 DMI_TXN1 17 15 TV_DACA E27 TVA_DAC PEG_TX#1 U39
R302 1 2 DUMMY-R2 CFG133,4 CPU_SEL0 P27 AN42 DMI_TXN2 15 TV_DACB G27 U47
CFG0 DMI_RXN2 DMI_TXN3 DMI_TXN2 17 TVB_DAC PEG_TX#2
3,4 CPU_SEL1 N27 CFG1 DMI_RXN3 AN46 DMI_TXN3 17 20060908 15 TV_DACC K27 TVC_DAC PEG_TX#3 N51
R305 1 2 DUMMY-R2 CFG143,4 CPU_SEL2 N24 R50
CFG2 PEG_TX#4

TV
CFG3 C21 AM47 DMI_TXP0 F27 T42
DMI

R112 1 CFG3 DMI_RXP0 DMI_TXP0 17 TVA_RTN PEG_TX#5

2 DUMMY-R2 CFG15 CFG4 C23 CFG4 DMI_RXP1 AJ39 DMI_TXP1
DMI_TXP1 17
R106 J27 TVB_RTN PEG_TX#6 Y43
CFG5 F23 AN41 DMI_TXP2 2 150R2F-1-GP
1 TV_DACA 3D3V_S0 L27 W46
CFG5 DMI_RXP2 DMI_TXP2 17 RN35 TVC_RTN PEG_TX#7
R114 1 2 DUMMY-R2 CFG16 CFG6 N23 AN45 DMI_TXP3 W38
CFG7 CFG6 DMI_RXP3 DMI_TXP3 17 R104 TV_DCONSEL0 PEG_TX#8
G23 CFG7 5 4 M35 TV_DCONSEL0 PEG_TX#9 AD39
CFG

R108 1 2 DUMMY-R2 CFG17 CFG8 J20 AJ46 DMI_RXN0 2 150R2F-1-GP

1 TV_DACB 6 3 TV_DCONSEL1 P33 AC46
CFG9 CFG8 DMI_TXN0 DMI_RXN1 DMI_RXN0 17 PM_EXTTS#0 TV_DCONSEL1 PEG_TX#10
C20 CFG9 DMI_TXN1 AJ41 DMI_RXN1 17 7 2 PEG_TX#11 AC49
CFG10 R24 AM40 DMI_RXN2 R105 8 1 PM_EXTTS#1 AC42
CFG11 CFG10 DMI_TXN2 DMI_RXN3 DMI_RXN2 17 PEG_TX#12
L23 CFG11 DMI_TXN3 AM44 DMI_RXN3 17 2 150R2F-1-GP
1 TV_DACC
PEG_TX#13 AH39
CFG12 J23 AE49
CFG13 CFG12 DMI_RXP0 SRN10KJ-6-GP PEG_TX#14
E23 CFG13 DMI_TXP0 AJ47 DMI_RXP0 17 PEG_TX#15 AH44
CFG14 E20 AJ42 DMI_RXP1
CFG15 CFG14 DMI_TXP1 DMI_RXP2 DMI_RXP1 17 R92
K23 CFG15 DMI_TXP2 AM39 DMI_RXP2 17 PEG_TX0 M45
CFG16 M20 AM43 DMI_RXP3 2 150R2F-1-GP
1 GMCH_BLUE 15 GMCH_BLUE H32 T38
CFG17 CFG16 DMI_TXP3 DMI_RXP3 17 CRT_BLUE PEG_TX1
M24 CFG17 G32 CRT_BLUE# PEG_TX2 T46
CFG18 L32 R93 15 GMCH_GREEN K29 N50
CFG19 CFG18 CRT_GREEN PEG_TX3
N33 CFG19 2 150R2F-1-GP
1 GMCH_GREEN J29 CRT_GREEN# PEG_TX4 R51
2 CFG20 2
L35 15 GMCH_RED F29 U43
GRAPHICS VID

CFG20 CRT_RED PEG_TX5

VGA
R99 E29 W42
GFX_VID0 CRT_RED# PEG_TX6
GFX_VID0 E35 TP29 TPAD28 2 150R2F-1-GP
1 GMCH_RED
PEG_TX7 Y47
A39 GFX_VID1 Y39
GFX_VID1 TP95 TPAD28 PEG_TX8
17 PM_BMBUSY# G41 C38 GFX_VID2 15 GMCH_DDCCLK K33 AC38
PM_BM_BUSY# GFX_VID2 TP96 TPAD28 CRT_DDC_CLK PEG_TX9
4,16,36 H_DPRSTP# 2 1 H_DPRSTP#_MCH L39 B39 GFX_VID3 15 GMCH_DDCDATA G35 AD47
PM_DPRSTP# GFX_VID3 TP94 TPAD28 CRT_DDC_DATA PEG_TX10
R77 0R0402-PAD PM_EXTTS#0 L36 E36 GFX_VR_EN 15 GMCH_VSYNC 1 2 GMCH_VS E33 AC50
PM_EXT_TS#0 GFX_VR_EN TP24 TPAD28 CRT_VSYNC PEG_TX11
PM

0R2J-2-GP R252 PM_EXTTS#1 J36 R95 39R2F-GP C32 AD43

PWROK_GD PM_EXT_TS#1 GMCH_HS CRT_TVO_IREF PEG_TX12
2 1 AW49 1 2 F33 AG39
17,36 VGATE_PWRGD DY RSTIN# AV20
PWROK 15 GMCH_HSYNC
R27939R2F-GP CRT_HSYNC PEG_TX13
AE50
RSTIN# PEG_TX14
17,20 PWROK 0R0402-PAD 2 R255 1 N20 THERMTRIP#
1D25V_S0 20060919 PEG_TX15 AH43
17,21,23,28,31,33 PLT_RST1# 2 R303
1 PM_DPRSLPVR_MCH
G36 1 2 CRT_IREF
DPRSLPVR

2
100R2J-2-GP R96 1K3R2F-1-GP
20060908 R243
1

C457 AM49 1KR2F-3-GP

CL_CLK CL_CLK0 17
BJ51 AK50
SC100P50V2JN-3GP DY BK51
NC#BJ51 CL_DATA
AT43 CLPWROK_MCH1 R246 2
CL_DATA0 17
FOR Calero: 255 ohm
ME

PWROK 17,20
2

1
NC#BK51 CL_PWROK 0R0402-PAD
BK50 NC#BK50 CL_RST# AN49 CL_RST#0 17 Crestline: 1.3k ohm
BL50 NC#BL50 CL_VREF AM50 MCH_CLVREF
BL49 NC#BL49 CRT_IREF routing Trace
1

BL3 3D3V_S0
4,16,34 PM_THRMTRIP# NC#BL3 width use 20 mil
1

17,36 PM_DPRSLPVR 2 1 BL2 C404 R253

NC#BL2
NC

SCD1U10V2KX-4GP

0R0402-PAD R82 BK1 392R2F-GP

NC#BK1
1

BJ1 H35 10KR2J-3-GP

2

NC#BJ1 SDVO_CTRL_CLK R78

E1 K36
2

NC#E1 SDVO_CTRL_DATA CLK_3GPLLREQ#

A5 NC#A5 CLKREQ# G39
C51 NC#C51 ICH_SYNC# G40 MCH_ICH_SYNC# 17
B50
MISC

NC#B50
1 A50 NC#A50 1
A49 NC#A49 TEST1 A37 TEST1_GMCH
BK2 NC#BK2 TEST2 R32 TEST2_GMCH
Wistron Corporation
1

R88 R80 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

20KR2J-L2-GP 0R0402-PAD Taipei Hsien 221, Taiwan, R.O.C.

Title
2

GMCH (2 of 6)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
7 of 42
SA
 A B C D E

4 4

U40D 4 OF 10
M_A_DQ[63..0] U40E 5 OF 10
12 M_A_DQ[63..0] M_B_DQ[63..0]
M_A_DQ0 AR43 BB19 M_A_BS#0 12,13
SA_DQ0 SA_BS0 12 M_B_DQ[63..0]
M_A_DQ1 AW44 BK19 M_A_BS#1 12,13 M_B_DQ0 AP49 AY17 M_B_BS#0 12,13
M_A_DQ2 SA_DQ1 SA_BS1 M_B_DQ1 SB_DQ0 SB_BS0
BA45 SA_DQ2 SA_BS2 BF29 M_A_BS#2 12,13 AR51 SB_DQ1 SB_BS1 BG18 M_B_BS#1 12,13
M_A_DQ3 AY46 M_A_CAS# 12,13 M_B_DQ2 AW50 BG36 M_B_BS#2 12,13
M_A_DQ4 SA_DQ3 M_B_DQ3 SB_DQ2 SB_BS2
AR41 SA_DQ4 SA_CAS# BL17 AW51 SB_DQ3 M_B_CAS# 12,13
M_A_DQ5 AR45 M_A_DM[7..0] M_B_DQ4 AN51 BE17
SA_DQ5 M_A_DM[7..0] 12 SB_DQ4 SB_CAS#
M_A_DQ6 AT42 AT45 M_A_DM0 M_B_DQ5 AN50 M_B_DM[7..0]
SA_DQ6 SA_DM0 SB_DQ5 M_B_DM[7..0] 12
M_A_DQ7 AW47 BD44 M_A_DM1 M_B_DQ6 AV50 AR50 M_B_DM0
M_A_DQ8 SA_DQ7 SA_DM1 M_A_DM2 M_B_DQ7 SB_DQ6 SB_DM0 M_B_DM1
BB45 SA_DQ8 SA_DM2 BD42 AV49 SB_DQ7 SB_DM1 BD49
M_A_DQ9 BF48 AW38 M_A_DM3 M_B_DQ8 BA50 BK45 M_B_DM2
M_A_DQ10 SA_DQ9 SA_DM3 M_A_DM4 M_B_DQ9 SB_DQ8 SB_DM2 M_B_DM3
BG47 SA_DQ10 SA_DM4 AW13 BB50 SB_DQ9 SB_DM3 BL39
M_A_DQ11 BJ45 BG8 M_A_DM5 M_B_DQ10 BA49 BH12 M_B_DM4
M_A_DQ12 SA_DQ11 SA_DM5 M_A_DM6 M_B_DQ11 SB_DQ10 SB_DM4 M_B_DM5
BB47 SA_DQ12 SA_DM6 AY5 BE50 SB_DQ11 SB_DM5 BJ7
M_A_DQ13 BG50 AN6 M_A_DM7 M_B_DQ12 BA51 BF3 M_B_DM6
M_A_DQ14 SA_DQ13 SA_DM7 M_A_DQS[7..0] M_B_DQ13 SB_DQ12 SB_DM6 M_B_DM7
BH49 SA_DQ14 M_A_DQS[7..0] 12 AY49 SB_DQ13 SB_DM7 AW2
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ14 BF50 M_B_DQS[7..0]
SA_DQ15 SA_DQS0 SB_DQ14 M_B_DQS[7..0] 12
M_A_DQ16 AW43 BE48 M_A_DQS1 M_B_DQ15 BF49 AT50 M_B_DQS0
M_A_DQ17 SA_DQ16 SA_DQS1 M_A_DQS2 M_B_DQ16 SB_DQ15 SB_DQS0 M_B_DQS1
BE44 SA_DQ17 SA_DQS2 BB43 BJ50 SB_DQ16 SB_DQS1 BD50
M_A_DQ18 BG42 BC37 M_A_DQS3 M_B_DQ17 BJ44 BK46 M_B_DQS2
M_A_DQ19 SA_DQ18 SA_DQS3 M_A_DQS4 M_B_DQ18 SB_DQ17 SB_DQS2 M_B_DQS3
BE40 SA_DQ19 SA_DQS4 BB16 BJ43 SB_DQ18 SB_DQS3 BK39
M_A_DQ20 BF44 BH6 M_A_DQS5 M_B_DQ19 BL43 BJ12 M_B_DQS4
M_A_DQ21 SA_DQ20 SA_DQS5 M_A_DQS6 M_B_DQ20 SB_DQ19 SB_DQS4 M_B_DQS5
BH45 SA_DQ21 SA_DQS6 BB2 BK47 SB_DQ20 SB_DQS5 BL7
M_A_DQ22 BG40 AP3 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ21 BK49 BE2 M_B_DQS6
SA_DQ22 SA_DQS7 M_A_DQS#[7..0] 12 SB_DQ21 SB_DQS6
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ22 BK43 AV2 M_B_DQS7 M_B_DQS#[7..0]
M_B_DQS#[7..0] 12
DDR SYSTEM MEMORRY A

M_A_DQ24 SA_DQ23 SA_DQS#0 M_A_DQS#1 M_B_DQ23 SB_DQ22 SB_DQS7 M_B_DQS#0

AR40 SA_DQ24 SA_DQS#1 BD47 BK42 SB_DQ23 SB_DQS#0 AU50
3 M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ24 BJ41 BC50 M_B_DQS#1 3

DDR SYSTEM MEMORY B

M_A_DQ26 SA_DQ25 SA_DQS#2 M_A_DQS#3 M_B_DQ25 SB_DQ24 SB_DQS#1 M_B_DQS#2
AT39 SA_DQ26 SA_DQS#3 BA37 BL41 SB_DQ25 SB_DQS#2 BL45
M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ26 BJ37 BK38 M_B_DQS#3
M_A_DQ28 SA_DQ27 SA_DQS#4 M_A_DQS#5 M_B_DQ27 SB_DQ26 SB_DQS#3 M_B_DQS#4
AW41 SA_DQ28 SA_DQS#5 BH7 BJ36 SB_DQ27 SB_DQS#4 BK12
M_A_DQ29 AY41 BC1 M_A_DQS#6 M_B_DQ28 BK41 BK7 M_B_DQS#5
M_A_DQ30 SA_DQ29 SA_DQS#6 M_A_DQS#7 M_B_DQ29 SB_DQ28 SB_DQS#5 M_B_DQS#6
AV38 SA_DQ30 SA_DQS#7 AP2 BJ40 SB_DQ29 SB_DQS#6 BF2
M_A_DQ31 AT38 M_A_A[14..0] M_B_DQ30 BL35 AV3 M_B_DQS#7
SA_DQ31 M_A_A[14..0] 12,13 SB_DQ30 SB_DQS#7
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ31 BK37 M_B_A[14..0]
SA_DQ32 SA_MA0 SB_DQ31 M_B_A[14..0] 12,13
M_A_DQ33 AT13 BD20 M_A_A1 M_B_DQ32 BK13 BC18 M_B_A0
M_A_DQ34 SA_DQ33 SA_MA1 M_A_A2 M_B_DQ33 SB_DQ32 SB_MA0 M_B_A1
AW11 SA_DQ34 SA_MA2 BK27 BE11 SB_DQ33 SB_MA1 BG28
M_A_DQ35 AV11 BH28 M_A_A3 M_B_DQ34 BK11 BG25 M_B_A2
M_A_DQ36 SA_DQ35 SA_MA3 M_A_A4 M_B_DQ35 SB_DQ34 SB_MA2 M_B_A3
AU15 SA_DQ36 SA_MA4 BL24 BC11 SB_DQ35 SB_MA3 AW17
M_A_DQ37 AT11 BK28 M_A_A5 M_B_DQ36 BC13 BF25 M_B_A4
M_A_DQ38 SA_DQ37 SA_MA5 M_A_A6 M_B_DQ37 SB_DQ36 SB_MA4 M_B_A5
BA13 SA_DQ38 SA_MA6 BJ27 BE12 SB_DQ37 SB_MA5 BE25
M_A_DQ39 BA11 BJ25 M_A_A7 M_B_DQ38 BC12 BA29 M_B_A6
M_A_DQ40 SA_DQ39 SA_MA7 M_A_A8 M_B_DQ39 SB_DQ38 SB_MA6 M_B_A7
BE10 SA_DQ40 SA_MA8 BL28 BG12 SB_DQ39 SB_MA7 BC28
M_A_DQ41 BD10 BA28 M_A_A9 M_B_DQ40 BJ10 AY28 M_B_A8
M_A_DQ42 SA_DQ41 SA_MA9 M_A_A10 M_B_DQ41 SB_DQ40 SB_MA8 M_B_A9
BD8 SA_DQ42 SA_MA10 BC19 BL9 SB_DQ41 SB_MA9 BD37
M_A_DQ43 AY9 BE28 M_A_A11 M_B_DQ42 BK5 BG17 M_B_A10
M_A_DQ44 SA_DQ43 SA_MA11 M_A_A12 M_B_DQ43 SB_DQ42 SB_MA10 M_B_A11
BG10 SA_DQ44 SA_MA12 BG30 BL5 SB_DQ43 SB_MA11 BE37
M_A_DQ45 AW9 BJ16 M_A_A13 M_B_DQ44 BK9 BA39 M_B_A12
M_A_DQ46 SA_DQ45 SA_MA13 M_A_A14 M_B_DQ45 SB_DQ44 SB_MA12 M_B_A13
BD7 SA_DQ46 SA_MA14 BJ29 BK10 SB_DQ45 SB_MA13 BG13
M_A_DQ47 BB9 M_B_DQ46 BJ8 BE24 M_B_A14
M_A_DQ48 SA_DQ47 M_B_DQ47 SB_DQ46 SB_MA14
BB5 SA_DQ48 SA_RAS# BE18 M_A_RAS# 12,13 BJ6 SB_DQ47
M_A_DQ49 AY7 AY20 SA_RCVEN# M_B_DQ48 BF4 AV16 M_B_RAS# 12,13
M_A_DQ50 SA_DQ49 SA_RCVEN# TP37 TPAD30 M_B_DQ49 SB_DQ48 SB_RAS# SB_RCVEN#
AT5 SA_DQ50 BH5 SB_DQ49 SB_RCVEN# AY18 TP38 TPAD30
M_A_DQ51 AT7 BA19 M_A_WE# 12,13 M_B_DQ50 BG1
M_A_DQ52 SA_DQ51 SA_WE# M_B_DQ51 SB_DQ50
AY6 SA_DQ52 BC2 SB_DQ51 SB_WE# BC17 M_B_WE# 12,13
M_A_DQ53 BB7 M_B_DQ52 BK3
2 M_A_DQ54 SA_DQ53 M_B_DQ53 SB_DQ52 2
AR5 SA_DQ54 Place Test PAD Near to Chip BE4 SB_DQ53
M_A_DQ55 AR8 M_B_DQ54 BD3 Place Test PAD Near to Chip
M_A_DQ56 SA_DQ55 as could as possible M_B_DQ55 SB_DQ54
AR9 SA_DQ56 BJ2 SB_DQ55 ascould as possible
M_A_DQ57 AN3 M_B_DQ56 BA3
M_A_DQ58 SA_DQ57 M_B_DQ57 SB_DQ56
AM8 SA_DQ58 BB3 SB_DQ57
M_A_DQ59 AN10 M_B_DQ58 AR1
M_A_DQ60 SA_DQ59 M_B_DQ59 SB_DQ58
AT9 SA_DQ60 AT3 SB_DQ59
M_A_DQ61 AN9 M_B_DQ60 AY2
M_A_DQ62 SA_DQ61 M_B_DQ61 SB_DQ60
AM9 SA_DQ62 AY3 SB_DQ61
M_A_DQ63 AN11 M_B_DQ62 AU2
SA_DQ63 M_B_DQ63 SB_DQ62
AT2 SB_DQ63

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (3 of 6)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
8 of 42
SA
 A B C D E

VCC_NCTF + VCC=1573mA FOR VCC CORE AND VCC NCTF

1D05V_S0
U40F 6 OF 10
FOR VCC CORE 1D05V_S0
1573mA AT35 T17 1D05V_S0 U40G 7 OF 10
SCD1U10V2KX-4GP
VCC VCC_AXG_NCTF

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AT34 VCC VCC_AXG_NCTF T18
1

1
C167

C178

C142

C141
AH28 VCC VCC_AXG_NCTF T19 AB33 VCC_NCTF
AC32 VCC VCC_AXG_NCTF T21 AB36 VCC_NCTF

C108

C110
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AC31 T22 AB37
2

2
VCC VCC_AXG_NCTF VCC_NCTF

1
C129

C118

C99

C153

C112
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AK32 VCC VCC_AXG_NCTF T23 AC33 VCC_NCTF VSS_NCTF T27
AJ31 T25 AC35 T37

VCC CORE
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF
AJ28 U15 AC36 U24

2
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF
4 AH32 VCC VCC_AXG_NCTF U16 AD35 VCC_NCTF VSS_NCTF U28 4
AH31 VCC VCC_AXG_NCTF U17 AD36 VCC_NCTF VSS_NCTF V31
AH29 VCC VCC_AXG_NCTF U19 AF33 VCC_NCTF VSS_NCTF V35
AF32 VCC VCC_AXG_NCTF U20 AF36 VCC_NCTF VSS_NCTF AA19
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
U21 AH33 AB17

VSS NCTF
VCC_AXG_NCTF VCC_NCTF VSS_NCTF
1

1
C176

C192

C165
VCC_AXG_NCTF U23 AH35 VCC_NCTF VSS_NCTF AB35
VCC_AXG_NCTF U26 308 mils from Coupling CAP AH36 VCC_NCTF VSS_NCTF AD19
V16 the Edge AH37 AD37
2

VCC_AXG_NCTF VCC_NCTF VSS_NCTF

R30 VCC VCC_AXG_NCTF V17 AJ33 VCC_NCTF VSS_NCTF AF17
VCC_AXG_NCTF V19 AJ35 VCC_NCTF VSS_NCTF AF35
VCC_AXG_NCTF V20 AK33 VCC_NCTF VSS_NCTF AK17
VCC_AXG_NCTF V21 AK35 VCC_NCTF VSS_NCTF AM17
VCC_AXG_NCTF V23 AK36 VCC_NCTF VSS_NCTF AM24
Coupling CAP 370 mils from the Edge VCC_AXG_NCTF V24 AK37 VCC_NCTF VSS_NCTF AP26
Y15 AD33 AP28

VCC NCTF
VCC_AXG_NCTF VCC_NCTF VSS_NCTF
Y16 AJ36 AR15
1D8V_S3 POWER VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
Y17
Y19 VCC_AXG_NCTF + VCC_AXG=7700mA
AM35
AL33
VCC_NCTF
VCC_NCTF
VCC_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AR19
AR28
AU32 VCC_SM VCC_AXG_NCTF Y20 AL35 VCC_NCTF
AU33 VCC_SM VCC_AXG_NCTF Y21 UMA AA33 VCC_NCTF
AU35 VCC_SM VCC_AXG_NCTF Y23 AA35 VCC_NCTF
AV33 VCC_SM VCC_AXG_NCTF Y24 AA36 VCC_NCTF

SCD1U10V2KX-4GP
3138mA AW33 VCC_SM VCC_AXG_NCTF Y26 AP35 VCC_NCTF

C188
AW35 VCC_SM VCC_AXG_NCTF Y28 AP36 VCC_NCTF
C166 C169
FOR VCC SM AY35
BA32
VCC_SM VCC_AXG_NCTF Y29
AA16 SCD1U10V2KX-4GP SC4D7U10V5ZY-3GP
AR35
AR36
VCC_NCTF

2
VCC_SM VCC_AXG_NCTF VCC_NCTF
Place CAP where BA33 VCC_SM VCC_AXG_NCTF AA17 UMA UMA Y32 VCC_NCTF
LVDS and DDR2 taps BA35 VCC_SM VCC_AXG_NCTF AB16 Y33 VCC_NCTF
BB33 VCC_SM VCC_AXG_NCTF AB19 Y35 VCC_NCTF
3 BC32 AC16 Y36 3
VCC_SM VCC_AXG_NCTF VCC_NCTF
POWER
SCD1U10V2KX-4GP

BC33 VCC_SM VCC_AXG_NCTF AC17 Y37 VCC_NCTF

1

1
C134

TC8
ST100U4VBM-11-GP
C124

C123
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BC35 VCC_SM VCC_AXG_NCTF AC19 T30 VCC_NCTF

BD32 AD15 T34 A3
VCC SM

VSS SCB
VCC GFX NCTF
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB

ST220U2D5VBM-2GP
BD35 AD16 T35 B2
2

VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB

1
DY BE32 AD17 TC6 U29 C1
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB
BE33 VCC_SM VCC_AXG_NCTF AF16 UMA U31 VCC_NCTF VSS_SCB BL1
BE35 AF19 U32 BL51

2
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB
BF33 VCC_SM VCC_AXG_NCTF AH15 U33 VCC_NCTF VSS_SCB A51
-1_20070201 BF34
BG32
VCC_SM VCC_AXG_NCTF AH16
AH17
U35
U36
VCC_NCTF
VCC_SM VCC_AXG_NCTF VCC_NCTF
Place on the Edge BG33 VCC_SM VCC_AXG_NCTF AH19 V32 VCC_NCTF
BG35 AJ16 V33 1D05V_S0
VCC_SM VCC_AXG_NCTF VCC_NCTF
BH32 VCC_SM VCC_AXG_NCTF AJ17 V36 VCC_NCTF
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

BH34 VCC_SM VCC_AXG_NCTF AJ19 V37 VCC_NCTF

1

1
C127

C121

C111
SCD1U10V2KX-4GP

BH35 AK16 AT33

VSS AXM
VCC_SM VCC_AXG_NCTF VCC_AXM
BJ32 VCC_SM VCC_AXG_NCTF AK19 VCC_AXM AT31
BJ33 AL16 FOR VCC AXM NCTF AND VCC AXM AK29
2

VCC_SM VCC_AXG_NCTF VCC_AXM

BJ34 VCC_SM VCC_AXG_NCTF AL17 VCC_AXM AK24
BK32 AL19 1D05V_S0 AK23
VCC_SM VCC_AXG_NCTF VCC_AXM
BK33 VCC_SM VCC_AXG_NCTF AL20 VCC_AXM AJ26
BK34 VCC_SM VCC_AXG_NCTF AL21 VCC_AXM AJ23
BK35 VCC_SM VCC_AXG_NCTF AL23 AL24 VCC_AXM_NCTF

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BL33 VCC_SM VCC_AXG_NCTF AM15 AL26 VCC_AXM_NCTF

1
C109

C146

C145

C117

C161

C191
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AU30 VCC_SM VCC_AXG_NCTF AM16 AL28 VCC_AXM_NCTF
AM19 AM26

VSS AXM NCTF

VCC_AXG_NCTF VCC_AXM_NCTF
AM20 AM28

2
VCC_AXG_NCTF VCC_AXM_NCTF
VCC_AXG_NCTF AM21 AM29 VCC_AXM_NCTF
R20 VCC_AXG VCC_AXG_NCTF AM23 AM31 VCC_AXM_NCTF
2 2
T14 VCC_AXG VCC_AXG_NCTF AP15 AM32 VCC_AXM_NCTF
W13 VCC_AXG VCC_AXG_NCTF AP16 AM33 VCC_AXM_NCTF
W14 VCC_AXG VCC_AXG_NCTF AP17 AP29 VCC_AXM_NCTF
Y12 VCC_AXG VCC_AXG_NCTF AP19 Coupling CAP AP31 VCC_AXM_NCTF
AA20 VCC_AXG VCC_AXG_NCTF AP20 AP32 VCC_AXM_NCTF
AA23 VCC_AXG VCC_AXG_NCTF AP21 Place on the Edge AP33 VCC_AXM_NCTF
AA26 VCC_AXG VCC_AXG_NCTF AP23 AL29 VCC_AXM_NCTF
AA28
AB21
VCC_AXG VCC_AXG_NCTF AP24
AR20
VCC_AXM_NCTF + VCC_AXM=540mA AL31
AL32
VCC_AXM_NCTF
VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF
AB24 VCC_AXG VCC_AXG_NCTF AR21 AR31 VCC_AXM_NCTF
AB29 AR23 AR32
VCC GFX

VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF

AC20 VCC_AXG VCC_AXG_NCTF AR24 AR33 VCC_AXM_NCTF
AC21 VCC_AXG VCC_AXG_NCTF AR26
AC23 VCC_AXG VCC_AXG_NCTF V26
AC24 VCC_AXG VCC_AXG_NCTF V28
AC26 VCC_AXG VCC_AXG_NCTF V29
AC28 VCC_AXG VCC_AXG_NCTF Y31
AC29 VCC_AXG
AD20 VCC_AXG
AD23 VCC_AXG
AD24 AW45SM_LF1_GMCH
VCC SM LF

VCC_AXG VCC_SM_LF
AD28 VCC_AXG VCC_SM_LF BC39 SM_LF2_GMCH
1D05V_S0 AF21 BE39 SM_LF3_GMCH
VCC_AXG VCC_SM_LF
AF26 VCC_AXG VCC_SM_LF BD17 SM_LF4_GMCH
AA31 VCC_AXG VCC_SM_LF BD4 SM_LF5_GMCH
AH20 VCC_AXG VCC_SM_LF AW8 SM_LF6_GMCH
AH21 VCC_AXG VCC_SM_LF AT6 SM_LF7_GMCH
C478

C201

C221

C180

C106

C107

C103
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AH23 VCC_AXG
1

1
C185 C184 AH24 1
VCC_AXG
UMA UMA AH26 VCC_AXG
AD31
2

VCC_AXG
AJ20
AN14
VCC_AXG
VCC_AXG
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (4 of 6)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
9 of 42
-1
 A B C D E

1D05V_S0
Place on the edge
850mA
80mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
1

1
3D3V_S0

C482

C481

C480

C472

C206

C194
180ohm 100MHz C215

SC10U6D3V5KX-1GP
1D25V_S0
2 R286 1

2
0R0603-PAD

1
2 R249 1 M_VCCA_DPLLA
0R0603-PAD R83
10mA
1

1
C400 C97 U40H 8 OF 10
SCD1U10V2KX-4GP 0R0402-PAD
SC10U6D3V5KX-1GP U13
2

2
3D3V_SYNC_S0 VTT 1D25V_S0
4 J32 VCC_SYNC VTT U12 4
U11
VTT 200mA

1
2 R248 1 M_VCCA_DPLLB UMA C114 3D3V_CRTDAC_S0 A33 VCCA_CRT_DAC VTT U9

1
0R0603-PAD SCD1U10V2KX-4GP C424 UMA B33 U8
VCCA_CRT_DAC VTT
1

CRT

SC1U10V2KX-GP
C156
C401 SCD1U10V2KX-4GP U7 C119

2
VTT

SC10U6D3V5KX-1GP
C98 U5

2
SC10U6D3V5KX-1GP SCD1U10V2KX-4GP M_VCCA_DAC_BG A30 VTT
U3
2

VCCA_DAC_BG VTT
U2

2
3D3V_S0 VTT
180ohm 100MHz B32 VSSA_DAC_BG VTT U1

VTT
T13
1D25V_S0 2 R285 1M_VCCA_DAC_BG 5mA VTT
VTT T11
1D25V_SUS_MCH_PLL2 0R0603-PAD T10
UMA 80mA M_VCCA_DPLLA B49 VCCA_DPLLA
VTT
VTT T9 1D25V_S0
1

1
C423 T7
R317 80mA M_VCCA_DPLLB H49 VCCA_DPLLB
VTT
VTT T6

PLL
0R0603-PAD SCD1U10V2KX-4GP T5
50mA M_VCCA_HPLL

2
VTT

SC1U10V2KX-GP
C157
AL2 VCCA_HPLL VTT T3

1
T2
150mA M_VCCA_MPLL
2

VTT C158
120ohm 100MHz 1D8V_TXLVDS_S3
AM2 VCCA_MPLL VTT R3
R2 SC10U6D3V5KX-1GP
10mA

2
M_VCCA_HPLL VTT
1 2 R1
POWER

A LVDS
L14 FCM1608KF-121-GP VTT
UMA 1 21D8V_TXLVDS A41 VCCA_LVDS SB modify
1

1
68.00217.101 C476 C411 R266 0R0402-PAD
C483 SCD1U10V2KX-4GP SC1KP50V2KX-1GP B41 AT23 1D25V_S0
3D3V_S0 VSSA_LVDS VCC_AXD

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP AU28
2

2
VCC_AXD
VCC_AXD AU24
K50 AT29

AXD
VCCA_PEG_BG VCC_AXD

C406
VCC_AXD AT25

1
1 2 M_VCCA_MPLL C402 K49 AT30
400uA

A PEG
3 L13 FCM1608KF-121-GP SCD1U10V2KX-4GP VSSA_PEG_BG VCC_AXD 3

2
1

68.00217.101 C477 AR29

100mA

2
SCD1U10V2KX-4GP VCC_AXD_NCTF 1D8V_S3
120ohm 100MHz
1D25V_PEGPLL U51
350mA
2

VCCA_PEG_PLL
VCC_AXF B23
1D25V_S0

AXF
VCC_AXF B21
1D25V_S0 AW18 A21 C453
VCCA_SM VCC_AXF

1
C164
SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP
AV19 VCCA_SM 100mA

SC1U10V2KX-GP

SC1U10V2KX-GP
C181

C159

C172
220ohm 100MHz AU19 VCCA_SM VCC_DMI AJ50
1

1
DY AU18

2
VCCA_SM
2 R240 1 1D25V_PEGPLL TC7 AU17
0R0603-PAD ST100U4VBM-11-GP VCCA_SM
BK24 200mA
2

2
VCC_SM_CK
AT22 BK23

A SM

SM CK
VCCA_SM VCC_SM_CK
1

SCD1U10V2KX-4GP AT21 BJ24

C403 1D25V_S0 VCCA_SM VCC_SM_CK
AT19 VCCA_SM VCC_SM_CK BJ23
AT18
2

VCCA_SM 1D8V_TXLVDS_S3 1D8V_S3

AT17 VCCA_SM
SC1U10V2KX-GP
C155

C177
SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
AR17 VCCA_SM_NCTF 100mA
1

C138

AR16 VCCA_SM_NCTF VCC_TX_LVDS A43 2 R250 1

0R0603-PAD

1
3D3V_S0 3D3VTVDAC 3D3V_S0
2

BC29 C40 C410

100mA

A CK
VCCA_SM_CK VCC_HV

HV
UMA L9 BB29 B40 SC1KP50V2KX-1GP

2
VCCA_SM_CK VCC_HV
2 1
1D05V_S0

SC10U6D3V5KX-1GP
FCM1608CF-1-GP 3D3VTVDAC C25
68.00217.141 VCCA_TVA_DAC
B25 AD51
180ohm 100MHz 40mA 3D3VTVDAC C27
VCCA_TVA_DAC
VCCA_TVB_DAC
VCC_PEG
VCC_PEG W50 1200mA

TV

PEG
B27 W51
40mA VCCA_TVB_DAC VCC_PEG

1
3D3VTVDAC B28 V49 C101 C102
VCCA_TVC_DAC VCC_PEG
1

2 C452 C449 2
40mA A28 VCCA_TVC_DAC VCC_PEG V50 DY SC10U6D3V5KX-1GP
UMA UMA

2
SC2D2U6D3V3MX-1-GP SCD1U10V2KX-4GP 1D05V_S0
60mA
2

1D5V_TVDAC M32 AH50

250mA

TV/CRT
VCCD_CRT VCC_RXR_DMI

DMI
1D5V_TVDAC L29 AH51
60mA VCCD_TVDAC VCC_RXR_DMI

1
1D25V_SUS_MCH_PLL2 1D5V_TVDAC N28 C382 C100
5mA VCCD_QDAC
A7 VTTLF1
250mA

VTTLF
VTTLF
1

C444 C441 AN2 F2 VTTLF2 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP

2
VCCD_HPLL VTTLF VTTLF3
UMA UMA 100mA VTTLF AH1
SC2D2U6D3V3MX-1-GP SCD1U10V2KX-4GP 1D25V_PEGPLL U48
2

VCCD_PEG_PLL
1

1
C484

C95
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

J41 VCCD_LVDS LVDS

1
C475

C474

C473
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
H42
150mA
2

VCCD_LVDS

2
1

C438 C435
UMA UMA 1D05V_S0
SC2D2U6D3V3MX-1-GP SCD1U10V2KX-4GP D17
2

1 BAS16-1-GP 3D3V_S0
1D8V_S3

SCD1U10V2KX-4GP
10R2J-2-GP
3 1D05V_HV_S0 2 1
2 R244 11D8V_SUS_DLVDS R237

1
1D5V_S0 1D5V_TVDAC

C422
180ohm 100MHz 0R0603-PAD 2
1

C105 C393
2 R258 1 UMA UMA

2
0R0603-PAD SCD1U10V2KX-4GP SC10U6D3V5KX-1GP
2

2
1

C139 C409
1 1
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

C148 C135 Taipei Hsien 221, Taiwan, R.O.C.

DY SC1U10V2KX-GP UMA
SCD1U10V2KX-4GP Title
2

GMCH (5 of 6)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
10 of 42
SB
 5 4 3 2 1

U40I 9 OF 10

A13 VSS VSS AW24

A15 AW29 U40J10 OF 10
U40J10
VSS VSS
A17 VSS VSS AW32
A24 VSS VSS AW5
AA21 VSS VSS AW7 C46 VSS VSS W11
AA24 VSS VSS AY10 C50 VSS VSS W39
AA29 VSS VSS AY24 C7 VSS VSS W43
AB20 VSS VSS AY37 D13 VSS VSS W47
AB23 VSS VSS AY42 D24 VSS VSS W5
AB26 VSS VSS AY43 D3 VSS VSS W7
D AB28 VSS VSS AY45 D32 VSS VSS Y13 D
AB31 VSS VSS AY47 D39 VSS VSS Y2
AC10 VSS VSS AY50 D45 VSS VSS Y41
AC13 VSS VSS B10 D49 VSS VSS Y45
AC3 VSS VSS B20 E10 VSS VSS Y49
AC39 VSS VSS B24 E16 VSS VSS Y5
AC43 VSS VSS B29 E24 VSS VSS Y50
AC47 VSS VSS B30 E28 VSS VSS Y11
AD1 VSS VSS B35 E32 VSS VSS P29
AD21 VSS VSS B38 E47 VSS VSS T29
AD26 VSS VSS B43 F19 VSS VSS T31
AD29 VSS VSS B46 F36 VSS VSS T33
AD3 VSS VSS B5 F4 VSS VSS R28
AD41 VSS VSS B8 F40 VSS
AD45 VSS VSS BA1 F50 VSS
AD49 VSS VSS BA17 G1 VSS
AD5 VSS VSS BA18 G13 VSS
AD50 VSS VSS BA2 G16 VSS VSS AA32
AD8 VSS VSS BA24 G19 VSS VSS AB32
AE10 VSS VSS BB12 G24 VSS VSS AD32
AE14 VSS VSS BB25 G28 VSS VSS AF28
AE6 VSS VSS BB40 G29 VSS VSS AF29
AF20 VSS VSS BB44 G33 VSS VSS AT27
AF23 VSS VSS BB49 G42 VSS VSS AV25
AF24 VSS VSS BB8 G45 VSS VSS H50
AF31 VSS VSS BC16 G48 VSS
AG2 VSS VSS BC24 G8 VSS
AG38 VSS VSS BC25 H24 VSS
AG43 VSS VSS BC36 H28 VSS
C AG47 BC40 H4 C
VSS VSS VSS
AG50 BC51 H45
AH3
AH40
VSS
VSS
VSS
VSS BD13
BD2
J11
J16
VSS
VSS VSS
AH41
AH7
VSS
VSS VSS VSS
VSS BD28
BD45
J2
J24
VSS
VSS
VSS VSS VSS
AH9 VSS VSS BD48 J28 VSS
AJ11 VSS VSS BD5 J33 VSS
AJ13 VSS VSS BE1 J35 VSS
AJ21 VSS VSS BE19 J39 VSS
AJ24 VSS VSS BE23 K12 VSS
AJ29 VSS VSS BE30 K47 VSS
AJ32 VSS VSS BE42 K8 VSS
AJ43 VSS VSS BE51 L1 VSS
AJ45 VSS VSS BE8 L17 VSS
AJ49 VSS VSS BF12 L20 VSS
AK20 VSS VSS BF16 L24 VSS
AK21 VSS VSS BF36 L28 VSS
AK26 VSS VSS BG19 L3 VSS
AK28 VSS VSS BG2 L33 VSS
AK31 VSS VSS BG24 L49 VSS
AK51 VSS VSS BG29 M28 VSS
AL1 VSS VSS BG39 M42 VSS
AM11 VSS VSS BG48 M46 VSS
AM13 VSS VSS BG5 M49 VSS
AM3 VSS VSS BG51 M5 VSS
AM4 VSS VSS BH17 M50 VSS
AM41 VSS VSS BH30 M9 VSS
AM45 VSS VSS BH44 N11 VSS
B B
AN1 VSS VSS BH46 N14 VSS
AN38 VSS VSS BH8 N17 VSS
AN39 VSS VSS BJ11 N29 VSS
AN43 VSS VSS BJ13 N32 VSS
AN5 VSS VSS BJ38 N36 VSS
AN7 VSS VSS BJ4 N39 VSS
AP4 VSS VSS BJ42 N44 VSS
AP48 VSS VSS BJ46 N49 VSS
AP50 VSS VSS BK15 N7 VSS
AR11 VSS VSS BK17 P19 VSS
AR2 VSS VSS BK25 P2 VSS
AR39 VSS VSS BK29 P23 VSS
AR44 VSS VSS BK36 P3 VSS
AR47 VSS VSS BK40 P50 VSS
AR7 VSS VSS BK44 R49 VSS
AT10 VSS VSS BK6 T39 VSS
AT14 VSS VSS BK8 T43 VSS
AT41 VSS VSS BL11 T47 VSS
AT49 VSS VSS BL13 U41 VSS
AU1 VSS VSS BL19 U45 VSS
AU23 VSS VSS BL22 U50 VSS
AU29 VSS VSS BL37 V2 VSS
AU3 VSS VSS BL47 V3 VSS
AU36 VSS VSS C12
AU49 VSS VSS C16
AU51 VSS VSS C19
AV39 VSS VSS C28
AV48 VSS VSS C29
A AW1 VSS VSS C33 A
AW12 VSS VSS C36
AW16 VSS VSS C41
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (6 of 6)
Size Document Number Rev

5 4
www.vinafix.vn
3 2
Date: Tuesday, March 13, 2007
Biwa
Sheet
1
11 of 42
SA
 A B C D E

DM1 DM2

8,13 M_B_A[14..0]
M_B_A0 102 108 M_B_RAS# 8,13 MH1 MH2
M_B_A1 A0 RAS# MH1 MH2
101 A1 WE# 109 M_B_WE# 8,13 8,13 M_A_A[14..0]
M_B_A2 100 113 M_B_CAS# 8,13 M_A_A0 102 13 M_A_DQS0
M_B_A3 A2 CAS# M_A_A1 A0 DQS0 M_A_DQS1
M_B_A4
99 A3 M_A_A2
101 A1 DQS1 31
M_A_DQS2
M_A_DQS[7..0] 8 Place near DM1
98 A4 CS0# 110 M_CS2# 7,13 100 A2 DQS2 51
M_B_A5 97 115 M_CS3# 7,13 Place near DM2 M_A_A3 99 70 M_A_DQS3
M_B_A6 A5 CS1# M_A_A4 A3 DQS3 M_A_DQS4 M_CLK_DDR0
94 A6 98 A4 DQS4 131
M_B_A7 92 79 M_CKE2 7,13 M_CLK_DDR3 M_A_A5 97 148 M_A_DQS5
A7 CKE0 A5 DQS5

1
M_B_A8 93 80 M_CKE3 7,13 M_A_A6 94 169 M_A_DQS6 DY
A8 CKE1 A6 DQS6

1
M_B_A9 91 DY M_A_A7 92 188 M_A_DQS7 C408
M_B_A10 A9 C224 M_A_A8 A7 DQS7 M_A_DQS#0 SC10P50V2JN-4GP
105 30 M_CLK_DDR2 7 93 11

2
M_B_A11 A10/AP CK0 SC10P50V2JN-4GP M_A_A9 A8 DQS0# M_A_DQS#1 M_CLK_DDR#0
90 32 M_CLK_DDR#2 7 91 29 M_A_DQS#[7..0] 8

2
M_B_A12 A11 CK0# M_CLK_DDR#3 M_A_A10 A9 DQS1# M_A_DQS#2
4
89 A12 105 A10/AP DQS2# 49 4
M_B_A13 116 164 M_CLK_DDR3 7 M_A_A11 90 68 M_A_DQS#3 M_CLK_DDR1
M_B_A14 A13 CK1 M_CLK_DDR2 M_A_A12 A11 DQS3# M_A_DQS#4
86 A14 CK1# 166 M_CLK_DDR#3 7 89 A12 DQS4# 129

1
TPAD30 TP36 M_B_A15 84 M_A_A13 116 146 M_A_DQS#5 DY
A15 M_B_DM[7..0] 8 A13 DQS5#

1
8,13 M_B_BS#2 85 10 M_B_DM0 DY M_A_A14 86 167 M_A_DQS#6 C485
A16/BA2 DM0 M_B_DM1 C94 M_A_A15 A14 DQS6# M_A_DQS#7 SC10P50V2JN-4GP
26 TPAD30 TP34 84 186

2
DM1 M_B_DM2 SC10P50V2JN-4GP A15 DQS7# M_CLK_DDR#1
8,13 M_B_BS#0 107 52 8,13 M_A_BS#2 85

2
BA0 DM2 M_B_DM3 M_CLK_DDR#2 A16_BA2
8,13 M_B_BS#1 106 BA1 DM3 67 M_A_DM[7..0] 8
130 M_B_DM4 10 M_A_DM0
DM4 M_B_DM5 DM0 M_A_DM1
DM5 147 8,13 M_A_BS#0 107 BA0 DM1 26
M_B_DQ0 5 170 M_B_DM6 8,13 M_A_BS#1 106 52 M_A_DM2
M_B_DQ1 DQ0 DM6 M_B_DM7 BA1 DM2 M_A_DM3
8 M_B_DQ[63..0] 7 DQ1 DM7 185 DM3 67
M_B_DQ2 17 M_A_DQ0 5 130 M_A_DM4
M_B_DQ3 DQ2 M_A_DQ1 DQ0 DM4 M_A_DM5
19 DQ3 8 M_A_DQ[63..0] 7 DQ1 DM5 147
M_B_DQ4 4 195 SMBD_ICH 3,193D3V_S0 M_A_DQ2 17 170 M_A_DM6
M_B_DQ5 DQ4 SDA M_A_DQ3 DQ2 DM6 M_A_DM7
6 DQ5 SCL 197 SMBC_ICH 3,19 19 DQ3 DM7 185
M_B_DQ6 14 M_A_DQ4 4
M_B_DQ7 DQ6 M_A_DQ5 DQ4
16 DQ7 VDDSPD 199 6 DQ5 CK0 30 M_CLK_DDR0 7
M_B_DQ8 23 M_A_DQ6 14 32 M_CLK_DDR#0 7
M_B_DQ9 DQ8 M_A_DQ7 DQ6 CK0#
25 DQ9 SA0 198 16 DQ7 CK1 164 M_CLK_DDR1 7

1
M_B_DQ10 35 200 DDRB_SA0 2 1 M_A_DQ8 23 166 M_CLK_DDR#1 7
M_B_DQ11 DQ10 SA1 R135 M_A_DQ9 DQ8 CK1#
37 DQ11 25 DQ9
M_B_DQ12 20 50 10KR2J-3-GP M_A_DQ10 35 198

2
DQ12 NC#50 DQ10 SA0 3D3V_S0

SCD1U16V2ZY-2GP
M_B_DQ13 22 69 C491 M_A_DQ11 37 200
M_B_DQ14 DQ13 NC#69 M_A_DQ12 DQ11 SA1
36 DQ14 NC#83 83 20 DQ12
M_B_DQ15 38 120 M_A_DQ13 22 199
M_B_DQ16 DQ15 NC#120 M_A_DQ14 DQ13 VDD_SPD
43 DQ16 NC#163/TEST 163 36 DQ14
M_B_DQ17 45 M_A_DQ15 38 C230
DQ17 DQ15

1
SCD1U16V2ZY-2GP
M_B_DQ18 55 M_A_DQ16 43 81
M_B_DQ19 DQ18 M_A_DQ17 DQ16 VDD
57 DQ19 VDD 81 45 DQ17 VDD 82
M_B_DQ20 44 82 M_A_DQ18 55 87
NORMAL TYPE

2
M_B_DQ21 DQ20 VDD M_A_DQ19 DQ18 VDD
46 87 57 88

NORMAL TYPE
3 M_B_DQ22 DQ21 VDD M_A_DQ20 DQ19 VDD 3
56 DQ22 VDD 88 44 DQ20 VDD 95
M_B_DQ23 58 95 M_A_DQ21 46 96
M_B_DQ24 DQ23 VDD M_A_DQ22 DQ21 VDD
61 DQ24 VDD 96 56 DQ22 VDD 103
M_B_DQ25 63 103 M_A_DQ23 58 104
M_B_DQ26 DQ25 VDD M_A_DQ24 DQ23 VDD
73 DQ26 VDD 104 61 DQ24 VDD 111
M_B_DQ27 75 111 M_A_DQ25 63 112 1D8V_S3
M_B_DQ28 DQ27 VDD 1D8V_S3 M_A_DQ26 DQ25 VDD
62 DQ28 VDD 112 73 DQ26 VDD 117
M_B_DQ29 64 117 M_A_DQ27 75 118
M_B_DQ30 DQ29 VDD M_A_DQ28 DQ27 VDD
74 DQ30 VDD 118 62 DQ28
M_B_DQ31 76 M_A_DQ29 64 2
M_B_DQ32 DQ31 M_A_DQ30 DQ29 VSS
123 DQ32 VSS 3 74 DQ30 VSS 3
M_B_DQ33 125 8 M_A_DQ31 76 8
M_B_DQ34 DQ33 VSS M_A_DQ32 DQ31 VSS
135 DQ34 VSS 9 123 DQ32 VSS 9
M_B_DQ35 137 12 M_A_DQ33 125 12
M_B_DQ36 DQ35 VSS M_A_DQ34 DQ33 VSS
124 DQ36 VSS 15 135 DQ34 VSS 15
M_B_DQ37 126 18 M_A_DQ35 137 18
M_B_DQ38 DQ37 VSS M_A_DQ36 DQ35 VSS
134 DQ38 VSS 21 124 DQ36 VSS 21
M_B_DQ39 136 24 M_A_DQ37 126 24
M_B_DQ40 DQ39 VSS M_A_DQ38 DQ37 VSS
141 DQ40 VSS 27 134 DQ38 VSS 27
M_B_DQ41 143 28 M_A_DQ39 136 28
M_B_DQ42 DQ41 VSS M_A_DQ40 DQ39 VSS
151 DQ42 VSS 33 141 DQ40 VSS 33
M_B_DQ43 153 34 M_A_DQ41 143 34
M_B_DQ44 DQ43 VSS M_A_DQ42 DQ41 VSS
140 DQ44 VSS 39 151 DQ42 VSS 39
M_B_DQ45 142 40 M_A_DQ43 153 40
M_B_DQ46 DQ45 VSS M_A_DQ44 DQ43 VSS
152 DQ46 VSS 41 140 DQ44 VSS 41
M_B_DQ47 154 42 M_A_DQ45 142 42
M_B_DQ48 DQ47 VSS M_A_DQ46 DQ45 VSS
157 DQ48 VSS 47 152 DQ46 VSS 47
M_B_DQ49 159 48 M_A_DQ47 154 48
M_B_DQ50 DQ49 VSS M_A_DQ48 DQ47 VSS
173 DQ50 VSS 53 157 DQ48 VSS 53
M_B_DQ51 175 54 M_A_DQ49 159 54
M_B_DQ52 DQ51 VSS M_A_DQ50 DQ49 VSS
158 DQ52 VSS 59 173 DQ50 VSS 59
M_B_DQ53 160 60 M_A_DQ51 175 60
2
M_B_DQ54 DQ53 VSS M_A_DQ52 DQ51 VSS 2
174 DQ54 VSS 65 158 DQ52 VSS 65
M_B_DQ55 176 66 M_A_DQ53 160 66
M_B_DQ56 DQ55 VSS M_A_DQ54 DQ53 VSS
179 DQ56 VSS 71 174 DQ54 VSS 71
M_B_DQ57 181 72 M_A_DQ55 176 72
M_B_DQ58 DQ57 VSS M_A_DQ56 DQ55 VSS
189 DQ58 VSS 77 179 DQ56 VSS 77
M_B_DQ59 191 78 M_A_DQ57 181 78
M_B_DQ60 DQ59 VSS M_A_DQ58 DQ57 VSS
180 DQ60 VSS 121 189 DQ58 VSS 121
M_B_DQ61 182 122 M_A_DQ59 191 122
M_B_DQ62 DQ61 VSS M_A_DQ60 DQ59 VSS
192 DQ62 VSS 127 180 DQ60 VSS 127
M_B_DQ63 194 128 M_A_DQ61 182 128
DQ63 VSS M_A_DQ62 DQ61 VSS
VSS 132 192 DQ62 VSS 132
M_B_DQS#0 11 133 M_A_DQ63 194 133
M_B_DQS#1 DQS0# VSS DQ63 VSS
8 M_B_DQS#[7..0] 29 DQS1# VSS 138 VSS 138
M_B_DQS#2 49 139 50 139
M_B_DQS#3 DQS2# VSS NC#50 VSS
68 DQS3# VSS 144 69 NC#69 VSS 144
M_B_DQS#4 129 145 83 145
M_B_DQS#5 DQS4# VSS NC#83 VSS
146 DQS5# VSS 149 120 NC#120 VSS 149
M_B_DQS#6 167 150 163 150
M_B_DQS#7 DQS6# VSS NC#163/TEST VSS
186 DQS7# VSS 155 VSS 155
VSS 156 7,13 M_CS0# 110 CS0# VSS 156
M_B_DQS0 13 161 7,13 M_CS1# 115 161
M_B_DQS1 DQS0 VSS CS1# VSS
8 M_B_DQS[7..0] 31 DQS1 VSS 162 7,13 M_CKE0 79 CKE0 VSS 162
M_B_DQS2 51 165 7,13 M_CKE1 80 165
M_B_DQS3 DQS2 VSS CKE1 VSS
70 DQS3 VSS 168 8,13 M_A_RAS# 108 RAS# VSS 168
M_B_DQS4 131 171 8,13 M_A_CAS# 113 171
M_B_DQS5 DQS4 VSS CAS# VSS
148 DQS5 VSS 172 8,13 M_A_WE# 109 WE# VSS 172
M_B_DQS6 169 177 177
M_B_DQS7 DQS6 VSS SMBC_ICH VSS
188 DQS7 VSS 178 197 SCL VSS 178
DDR_VREF_S3 183 SMBD_ICH 195 183
VSS DDR_VREF_S3 SDA VSS
7,13 M_ODT2 114 OTD0 VSS 184 VSS 184
7,13 M_ODT3 119 OTD1 VSS 187 7,13 M_ODT0 114 ODT0 VSS 187
1 190 119 190 1
VSS 7,13 M_ODT1 ODT1 VSS
1 VREF VSS 193 VSS 193
2 VSS VSS 196 1 VREF VSS 196
1

DY
1

C86 C85 DY C87

202 GND GND 201
C88
201 GND GND 202
Wistron Corporation
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

SC4D7U6D3V3KX-GP

MH1 MH2
SCD1U16V2ZY-2GP
2

MH1 MH2 Taipei Hsien 221, Taiwan, R.O.C.

SKT-SODIMM20020U3GP

62.10017.661 Title
DDR2-200P-22-GP-U1

62.10017.A61 2nd source: 62.10017.A51 High 5.2mm DDR2 Socket

www.vinafix.vn
Size Document Number Rev
High 9.2mm 2nd source: 62.10017.A41 Biwa SA
Date: Tuesday, March 13, 2007 Sheet 12 of 42
A B C D E
 A B C D E

PARALLEL TERMINATION Decoupling Capacitor

DDR_VREF_S0 Put decap near power(0.9V) and pull-up resistor

RN40
8 1 M_B_A5 Put decap near power(0.9V)
M_B_A8 DDR_VREF_S0
7
6
2
3 M_B_A9 and pull-up resistor
4 5 4 M_B_A12 4

SRN56J-5-GP

1
C464 C182 C132 C460 C162 C197 C446 C163 C183 C455 C429

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
1 2 M_CKE1 7,12
1 R288 2 56R2J-4-GP M_CKE3 7,12

2
1 R100 2 56R2J-4-GP M_A_A[14..0]
M_ODT1 7,12 M_A_A[14..0] 8,12
1 R115 2 56R2J-4-GP M_CKE2 7,12
R290 56R2J-4-GP M_B_A[14..0]
M_B_A[14..0] 8,12
1 2 M_CKE0 7,12
1 R101 2 56R2J-4-GP M_B_BS#2 8,12
R293 56R2J-4-GP
RN42
8 1 M_B_BS#0 8,12
7 2 M_B_A10
6 3 M_B_A1
5 4 M_B_A3

1
C461 C432 C466 C426 C469 C122 C204 C209 C196 C465 C128

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
RN12

2
8 1 M_B_A13
7 2 M_ODT2 7,12
6 3 M_CS2# 7,12
5 4 M_B_RAS# 8,12
SRN56J-5-GP

RN9
8 1 M_B_A0
3 3
7
6
2
3 M_B_A4
M_B_BS#1 8,12 1D8V_S3 Place these Caps near DM1
5 4 M_B_A2

SRN56J-5-GP

1
C120 C200 C160 C190 C144

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
RN7
8 1 M_B_A11

2
7 2 M_B_A7
6 3 M_B_A6
5 4 M_B_A14

SRN56J-5-GP

RN44
8 1 M_ODT3 7,12
7 2 M_CS3# 7,12
6 3 M_B_CAS# 8,12
5 4 M_B_WE# 8,12

1
C171 C186 C113 C173

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP

2
RN43
8 1 M_A_RAS# 8,12
7 2 M_CS0# 7,12
6 3 M_ODT0 7,12
5 4 M_A_A13

SRN56J-5-GP
2 2

RN41
8 1 M_A_A4
7 2 M_A_A2
M_A_A0
6
5
3
4 1D8V_S3 Place these Caps near DM2
M_A_BS#1 8,12
SRN56J-5-GP

1
RN11 C189 C198 C147 C205 C116

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
8 1 M_A_BS#0 8,12
7 2 M_A_WE# 8,12
2

2
6 3 M_A_CAS# 8,12
5 4 M_CS1# 7,12
SRN56J-5-GP

RN8
8 1 M_A_A12
7 2 M_A_BS#2 8,12
6 3 M_A_A9
5 4 M_A_A5
1

1
C174 C175 C168 C136
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
2

2
RN38
8 1 M_A_A14
7 2 M_A_A11
1 6 3 M_A_A7 1
5 4 M_A_A6

SRN56J-5-GP
Wistron Corporation
RN10 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8 1 M_A_A8 Taipei Hsien 221, Taiwan, R.O.C.
7 2 M_A_A1
6 3 M_A_A3 Title
M_A_A10
5 4
DDR2 Termination Resistor
SRN56J-5-GP Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
13 of 42
SB
 LED
Power: FRONT_PWRLED# 1 R5
SB modify

2 PWR_LED#_1
100R2J-2-GP
3
LED1
1
3D3V_S0

-1 modify 02/01 brightness control to KBC LCDVDD_S0 Green : S0 -1 modify 01/25

STBY_LED#_2 3D3V_S5
Orange : S3 4 2
LCD1
3D3V_S0 3D3V_S0 DY Orange Blinking : Enter S4 83.00195.I70

1
41 C348 DY C350 C351 FRONT_PWRLED# 1 R428 2 FRONT_PWRLED#_1 LED-GY-14-GP
2 1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 100R2J-2-GP
RN30 SC10U10V5ZY-1GP -1 modify 02/08 EC67

2
1
2
3
4
17 USBPN6 2 3 USB_6- 4 3 LED4 SCD1U10V2KX-4GP
17 USBPP6 1 4 USB_6+ 6 5 STBY_LED# R19 1100R2J-2-GP
2 STBY_LED#_1 4 2 2 1
SRN4K7J-10-GP 8 7 R335 1100R2J-2-GP
2 STBY_LED#_2 DY
RN31 SRN0J-6-GP 10 9 GMCH_TXAOUT2- 7 CHARGE_LED# R336 1100R2J-2-GP
2 CHARGE_LED#_1 3D3V_S0
3D3V_CCD_PWR 12 11 GMCH_TXAOUT2+ 7 DC_BATFULL# R436 1100R2J-2-GP
2 DC_BATFULL#_1 3 1 EC66
14 13 GMCH_TXAOUT1- 7 SCD1U10V2KX-4GP
8
7
6
5

16 15 GMCH_TXAOUT1+ 7 ODD CHANNEL 83.00195.I70 2 1

7 CLK_DDC_EDID Q24 LED-GY-14-GP
7 DAT_DDC_EDID 18 17 GMCH_TXAOUT0- 7
GND 2
DY
20 19 GMCH_TXAOUT0+ 7 on Front Panel
22 21 GMCH_TXACLK- 7
7 GMCH_BKLTCTL 1 R202DY2 0R2J-2-GP 24 23 GMCH_TXACLK+ 7 3 OUT FRONT_PWRLED#
1 R201 2 0R2J-2-GP BRIGHTNESS_LCD 26 25 GMCH_TXBOUT2- 7 R2
31 BRIGHTNESS R1
BLON_OUT 28 27 GMCH_TXBOUT2+ 7 IN 1
31 BLON_OUT 31 FRONT_PWRLED
30 29 GMCH_TXBOUT1- 7 84.00143.B1K -1 modify 01/25
32 31 GMCH_TXBOUT1+ 7 EVEN CHANNEL CHDTC143ZUPT-GP SB modify
2

C344 EC39 DCBATOUT 34 33 GMCH_TXBOUT0- 7 Q20

SC100P50V2JN-3GP

R261 F2 36 35 GMCH_TXBOUT0+ 7 GND 2

3D3V_S5
SCD1U50V3ZY-GP

69.43001.111
1 2 38 37 GMCH_TXBCLK- 7
1

10KR2J-3-GP DY FUSE-3A32V-8-GP 40 39 GMCH_TXBCLK+ 7 3 OUT STBY_LED# LED2 Charger:

1
1

1
C343 EC38 EC37 42 R2 CHARGE_LED#_1 4 2
1

R1 OFF : Battery or DC only

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
IN 1
31 STBY_LED 84.00143.B1K Orange : Charging
2
2

2
SC10U35V0ZY-GP

DY DY ACES-CONN40A-2GP CHDTC143ZUPT-GP DC_BATFULL#_1 3 1

20.F0993.040 Q17 Orange Blink : Battery low
GND 2 83.00195.I70
2nd source: 20.F1013.040 LED-GY-14-GP
3 OUT CHARGE_LED# on Front Panel
TOP VIEW 31 CHG_LED
IN 1
R2
R1
84.00143.B1K
2 40 CHDTC143ZUPT-GP
Q18 CHARGE_LED# DY1 2

1
LCD 39 31 DC_BATFULL
GND 2

IN 1
R2
R1
3 OUT DC_BATFULL#
DC_BATFULL# EC71
FRONT_PWRLED#EC68
STBY_LED# EC70
EC65
DY1
DY1
DY1
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP

84.00143.B1K
CHDTC143ZUPT-GP
Q19 5V_S0
GND 2
LED6 LED-B-27-U-GP
3 OUT BT_LED# 1 R420 2 BLT_LED#_1 2 1
3D3V_CCD_PWR_1

R2 510R2J-1-GP 83.00190.P70
IN R1
31 BT_LED 1
84.00143.B1K
on Front Panel
Layout 40 mil CHDTC143ZUPT-GP LED7 3D3V_S0
Layout 40 mil 3D3V_S0 LED-Y-64-GP
3D3V_CCD_PWR 1 R568 2 WLAN_LED#_2 1 R419 2 WLAN_LED#_1 K A
FUSE-1A6V-2-GP 28 WLAN_LED# 33R2J-2-GP 75R2J-1-GP 83.00190.S7A
F1 1 2 1 R203 2 -1 modify 01/25
69.50007.721 0R0402-PAD on Front Panel

D
U35 DY
Q14 BT_LED# EC69 1 2
1 5 2N7002-11-GP SC100P50V2JN-3GP
VOUT VIN
2 GND DY 31 WLAN_TEST_LED G 84.27002.W31 DY
1

C346 3 4 CCD_ON 31 WLAN_LED# EC64 1 2

NC#3 EN/EN# SC100P50V2JN-3GP
SCD1U16V2ZY-2GP

S
1

-1 modify 02/01
2

RT9711-APBG-GP C347
74.09711.A7F SCD1U10V2KX-4GP
2

SB modify LED BD 3D3V_S0

1
2nd source: 20.K0185.008
Layout 40 mil LEDB1

1
LCDVDD_S0 9
U36 3D3V_S0 EC44
1
SCD1U10V2KX-4GP 8
Layout 40 mil

2
1 9 2

C349 7 GMCH_LCDVDD_ON
2
3
IN#1
OUT
EN
GND
IN#8
IN#7
8
7
Slide SWITCH 3
4 CAP_LED# 31
1

C345
SC1U10V3ZY-6GP

4 GND IN#6 6 5 NUM_LED# 31

1

C352 RN57
SC1U10V3ZY-6GP

IN#5 5 6 MEDIA_LED# 21
1 8 3D3V_S0 7
SCD1U16V2ZY-2GP
2

2 7 8 EC101 EC102 EC103

2

1
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
G5281RC1U-GP 31 BT_BTN# 3 6 10
74.05281.093 31 WIRELESS_BTN# 4 5
ACES-CON8-5-GP

2
SRN10KJ-6-GP 20.K0228.008

BlueTooth ON/OFF Wireless ON/OFF

BTBTN1 WLBTN1
4 1 1 4
3 1 55.4H001.S04G -1 modify
2 2
3 3
5 5
Wistron Corporation
SW-SLIDE58-GP SW-SLIDE58-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
62.40018.331 62.40018.331 Taipei Hsien 221, Taiwan, R.O.C.

Edge Trigger Title

2nd source: 62.40068.001 LCD CONN & LED

Size Document Number Rev
-1 modify 01/31 for EMI Biwa -1

www.vinafix.vn Date: Tuesday, March 13, 2007 Sheet 14 of 42

 A B C D E

11 6
D3
5V_S0 CRT I/F & CONNECTOR 1
1 12 7

1
CRT_R 3
DY
C26 CRT1 2
Layout Note:
DY SCD1U16V2ZY-2GP 5V_CRT_S0
17
13 8

2
Place these resistors
close to the CRT-out
Ferrite bead impedance: 47 ohm@100MHz 2
connector BAV99-5-GP 11
6
1 CRT_R
3
3D3V_S0
7 GMCH_RED
L1 1 2
FCM1608C-470T05GP
CRT_R 83.00099.T11
D4
14 9
7
4 1 DAT_DDC1_5 12 2 CRT_G 4 4

1
L2 1 2 CRT_G 8
7 GMCH_GREEN 15 10

1
FCM1608C-470T05GP CRT_G 3 DY C58 CRT_HSYNC1 13 3 CRT_B R22
9 5V_CRT_S0 10KR2J-3-GP
5

1
SC100P50V2JN-3GP
L3 1 2 CRT_B 2 C8 CRT_VSYNC1 14 4

2
7 GMCH_BLUE FCM1608C-470T05GP

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP
10

2
1

1
SC18P50V2JN-1-GP
C12 C14 C21 C11 C13 C20 BAV99-5-GP C6 CLK_DDC1_5 15 5 CRT_DEC_CRT 2 R24 1
CRT_DEC# 31

2
R10 R11 R13 83.00099.T11 0R0402-PAD

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP

1
SC18P50V2JN-1-GP
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
D5 C55 16 EC114

1
SC1KP50V2KX-1GP

SCD1U10V2KX-4GP
1
VIDEO-15-75-GP-U R23

SC100P50V2JN-3GP
2

1
CRT_B 3 20.20715.015 C29 0R2J-2-GP
DY

2
2nd source: 20.20716.015 DY
-1 modify for SIV 2

2
BAV99-5-GP
Layout Note: 83.00099.T11
* Must be a ground return path between this ground and the ground on
the VGA connector. 5V_S0 -1 modify for EMI
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

2
D7
BAS16-1-GP

5V_CRT_S0
3D3V_S0

3
3 3
Hsync & Vsync level shift

8
7
6
5
5V_S0
RN5
SRN10KJ-6-GP

1
C10 DDC_CLK & DATA level shift

1
2
3
4
2 SCD1U16V2ZY-2GP

3D3V_S0
14

2 3 CRT_HSYNC_R 2 R9 1 CRT_HSYNC1
7 GMCH_HSYNC 0R0402-PAD
D8
U3A
TSAHCT125PW-GP
14

7
4

4 3 DAT_DDC1_5
7 GMCH_DDCDATA
5 6 CRT_VSYNC_R 2 R8 1 CRT_VSYNC1 5 2
7 GMCH_VSYNC 0R0402-PAD
1

U3B 2N7002DW-1-GP
SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

6 1
TSAHCT125PW-GP
7

C7
2

C9 DY DY 84.27002.D3F
7 GMCH_DDCCLK
CLK_DDC1_5
2 2

TV CONN DY
1
C580
2 SC33P50V2JN-3GP
SB modify for SIV
L7
1 2 LUMA_1 TVOUT1 5V_S0
7 TV_DACB FCM1608K-151T06-GP
1

C415 C420 4 2 D19

SC6P50V2CN-1GP SC6P50V2CN-1GP LUMA NC#2
R265 6 1
CRMA

1
150R2F-1-GP 7 1 DY
2

COMP GND LUMA_1 C414

C600 GND 3 3 DY SCD1U16V2ZY-2GP
DY 8
2

2
GND
1 2 SC33P50V2JN-3GP 5 NC#5 GND 9 2

L10 MINDIN7-19-GP-U2 BAV99-5-GP

1 2 CRMA_1 83.00099.T11
7 TV_DACC FCM1608K-151T06-GP 22.10021.H61 D21
1

C436 C428 1
R291 SC6P50V2CN-1GP SC6P50V2CN-1GP
150R2F-1-GP COMP_1 3 DY
2

C601
DY 2
2

1 2 SC33P50V2JN-3GP
BAV99-5-GP
1
L8 83.00099.T11 1
1 2 COMP_1 D24
7 TV_DACA FCM1608K-151T06-GP 1
1

C421 C425
R270 SC6P50V2CN-1GP SC6P50V2CN-1GP CRMA_1 3 DY Wistron Corporation
150R2F-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

2 Taipei Hsien 221, Taiwan, R.O.C.

2

BAV99-5-GP Title
Ferrite bead impedance: 150 ohm@100MHz 100mA(min) design recommend 83.00099.T11
CRT/TV Connector
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
15 of 42
-1
 A B C D E

1 2 RCT_X1
C249 SC15P50V2JN-2-GP

SB modify
CL=12.5pF 10PPM

1
R159
2 RTC_AUX_S5 X5 10MR2J-L-GP
D26 X-32D768KHZ-38GPU
3D3V_AUX_S5 BAS16-1-GP 3 82.30001.691

2
1
4 C270 4

1
1
SC1U10V3ZY-6GP

2
U49A 1 OF 6 LPC_LAD[0..3]
RTC circuitry
2 1 2
LPC_LAD[0..3] 31,33
D29 C252 SC15P50V2JN-2-GP AG25 E5 LPC_LAD0
RTC1 BAS16-1-GP RCT_X2 RTCX1 FWH0/LAD0 LPC_LAD1
3 AF24 RTCX2 FWH1/LAD1 F5
G8 LPC_LAD2
RTC_BAT FWH2/LAD2
PWR 1 1 2RTC_BAT_R
1 R373 1 2 20KR2J-L2-GP RTC_RST# AF23 RTCRST# FWH3/LAD3 F6 LPC_LAD3
2 1KR2J-1-GP

RTC
GND R374 INTRUDER# AD22
NP1 NP1 1 2 INTRUDER# FWH4/LFRAME# C4 LPC_LFRAME# 31,33

LPC
NP2 R168 1MR2J-1-GP
NP2
2

1
INTVRMEN AF25 G9 LDRQ0# 31,33
C524 C520 LAN100_SLP INTVRMEN LDRQ0# 3D3V_LDRQ1_S0 1D05V_S0
AD21 E6
BAT-CON2-1-GP DY SCD1U16V2ZY-2GP SC1U10V3ZY-6GP LAN100_SLP LDRQ1#/GPIO23 TP78 TPAD30
1

2
62.70001.011 B24 AF13 KA20GATE 31
GLAN_CLK A20GATE

1
A20M# AG26 H_A20M# 4
TPAD30 TP80 LAN_RSTYNC D22 R161
LAN_RSTSYNC H_DPRSTP# 56R2J-4-GP
DPRSTP# AF26 H_DPRSTP# 4,7,36

LAN/GLAN
C21 LAN_RXD0 DPSLP# AE26 H_DPSLP# 4
B21

2
LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# 4

D21 LAN_TXD0 CPUPWRGD/GPIO49 AG29 H_PWRGD 4,34,42

3D3V_S5 E20 LAN_TXD1
C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 4
1D5V_S0
1 2 GLAN_DOCK# AH21 GLAN_DOCK#/GPIO13 INIT# AE24 H_INIT# 4
R338 10KR2J-3-GP 1D05V_S0
GLAN_COMP place within 500 mil of ICH8M INTR AC20 H_INTR 4
3 1 2 GLAN_COMP D25 GLAN_COMPI RCIN# AH14 KBRST# 31
3
1 2 R187 24D9R2F-L-GP C25

CPU
22 ACZ_BTCLK_MDC GLAN_COMPO

2
R341 22R2J-2-GP AD23 H_NMI 4
ACZ_BIT_CLK NMI R352
29 ACZ_BITCLK 1 2 AJ16 HDA_BIT_CLK SMI# AG28 H_SMI# 4
R342 22R2J-2-GP AJ15 56R2J-4-GP
ACZ_SYNC_R HDA_SYNC
22,29 ACZ_SYNC 1 2 STPCLK# AA24 H_STPCLK# 4 R354
R343 22R2J-2-GP AE14

1
ACZ_RST#_R HDA_RST# H_THERMTRIP_R
1 2 AE27 1 2
22,29 ACZ_RST#
29 ACZ_SDATAIN0 R333 0R0402-PAD AJ17
THRMTRIP# DY PM_THRMTRIP# 4,7,34
HDA_SDIN0 ICH_TP8 TP63 TPAD30
AH17 AA23

IHDA
22 ACZ_SDATAIN1 HDA_SDIN1 TP8 24D9R2F-L-GP
ACZ_SDIN2 AH15
TPAD30 TP53 ACZ_SDIN3 HDA_SDIN2
AD13 HDA_SDIN3 DD0 V1 IDE_PDD0 21
3D3V_S0 TPAD30 TP60 U2
DD1 IDE_PDD1 21
22,29 ACZ_SDATAOUT R332 1 2 ACZ_SDATAOUT_R AE13 V3 IDE_PDD2 21
39R2J-L-GP HDA_SDOUT DD2 Layout Note: R133 needs to placed
DD3 T1 IDE_PDD3 21
1 DY 2 HDA_DOCK_EN#_R AE10 V4 within 2" of ICH7, R334 must be placed
HDA_DOCK_EN#/GPIO33 DD4 IDE_PDD4 21
TPAD30 TP56 HDA_DOCK_RST# R346 10KR2J-3-GP AG14 T5 within 2" of R169 w/o stub.
HDA_DOCK_RST#/GPIO34 DD5 IDE_PDD5 21
DD6 AB2 IDE_PDD6 21
21 SATA_LED# AF10 SATALED# DD7 T6 IDE_PDD7 21
DD8 T3 IDE_PDD8 21
21 SATA_RXN0 1 2 SATA_RXN0_C AF6 R2 IDE_PDD9 21
SATA0RXN DD9
21 SATA_RXP0 SATAC494 1 2 SC3900P50V3KX-GP SATA_RXP0_C AF5 SATA0RXP DD10 T4 IDE_PDD10 21
21 SATA_TXN0 SATAC495 1 2 SC3900P50V3KX-GP SATA_TXN0_C AH5 SATA0TXN DD11 V6 IDE_PDD11 21
21 SATA_TXP0 SATAC529 1 2 SC3900P50V3KX-GP SATA_TXP0_C AH6 SATA0TXP DD12 V5 IDE_PDD12 21
SATAC533 SC3900P50V3KX-GP
DD13 U1 IDE_PDD13 21

IDE
AG3 SATA1RXN DD14 V2 IDE_PDD14 21
AG4 SATA1RXP DD15 U6 IDE_PDD15 21
AJ4

SATA
SATA1TXN
AJ3 SATA1TXP DA0 AA4 IDE_PDA0 21
2 2
DA1 AA1 IDE_PDA1 21
AF2 SATA2RXN DA2 AB3 IDE_PDA2 21
AF1 SATA2RXP
AE4 Y6 3D3V_AUX_S5 3D3V_S0
SATA2TXN DCS1# IDE_PDCS1# 21
AE3 Y5 IDE_PDCS3# 21 RN39
SATA2TXP DCS3# KBC_THERMALTRIP# 1 8
3 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_PDIOR# 21 2 7
3 CLK_PCIE_SATA AC6 W3 IDE_PDIOW# 21 KA20GATE 3 6
SATA_CLKP DIOW# KBRST#
DDACK# Y2 IDE_PDDACK# 21 4 5
SATARBIAS AG1 Y3 INT_IRQ14 21
SATARBIAS# IDEIRQ SRN10KJ-6-GP
1 2 AG2 SATARBIAS IORDY Y1 IDE_PDIORDY 21
1D05V_S0 R349 24D9R2F-L-GP W5
DDREQ IDE_PDDREQ 21
Place within 500 mils of
1

ICH8 ball ICH8-M-1-GP-U

R569
2K2R2J-2-GP
Change to 24.9 1% ohm
C602 when use SATA HD
2

1 2
B

SCD1U16V2ZY-2GP

PM_THRMTRIP# E C KBC_THERMALTRIP# 31
Q31 RTC_AUX_S5 RTC_AUX_S5
MMBT3904-3-GP
1

1 55.4H001.S04G 1
R351 R167
-1 modify 02/05 Thermal trip 330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5 Wistron Corporation
2

INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

integrated VccLan1_05VccCL1_05
R350 R166 Title
DY 0R2J-2-GP DY 0R2J-2-GP LAN100_SLP High=Enable Low=Disable
ICH8-M (1 of 4)
Size Document Number Rev

www.vinafix.vn
2

Biwa SB
Date: Tuesday, March 13, 2007 Sheet 16 of 42
A B C D E
 A B C D E

U49D 4 OF 6
RN20
U49C3 OF 6 AJ26 AJ12 SATA0GP SATA2GP 1 8 3D3V_S0
25,26 PCI_AD[31..0] 19,23,28 SMB_CLK SMBCLK SATA0GP/GPIO21

GPIO
AD19 AJ10 SATA1GP SATA1GP 2 7

SATA
19,23,28 SMB_DATA SMBDATA SATA1GP/GPIO19

SMB
PCI_AD0 D20 A4 PCI_REQ#0 SMB_LINK_ALERT# AG21 AF11 SATA2GP ICH_GPIO37 3 6
PCI_AD1 E19
AD0
AD1
PCI REQ0#
GNT0# D7 PCI_GNT#0
PCI_REQ#0 26
PCI_GNT#0 26 AC17
LINKALERT#
SMLINK0
SATA2GP/GPIO36
GPIO37 AG11 ICH_GPIO37 SATA0GP 4 5
PCI_AD2 D19 E18 PCI_REQ#1 AE19 SRN8K2J-1-GP
PCI_AD3 AD2 REQ1#/GPIO50 PCI_GNT#1 TP82 TPAD30 SMLINK1
A20 AD3 GNT1#/GPIO51 C18 CLK14 AG9 CLK_ICH14 3
PCI_AD4 PCI_REQ#2 -1 modify for ASF PM_RI#

CLOCKS
D17 AD4 REQ2#/GPIO52 B19 AF17 RI# CLK48 G5 CLK48_ICH 3
PCI_AD5 A21 F18 PCI_GNT#2 TP74 TPAD30
AD5 GNT2#/GPIO53
PCI_AD6
PCI_AD7
PCI_AD8
A19
C19
AD6
AD7
GNT3#/GPIO55
REQ3#/GPIO54
C10
A11
PCI_GNT#3
PCI_REQ#3 TP84 TPAD30
-1 2/16 modify
-->33 PM_SUS_STAT#
PM_SUS_STAT#
DBRESET#
F4
AD15
SUS_STAT#/LPCPD#
SYS_RESET#
SUSCLK D3 PM_SUS_CLK 20

A18 AD8 SLP_S3# AG23 PM_SLP_S3# 28,31,34,38,39

4 PCI_AD9 B16 C17 PCI_C/BE#0 25 7 PM_BMBUSY# AG12 AF21 PM_SLP_S4# 31,38,39 4
PCI_AD10 AD9 C/BE0# BMBUSY#/GPIO0 SLP_S4# SLPS5#
A12 AD10 C/BE1# E15 PCI_C/BE#1 25 SLP_S5# AD18
PCI_AD11 E16 F16 PCI_C/BE#2 25 SMB_ALERT# AG22 TP61 TPAD30
PCI_AD12 AD11 C/BE2# SMBALERT#/GPIO11 S4_STATE#
A14 AD12 C/BE3# E17 PCI_C/BE#3 25 S4_STATE#/GPIO26 AH27
PCI_AD13 G16 3 PM_STPPCI# AE20 TP52 TPAD30
PCI_AD14 AD13 STP_PCI# R344
A15 AD14 IRDY# C8 PCI_IRDY# 26 3 PM_STPCPU# AG18 STP_CPU# PWROK AE23 PWROK 7,20
PCI_AD15 B6 D9 PCI_PAR 25 100KR2J-1-GP
AD15 PAR

SYSGPIO
PCI_AD16 C11 G6 PCIRST#
1 2 R193 PCIRST1# 26 AH11 AJ14 PM_DPRSLPVR_R 2 1 PM_DPRSLPVR 7,36
AD16 PCIRST# 26,31,33 PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16
PCI_AD17 A9 D16 56R2J-4-GP PCI_DEVSEL# 26 R345 1 2DY
PCI_AD18 AD17 DEVSEL# PM_BATLOW#_R 100KR2J-1-GP
D11 A7 AE17 AE21

POWER MGT
AD18 PERR# PCI_PERR# 26 23,28 PCIE_WAKE# WAKE# BATLOW#
PCI_AD19 B12 A17 AF12 D11
AD19 FRAME# PCI_FRAME# 26 26,31,33 INT_SERIRQ SERIRQ
PCI_AD20 C12 B7 PCI_LOCK# 20 THRM# AC13 C2 PWRBTN#_ICH 1 BAS16-1-GP PM_PWRBTN# 31
PCI_AD21 AD20 PLOCK# THRM# PWRBTN#
D10 AD21 SERR# F10 PCI_SERR# 26
PCI_AD22 C7 C16 PCI_STOP# 26 7,36 VGATE_PWRGD AJ20 AH20 PLT_RST1# 3
PCI_AD23 AD22 STOP# VRMPWRGD LAN_RST#
F13 AD23 TRDY# C9 PCI_TRDY# 26 1 2
PCI_AD24 E11 3D3V_S0 R340 100KR2J-1-GP
1 2 ICH_TP7 AJ22 AG27 RSMRST#_SB 2
PCI_AD25 AD24 R331DY 0R2J-2-GP TP7 RSMRST#
E13 AD25 PLTRST# AG24 PLT_RST#_R 2 R339 1 PLT_RST1# 7,21,23,28,31,33
PCI_AD26 E12 B10 0R0402-PAD PCLK_ICH 3 22 FP_ID AJ8 E1 CLK_PWRGD 3
AD26 PCICLK TACH1/GPIO1 CK_PWRGD

2
PCI_AD27
PCI_AD28
PCI_AD29
D8
A6
AD27
AD28
PME# G7 ICH_PME#_1
2 1ICH_PME#
R183 0R0402-PAD
TP69 TPAD30
R157
10R2J-2-GP
31
-1 modify
ECSCI#_1 --> CLK_SEL

ECSMI#
AJ9
AH9
TACH2/GPIO6
TACH3/GPIO7 CLPWROK E3 PWROK 7,20 3D3V_S0
E8 AE16

GPIO
PCI_AD30 AD29 GPIO8 PM_SLP_M#
PCI_AD31
D6 AD30 RTM 31
ECSWI# AC19 GPIO12 SLP_M# AJ25 TP49 TPAD30
A3 31 PSW_CLR# AG8

1
AD31 TACH0/GPIO17

1
UMA AH12 F23
TPAD30 TP51 GPIO18 CL_CLK0 CL_CLK0 7
CLK_SEL SBGPIO20
INT_PIRQA# F9
Interrupt I/F F8 INT_PIRQE# TP118 SCLOCK
AE11
AG10
GPIO20 CL_CLK1 AE18
R381
PIRQA# PIRQE#/GPIO2 TPAD30 SCLOCK/GPIO22 3K24R2F-GP
26 INT_PIRQB# B5 G11 INT_PIRQF# 26 AH25 F22 CL_DATA0 7

Controller Link
PIRQB# PIRQF#/GPIO3 QRT_STATE0/GPIO27 CL_DATA0

2
INT_PIRQC# C5 F12 INT_PIRQG# 26 AD16 AF19

2
INT_PIRQD# PIRQC# PIRQG#/GPIO4 INT_PIRQH# R422 QRT_STATE1/GPIO28 CL_DATA1
A10 PIRQD# PIRQH#/GPIO5 B3 -1 modify AG13 SATACLKREQ#/GPIO35
3 10R2J-2-GP AF9 D24 CL_VREF0_ICH 3
32 PCB_VER0 SLOAD/GPIO38 CL_VREF0
ICS -->
32 PCB_VER1 AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23 CL_VREF1_ICH

1
3D3V_S5

SCD1U10V2KX-4GP
ICH8-M-1-GP-U SDATAOUT1 AD10

1
TPAD30 TP57 SDATAOUT1/GPIO48 R380
RP6 3D3V_S0 AJ23 CL_RST#0 7
PCI_IRDY# CL_RST# 453R2F-1-GP
1 10 RP5 3D3V_S0 29 ACZ_SPKR AD9 SPKR

C531
PCI_PERR# 2 9 INT_PIRQH# INT_PIRQD# 1 10 AJ27 CLGPIO0 TP46 TPAD30
PCI_LOCK# PCI_REQ#0 INT_PIRQA# INT_PIRQG# CLGPIO0/GPIO24
3 8 2 9 7 MCH_ICH_SYNC# AJ13 AJ24 CLGPIO1 TP50 TPAD30 R330

MISC

2
PCI_TRDY# INT_PIRQC# PCI_SERR# PCI_REQ#3 MCH_SYNC# CLGPIO1/GPIO10
4 7 3 8 AF22 CLGPIO2 TP54 TPAD30 3K24R2F-GP

2
INT_PIRQB# INT_PIRQE# INT_PIRQF# ICH_RSVD CLGPIO2/GPIO14
3D3V_S0 5 6 4 7 AJ21 TP3 CLGPIO3/GPIO9 AG19 WOL_EN
5 6 PCI_STOP# TPAD30 TP47 TP48 TPAD30
3D3V_S0

2
1
SRN8K2J-2-GP-U

SCD1U10V2KX-4GP
RP4 SRN8K2J-2-GP-U ICH8-M-1-GP-U 71.0ICH8.A0U R158
3D3V_S0 No Reboot Strap 100KR2J-1-GP
PCI_DEVSEL# 1 10

1
PCI_FRAME# 2 9 PCI_REQ#1 SPKR LOW = Defaule

C497
SCLOCK --> 3 8 PCI_REQ#2 High=No Reboot R337

2
UMA 4 7 INT_SERIRQ 453R2F-1-GP
5 6 PM_CLKRUN#
3D3V_S0

2
-1 modify U49B 2 OF 6 3D3V_S0

2
SRN8K2J-2-GP-U RP2 3D3V_S5
23 PCIE_RXN1 P27 V27 DMI_RXN0 7 ACZ_SPKR R347 1 DY 2 1 10
PERN1 DMI0RXN 1KR2J-1-GP SMB_LINK_ALERT# 2
23 PCIE_RXP1 P26 PERP1 DMI0RXP V26 DMI_RXP0 7 9 SMB_ALERT#
23 PCIE_TXN1 C518 SCD1U10V2KX-4GP 2 1 TXN1 N29 U29 DMI_TXN0 7 ECSCI#_1 R348 1 2 ECSWI# 3 8 CLGPIO2
C519 SCD1U10V2KX-4GP 2 TXP1 PETN1 DMI0TXN 10KR2J-3-GP PM_BATLOW#_R
23 PCIE_TXP1 1 N28 PETP1 DMI0TXP U28 DMI_TXP0 7 4 7 USB_OC#0 3D3V_S5 3D3V_S5
PSW_CLR# R421 1 -->
LAN M27 Y27
2
10KR2J-3-GP
3D3V_S5 5 6
RP1
Direct Media Interface

28 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 7

PCI-Express

28 PCIE_RXP2 M26 Y26 DMI_RXP1 7 SB modify SRN10KJ-L3-GP USB_OC#9 1 10

C521 SCD1U10V2KX-4GP 2 TXN2 PERP2 DMI1RXP PCIE_WAKE# USB_OC#5
28 PCIE_TXN2 1 L29 PETN2 DMI1TXN W29 DMI_TXN1 7 -1 modify 2 9
28 PCIE_TXP2 C522 SCD1U10V2KX-4GP 2 1 TXP2 L28 W28 DMI_TXP1 7 USB_OC#7 3 8 PM_RI#
PETP2 DMI1TXP CLGPIO1 ECSMI#
MINICARD RP3 3D3V_S5 4 7
2 DBRESET# 1 USB_OC#1 2
28 PCIE_RXN3 K27 PERN3 DMI2RXN AB26 DMI_RXN2 7 10 5 6
28 PCIE_RXP3 K26 AB25 DMI_RXP2 7 SDATAOUT1 R334 1 2 USB_OC#3 2 9 USB_OC#2
PERP3 DMI2RXP
28
28
PCIE_TXN3
PCIE_TXP3
C525 SCD1U10V2KX-4GP 2
C526 SCD1U10V2KX-4GP 2
1
1
TXN3
TXP3
J29
J28
PETN3
PETP3
DMI2TXN
DMI2TXP
AA29
AA28
DMI_TXN2
DMI_TXP2
7
7 PWROK R186 2
10KR2J-3-GP
1
10KR2J-3-GP
--> 3
4
8
7
USB_OC#8
USB_OC#4
USB_OC#6
SRN10KJ-L3-GP

NEWCARD 3D3V_S5 5 6
Layout Note:
H27 PERN4 DMI3RXN AD27 DMI_RXN3 7 1D5V_S0 DY
H26 AD26 DMI_RXP3 7 SRN10KJ-L3-GP
PCIE AC coupling caps PERP4 DMI3RXP
G29 PETN4 DMI3TXN AC29 DMI_TXN3 7
need to be within 250 mils of the driver. G28 AC28 Place within 500 mils of ICH
PETP4 DMI3TXP DMI_TXP3 7
1

F27 T26 CLK_PCIE_ICH# 3 R175

PERN5 DMI_CLKN 24D9R2F-L-GP 3D3V_S5
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 3
E29 PETN5
E28 Y23
2

PETP5 DMI_ZCOMP

1
Y24 DMI_IRCOMP_R 1 2
DMI_IRCOMP R363 0R2J-2-GP R362
D27 PERN6/GLAN_RXN
D26 PERP6/GLAN_RXP USBP0N G3 USBPN0 22 2K2R2J-2-GP
C29 PETN6/GLAN_TXN USBP0P G2 USBPP0 22 USB
C28 H5 USBPN1 22 D28

2
PETP6/GLAN_TXP USBP1N BAS16-1-GP RSMRST#_SB
USBP1P H4 USBPP1 22 Pair Device 1
TPAD30 TP103 SPI_CLK C23 H2 USBPN2 22
TPAD30 TP104 SPI_CS0# SPI_CLK USBP2N
B23 SPI_CS0# USBP2P H1 USBPP2 22 0 USB1 31 RSMRST#_KBC 3 DY

1
SPI_CS#1 E22 J3 USBPN3 27
SPI_CS1# USBP3N R366
J2 1 USB2 BOOT BIOS Strap 2
SPI

USBP3P USBPP3 27
TPAD30 TP81 SPI_MOSI D23 K5 USBPN4 28 PCI_GNT#0 SPI_CS#1 BOOT BIOS Location 100KR2F-L1-GP
TPAD30 TP79 SPI_MISO SPI_MOSI USBP4N
F21 SPI_MISO USBP4P K4 USBPP4 28 2 USB3
K2 USBPN5 22 0 1 SPI

2
USB_OC#0 USBP5N
22 USB_OC#0 AJ19 OC0# USBP5P K1 USBPP5 22 3 USB4(Bd) 1 0 PCI
1
USB_OC#1 AG16 L3 USBPN6 14 1 1 LPC(Default) 55.4H001.S04G 1
USB_OC#2 OC1#/GPIO40 USBP6N
22 USB_OC#2 AG15 OC2#/GPIO41 USBP6P L2 USBPP6 14 4 MINIC1 A16 swap override strap
USB_OC#3 AE15 M5
27 USB_OC#3
USB_OC#4 OC3#/GPIO42 USB USBP7N USBPN7 22
5 BT PCI_GNT#3 low = A16 swap override enable
USB_OC#5
AF15
AG17
OC4#/GPIO43
OC5#/GPIO29
USBP7P
USBP8N
M4
M2
USBPP7
USBPN8
22
28 high = default Wistron Corporation
USB_OC#6 AD12 M1 6 CCD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
OC6#/GPIO30 USBP8P USBPP8 28
USB_OC#7 PCI_GNT#0 1 Taipei Hsien 221, Taiwan, R.O.C.
USB_OC#8
AJ18 OC7#/GPIO31 USBP9N N3
R377
DY 1KR2J-1-GP
2
AD14 OC8# USBP9P N2 7 Finger Title
USB_OC#9 AH18 SPI_CS#1 1 DY 1KR2J-1-GP
2
OC9# USB_RBIAS_PN 22D6R2F-L1-GP R378
F2 8 New
USBRBIAS#
USBRBIAS F3 1 2 PCI_GNT#3 1 DY 1KR2J-1-GP
2 ICH8-M (2 of 4)
R184 9 NC R376 Size Document Number Rev

A
ICH8-M-1-GP-U

B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
17 of 42
-1
 A B C D E

RTC_AUX_S5 U49E 5 OF 6
6uA in G3 AD25 VCCRTC
VCC1_05 A13
SCD1U10V2KX-4GP T7 B13
V5REF VCC1_05

1
C257 C268 V5REF_S0 A16 C13
V5REF VCC1_05
VCC1_05 C14
SCD1U10V2KX-4GP V5REF_S5 G4 D14 1D05V_S0
1.13A

2
V5REF_SUS VCC1_05 Layout Note: Place near ICH8M
E14
657mA AA25 VCC1_5_B
VCC1_05
VCC1_05 F14
1D5V_S0 AA26 G14
VCC1_5_B VCC1_05

1
AA27 L11 C278 C290 C286 C292 C277 C297

CORE
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
AB27 VCC1_5_B VCC1_05 L12
AB28 L14

2
VCC1_5_B VCC1_05

1
4 C284 C275 C293 C280 C289 C298 C535 C301 AB29 L16 4
VCC1_5_B VCC1_05

SC10U6D3V6KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
D28 VCC1_5_B VCC1_05 L17
D29 L18

2
VCC1_5_B VCC1_05
E25 VCC1_5_B VCC1_05 M11
E26 VCC1_5_B VCC1_05 M18
E27 VCC1_5_B VCC1_05 P11

1
F24 P18 C291 C285 C279
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
F25 T11 1D5V_DMIPLL_ICH_S0
VCC1_5_B VCC1_05 23mA 1D5V_S0

SCD1U10V2KX-4GP
G24 T18

2
VCC1_5_B VCC1_05
H23 VCC1_5_B VCC1_05 U11 DY 2 1
R181 0R0603-PAD
*Within a given well, 5VREF needs to be up before the H24 VCC1_5_B VCC1_05 U18

1
C511

VCCA3GP
corresponding 3.3V rail J23 VCC1_5_B VCC1_05 V11
J24 V12 C282 SC10U6D3V6KX-4GP
VCC1_5_B VCC1_05 SCD1U10V2KX-4GP
K24 V14

2
VCC1_5_B VCC1_05
K25 VCC1_5_B VCC1_05 V16

SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
3D3V_S0 L23 V17
5V_S0 VCC1_5_B VCC1_05 1D25V_S0
L24 VCC1_5_B VCC1_05 V18
L25 VCC1_5_B 2 R160 1
1

1
C256
C254
D30 M24 R29 0R0603-PAD
VCC1_5_B VCCDMIPLL
2

BAS16-1-GP M25 DY
R379 1D5V_S0 47mA 1D5V_APLL_S0 N23
VCC1_5_B
AE28 1D25V_DMI_ICH_S0 50mA

2
100R2J-2-GP VCC1_5_B VCC_DMI 1D05V_S0
N24 AE29
1mA 2 1 N25
VCC1_5_B VCC_DMI
R156 0R0603-PAD P24
VCC1_5_B
AC23 1mA
3

VCC1_5_B V_CPU_IO

1
V5REF_S0 C496 P25 AC24
SC10U6D3V5KX-1GP VCC1_5_B V_CPU_IO 3D3V_S0 C281 C273
R24 VCC1_5_B
1

1
R25 AF29

2
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C253
C310 R26
Layout Note: SCD1U16V2ZY-2GP VCC1_5_B
R27 AD2
2

2
3 Place near ICH8 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP 3
T23

2
VCC1_5_B
SB modify T24 AC8

VCCP CORE
VCC1_5_B VCC3_3

1
3D3V_S5 T27 AD8 3D3V_S0 C500
5V_S5 VCC1_5_B VCC3_3
T28 VCC1_5_B VCC3_3 AE8
T29 AF8 SCD1U10V2KX-4GP

2
VCC1_5_B VCC3_3
1

D10 1D5V_S0 U24 VCC1_5_B

2

1
BAS16-1-GP U25 AA3 C259 Layout Note:
VCC1_5_B VCC3_3

1
R383 V23 U7 C272 C276 PCI decoupling
VCC1_5_B VCC3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
100R2J-2-GP V24 V7 SCD1U10V2KX-4GP
1mA

2
VCC1_5_B VCC3_3
1

C283 C274 V25 W1 3D3V_S0

2
VCC1_5_B VCC3_3
W25 W6

IDE
3

VCC1_5_B VCC3_3

1
V5REF_S5 Y25 W7
2

VCC1_5_B VCC3_3 C534

VCC3_3 Y7
1

SCD1U10V2KX-4GP
AJ6
VCC3_3=278mA DY

2
C300 VCCSATAPLL 3D3V_S0
VCC3_3 A8
SCD1U16V2ZY-2GP AE7 B15
2

VCC1_5_A VCC3_3
AF7 VCC1_5_A VCC3_3 B18

1
AG7 B4 C308 C302 C309
SATA+USB=1.56A VCC1_5_A VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
NO_STUFF

ARX
AH7 B9

PCI
VCC1_5_A VCC3_3
AJ7 C15

2
VCC1_5_A VCC3_3 3D3V_S0
VCC3_3 D13
1

C255 C251 AC1 D5

VCC1_5_A VCC3_3
AC2 VCC1_5_A VCC3_3 E10

1
ATX
SCD1U10V2KX-4GP SCD1U10V2KX-4GP AC3 E7
32mA
2

VCC1_5_A VCC3_3 C267

AC4 VCC1_5_A VCC3_3 F11
AC5 SCD1U10V2KX-4GP

2
VCC1_5_A 3D3V_S5
VCCHDA AC12
AC10
AC9
VCC1_5_A
VCC1_5_A VCCSUSHDA AD11 32mA

1
2 2
1

C296 C248 AA5 J6 VccSus1_05[1] TP65 TPAD28 C269

C294 VCC1_5_A VCCSUS1_05
AA6 AF20 VccSus1_05[2] TP58 TPAD28 SCD1U10V2KX-4GP

2
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCC1_5_A VCCSUS1_05
2

DY G12 VCC1_5_A VCCSUS1_5 AC16 VccSus1_5[1] TP62 TPAD28

G17 VCC1_5_A
H7 J7 VccSus1_5[2] TP70 TPAD28 3D3V_S5
VCC1_5_A VCCSUS1_5
AC7 VCC1_5_A VCCSUS3_3 C3
1D5V_S0

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AD7 NO_STUFF
USBPLL=10mA VCC1_5_A

1
AC18 C266 C271
1D5V_USB_S0 VCCSUS3_3 C247
2 1 D1 VCCUSBPLL VCCSUS3_3 AG20
VCCPSUS

R182 0R0603-PAD AC21 DY

2
VCCSUS3_3
1

C532 C288 C540 F1 AC22

VCC1_5_A VCCSUS3_3
USB CORE

L6 AH28 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCC1_5_A VCCSUS3_3
L7
2

VCC1_5_A 3D3V_S5
M6 VCC1_5_A VCCSUS3_3 P6
1D5V_S0 M7 P7
VCC1_5_A VCCSUS3_3
VCCSUS3_3 N7 177mA
3D3V_S5
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
W23 C1 NO_STUFF
VCC1_5_A VCCSUS3_3
1

1
18mA in S0;50mA in S3/S4/S5 P1 C507 C513
TPAD28 TP77 VccLan1_05[1] VCCSUS3_3 C287
F17 VCCLAN1_05 VCCSUS3_3 R1
TPAD28 TP68 VccLan1_05[2] G18 P2 DY
2

2
VCCLAN1_05 VCCSUS3_3
1

VCCPUSB

VCCSUS3_3 P3
C299 C303 F19 R3 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1D5V_S0 VCCLAN3_3 VCCSUS3_3
G20 P4
2

VCCLAN3_3 VCCSUS3_3
SCD1U10V2KX-4GP

P5
23mA A24 VCCGLANPLL
VCCSUS3_3
VCCSUS3_3 R5
C537

1 VCCSUS3_3 R6 1
1

C315 A26 VCCGLAN1_5

DY A27 G22 VccSus1_05[3]
GLAN POWER

VCCGLAN1_5 VCCCL1_05 TP67 TPAD28

SCD1U10V2KX-4GP B26
Wistron Corporation
2

1D5V_S0 VCCGLAN1_5
B27 A22 VccSus1_5[3]
80mA 3D3V_S0 VCCGLAN1_5 VCCCL1_5 TP105 TPAD28 3D3V_S5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U10V2KX-4GP

B28 VCCGLAN1_5
F20 Taipei Hsien 221, Taiwan, R.O.C.
VCCCL3_3
C536

B25 G21 3D3V_ICH_CL_S5 2 1

VCCGLAN3_3 VCCCL3_3
1

C539 R185 0R0603-PAD Title

SC4D7U6D3V3KX-GP DY 1mA 18mA
ICH8-M-1-GP-U ICH8-M (3 of 4)
2

Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
18 of 42
SB
 A B C D E

U49F 6 OF 6

A23 VSS VSS K7

A5 VSS VSS L1
AA2 VSS VSS L13
AA7 VSS VSS L15
A25 VSS VSS L26
AB1 VSS VSS L27
AB24 VSS VSS L4
4 AC11 VSS VSS L5 4
AC14 VSS VSS M12
AC25 VSS VSS M13
AC26 VSS VSS M14
AC27 VSS VSS M15
AD17 VSS VSS M16
AD20 VSS VSS M17
AD28 VSS VSS M23
AD29 VSS VSS M28
AD3 VSS VSS M29
AD4 VSS VSS M3
AD6 VSS VSS N1
AE1 VSS VSS N11
AE12 VSS VSS N12
AE2 VSS VSS N13
AE22 VSS VSS N14
AD1 VSS VSS N15
AE25 VSS VSS N16
AE5 VSS VSS N17
AE6 VSS VSS N18
AE9 VSS VSS N26
AF14 VSS VSS N27
AF16 VSS VSS N4
AF18 VSS VSS N5
AF3 VSS VSS N6
AF4 VSS VSS P12
AG5 VSS VSS P13
AG6 VSS VSS P14
AH10 VSS VSS P15
3 AH13 P16 3
VSS VSS
AH16 VSS VSS P17
AH19 VSS VSS P23
AH2 VSS VSS P28
AF28 VSS VSS P29
AH22 VSS VSS R11
AH24 VSS VSS R12
AH26 VSS VSS R13
AH3 VSS VSS R14
AH4 R15 3D3V_S5 3D3V_S0
VSS VSS
AH8 VSS VSS R16
AJ5 VSS VSS R17
B11 VSS VSS R18
B14 VSS VSS R28

SRN4K7J-10-GP
B17 VSS VSS R4

8
7
6
5
B2 VSS VSS T12
B20 T13 RN49
VSS VSS
B22 VSS VSS T14
B8 VSS VSS T15
C24 VSS VSS T16
C26 T17

1
2
3
4
VSS VSS
C27 VSS VSS T2
C6 VSS VSS U12
D12 VSS VSS U13
D15 VSS VSS U14
D18 U15 5V_S0
VSS VSS
D2 VSS VSS U16
D4 VSS VSS U17
E21 VSS VSS U23 D25
2 2
E24 VSS VSS U26
E4 VSS VSS U27
E9 VSS VSS U3 17,23,28 SMB_CLK 3 4 SMBC_ICH 3,12
F15 VSS VSS U5
E23 VSS VSS V13 2 5
F28 VSS VSS V15
F29 VSS VSS V28 1 6 2N7002DW-1-GP
F7 VSS VSS V29
G1 VSS VSS W2
E2 W26 84.27002.D3F
VSS VSS 17,23,28 SMB_DATA
G10 VSS VSS W27 SMBD_ICH 3,12
G13 VSS VSS Y28
G19 VSS VSS Y29 D55 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance
G23 VSS VSS Y4
G25 VSS VSS AB4
G26 VSS VSS AB23
G27 VSS VSS AB5
H25 AB6
H28
VSS
VSS
VSS
VSS AD5 SMBUS
H29 VSS VSS U4
H3 VSS VSS W24
H6 VSS
J1 VSS VSS_NCTF A1
J25 VSS VSS_NCTF A2
J26 VSS VSS_NCTF A28
J27 VSS VSS_NCTF A29
J4 VSS VSS_NCTF AJ28
J5 VSS VSS_NCTF AH1
1 K23 VSS VSS_NCTF AH29 1
K28 VSS VSS_NCTF AJ1
K29 VSS VSS_NCTF AJ2
K3
K6
VSS
VSS
VSS_NCTF
VSS_NCTF
AJ29
B1 Wistron Corporation
B29 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS_NCTF Taipei Hsien 221, Taiwan, R.O.C.

ICH8-M-1-GP-U Title

ICH8-M (4 of 4)
Size Document Number Rev

www.vinafix.vn Biwa SA
Date: Tuesday, March 13, 2007 Sheet 19 of 42
A B C D E
 5V_S0

1
FAN1_VCC
R204
FAN1_VCC 10KR2J-3-GP
*Layout* 15 mil

2
FAN1
5

3
C368 C362 FAN1_FG1 3
SC4D7U6D3V3KX-GP 2
SCD1U16V2ZY-2GP D16

2
1
BAS16-1-GP *Layout* 15 mil 4

1
C353

2
SC1KP50V2KX-1GP ACES-CON3-GP
20.F0714.003

2
2nd source: 20.F1000.003
3D3V_S0 5V_S0
5V_S0 U37
R231 *Layout* 30 mil
1 2 5V_G792_S0 6 1
10R3J-3-GP VCC FAN1
20 DVCC FG1 4
1

14 G792_32KHZ
CLK
1

1
C374 DY DY 16
SDA SMBD_G792 31

1
SC1U10V3ZY-6GP R227 C367 C363 C364 7 18 SMBC_G792 31
2

30K1R3F-GP R223 SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP DXP1 SCL
9 19

2
10KR2J-3-GP SCD1U16V2ZY-2GP DXP2 NC#19
11 DXP3 G792_DXP2

C
2

5 G792_DXP3 SC2200P50V2KX-2GP

C
2

R222 2 ALERT# DGND Q11

17 THRM# 1 15 ALERT# DGND 17 B

1
MMBT3904-3-GP
DY 0R2J-2-GP V_DEGREE
13 THERM# B Q10
MMBT3904-3-GP
C431
SC470P50V3JN-2GP
Setting T8 as 90 Degree 3 8

E
THERM_SET SGND1 G792_DXN2 C377 C378 C396
2 10

E
2

2
RESET# SGND2
1

12 G792_DXN3
R224 SGND3 SC2200P50V2KX-2GP
71K5R2F-1-GP SC2200P50V2KX-2GP

2
V_DEGREE G792SFUF-GP 74.00792.A79 G50 G63
=(((Degree-72)*0.02)+0.34)*VCC 3.System Sensor,
2

3D3V_AUX_S5
Put between CPU and NB. 2.T8 Sensor
SB modify GAP-CLOSEGAP-CLOSE
Put back of the CPU socket.

1
2

R228
100KR2J-1-GP DXP1:108 Degree (CPU DTS) H_THERMDA 4
DXP2:H/W Setting 90(T8)

1
Place near chip as close
1

31,34 PURE_HW_SHUTDOWN# DXP3:105 Degree (System) as possible C375

SC2200P50V2KX-2GP

2
H_THERMDC 4

1.For CPU Sensor

7,17 PWROK 1 R220 2 G792_RESET#
4K7R2J-2-GP
1

R221
10KR2F-2-GP
2

Digital Output Data Bits

TEMP.
Biwa Thermal Table 1106
Sign MSB LSB EXT RUN_POWER_ON
T6 T7
+127.875 0 111 1111 111
Q9 Sencor 0 CPU DTS 100 102
+126.375 0 111 1110 011 84.27002.W31
G

2N7002-11-GP R225 Sencor 1 CPU G792 Analog 110 113

+25.5 0 001 1001 100 10R2J-2-GP
17 PM_SUS_CLK D S 32KHZ 1 2 G792_32KHZ Sencor 2 System G792 85 87
+1.75 0 000 0001 110
1

Sencor 3 T8
+0.5 0 000 0000 100 R226
100R2J-2-GP Sencor 4 ADIA status
+0.125 0 000 0000 001
2

-0.125 1 111 1111 111

-1.125 1 111 1110 111
-25.5 1 110 0110 100
Wistron Corporation
-55.25 1 100 1000 110 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
-65.000 1 011 1111 000
Title

Thermal/Fan Controllor

www.vinafix.vn
Size Document Number Rev

Biwa SB
Date: Tuesday, March 13, 2007 Sheet 20 of 42
 ODD Connector
SATA Connector 5V_S0 Close to Connector ODD1

41 +5V(LOGIC) DD0 21 IDE_PDD0 16

42 +5V(LOGIC) DD1 19 IDE_PDD1 16

1
SATA1 17 IDE_PDD2 16
C371 C369 DD2
38 +5V(MOTOR) DD3 15 IDE_PDD3 16
23 SC10U10V5ZY-1GP SCD1U16V2ZY-2GP 39 13 IDE_PDD4 16

2
+5V(MOTOR) DD4
NP1 40 +5V(MOTOR) DD5 11 IDE_PDD5 16
1 3D3V_S0 9 IDE_PDD6 16
DD6
DD7 7 IDE_PDD7 16
16 SATA_TXP0 2 DD8 6 IDE_PDD8 16
16 SATA_TXN0 3 CSEL 47 8 IDE_PDD9 16
DEVICE_CONFIG(CSEL) DD9
4 DD10 10 IDE_PDD10 16

3
4

1
16 SATA_RXN0 5 16 IDE_PDCS1# 35 12 IDE_PDD11 16
RN34 R230 CSIFX# DD11
16 SATA_RXP0 6 16 IDE_PDCS3# 36 CS3FX# DD12 14 IDE_PDD12 16
7 SRN8K2J-3-GP 0R0402-PAD 16 IDE_PDD13 16
DD13
16 IDE_PDA0 33 DA0 DD14 18 IDE_PDD14 16
TP101 TPAD30 HDD_V33 8 16 IDE_PDA1 31 20 IDE_PDD15 16

2
DA1 DD15
9 16 IDE_PDA2 34

2
1
DA2
10
11 16 IDE_PDIORDY 27 IORDY VENDER_UNIQUE#50 50
5V_S0 12 29 49
16 INT_IRQ14 INTRQ VENDER_UNIQUE#49
PWR TRACE 100mil 13 16 IDE_PDDREQ 22 DMARQ
14
3

15 16 IDE_PDIOR# 24 DIOR# AUDIO_GROUND 3

1

5V_S0
D27
DY
EC54 C514 C506
16 16 IDE_PDIOW# 25 DIOW# GROUND 4
17 GROUND 23
SC10U10V5ZY-1GP 18 CDROM_LED# 37 26
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

BAS16-1-GP 10KR2J-3-GP 1 R219 PDIAG DASP# GROUND

19 2 32 PDIAG# GROUND 43
HDD_V12 20 16 IDE_PDDACK# 28 44
1

HDDDRV#_5 DMACK# GROUND

21 5 RESET# GROUND 45
TP59 22 30 46
TPAD30 IOCS16# GROUND
NP2 GROUND 48
24 CSEL=Low for ODD is Master
CSEL=Open for ODD is Slave 1 AUDIO_L_CH GND 51
2 AUDIO_R_CH GND 52
FOX-CON22-3-GP-U
62.10065.061
2nd source: 62.10065.041 SYN-CONN50-4R10GP-U
20.80868.050 SB modify CDROM
2nd source: 20.80868.050
IORDY 4.7k pull-up to Vcc3_3 1 2
SB modify
IDEIRQ 8.2k to 10k pull-up to Vcc3_3

49 50

5V_S0

3V to 5V level shift for HDD

14

10
7,17,23,28,31,33 PLT_RST1# 9 8 HDDDRV#_1 2 1 HDDDRV#_5
R206 0R0402-PAD
U3C
TSAHCT125PW-GP

7
5V_S0
1

R277
4K7R2J-2-GP 3D3V_S0
1
2

R278 55.4H001.S04G
2 CDROM_LED# 10KR2J-3-GP
14 MEDIA_LED# 3
D23
DY ICH8 internal pull high 15K
Wistron Corporation
2

1 SATA_LED# 16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

BAW56PT-U Taipei Hsien 221, Taiwan, R.O.C.
83.00056.E11
Title

HDD and CDROM

www.vinafix.vn
Size Document Number Rev

Biwa SB
Date: Tuesday, March 13, 2007 Sheet 21 of 42
 5V_USB1_S5 5V_USB2_S5
U45
5V_S5
1 GND OC1# 8 USB_OC#0 17
2 IN OUT1 7
3 EN1/EN1# OUT2 6
4 5

GND
27,31 USB_PWR_EN# EN2/EN2# OC2# USB_OC#2 17

1
C490 EC49 EC52
SCD1U16V2ZY-2GP G546B2RD1UF-GP DY

9
74.00546.A73 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
Finger Print
3D3V_S0 FP1
16
-1 modify for EMC
1 5V_USB1_S5
C470 100 mil
2

32 TP_RIGHT 2
R435
SC4D7U6D3V3KX-GP

32 TP_SCROLL_RIGHT 3

1
10KR2J-3-GP 32 TP_SCROLL_UP 4 TC17 EC46 EC28
2

5 SE150U10VM-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

32 TP_SCROLL_LEFT
32 TP_SCROLL_DOWN 6 79.15711.30L
1

2
32 TP_LEFT 7
31 FP_DETECT# 8
9
17 USBPP7 10
17 USBPN7 11
12
5V_S0 5V_USB2_S5
17 FP_ID 13 H: Authen
14 100 mil
15
SB modify
1

1
C596 17 TC24 EC56 DY EC58
SCD1U16V2ZY-2GP SE100U10VM-4-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
ACES-CON15-GP 79.10111.40L
2

2
20.K0228.015
2nd source: 20.K0185.015
5V_USB1_S5

BLUETOOTH MODULE 6
1
USB1

3D3V_BT_S0 U47 3D3V_S0 SRN0J-6-GP

4 1 USB_0- 2
17 USBPN0
3D3V_BT_S0 1 5 3 2 USB_0+ 3
VOUT VIN 17 USBPP0
2 GND 4
1

EC53 DY 3 4 RN46 5
NC#3 EN/EN# BLUETOOTH_EN 31
SCD1U16V2ZY-2GP
1

C501 SKT-USB-97-UGP
2

RT9711-APBG-GP SCD1U16V2ZY-2GP 22.10218.H01

74.09711.A7F 2nd source: 22.10245.H11
2

2nd source: 74.05240.A7F

5V_USB1_S5

BLUE1 USB2
EC21 put near
6

6
BLUE1 / all RN50 1
USB put one 4 USB_5- 2 3 SRN0J-6-GP
USBPN5 17
3 USB_5+ 1 4 4 1 USB_1- 2
choke near USBPP5 17 17 USBPN1
2 3 2 USB_1+ 3
17 USBPP1
connector by SRN0J-6-GP 4
1 3D3V_BT_S0 RN14 5
EMI request ACES-CON4-1-GP
20.D0197.104 SKT-USB-97-UGP
22.10218.H01
5

2nd source: 22.10245.H11

2nd source: 20.D0174.104 5V_USB2_S5

USB3
6
MDC 1.5 CONN RN54
8
1

MDC1 3D3V_S5 3 2 USB_2- 2

17 USBPN2
13 15 4 1 USB_2+ 3
17 USBPP2
NP1 14 4
1 2 SRN0J-6-GP 7
5
16,29 ACZ_SDATAOUT ACZ_SDATAOUT 3 4
5 6 SKT-USB-168-GP
16,29 ACZ_SYNC ACZ_SYNC 7 8 22.10218.S61
16 ACZ_SDATAIN1 1 2ACSDATAIN1_A 9 10 SB modify
R207 39R2J-L-GP ACZ_RST# 11 12 55.4H001.S04G
16,29 ACZ_RST# ACZ_BTCLK_MDC 16
NP2 17
1

DY 16 18 C39
1

C359 R15
Wistron Corporation
SC4D7U10V5ZY-3GP

SC22P50V2JN-4GP
100KR2J-1-GP

C22
2

TYCO-CONN12A-2-GP DUMMY-C2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

20.F0917.012 Taipei Hsien 221, Taiwan, R.O.C.
2

Title
2nd source: 20.F0604.012
USB / MDC / BLUETOOTH / FP
Size Document Number Rev

-1

www.vinafix.vn
Biwa
Date: Tuesday, March 13, 2007 Sheet 22 of 42
 5 4 3 2 1

3D3V_LAN_S5

1
D
2D5V_LAN_S5 R67 U13 D
10KR2F-2-GP 3D3V_LAN_S5
SO 1 8 SI
SI SO

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
3D3V_LAN_S5 R58 SCLK 2 7

2
SCK GND

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
0R0402-PAD C385 C386 SPI_RST 3 6

SC4D7U10V5ZY-3GP
CS# RESET# VCC
4 CS# WP# 5

2
3D3V_LAN_S5
DY

2
1

2
C62 C81 C68 3D3V_S5 -3 modify C80

2
G66 SCD1U10V2KX-4GP AT45DB011B-SU1-GP C84

1
72.45011.A01

VCCP
1 2 SCD1U10V2KX-4GP

1
GAP-CLOSE-PWR 2D5V_LAN_S5 SB modify
1 R242 2
1D2V_LAN_S5 0R0603-PAD

15
19
56
61

17
68
6

1
U14 C392
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VDDP
VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
5 36 BIASVDD_G SCD1U10V2KX-4GP
SC1U6D3V2ZY-GP

2
VDDC BIASVDD
13 VDDC
1

1
C394 C78 C388 C383 C69 C67 20 VDDC XTALVDD_G
34 23 1 R238 2
55
VDDC 7mA XTALVDD 0R0603-PAD
2

2
VDDC

1
60 C391
VDDC
AVDD 38 Place PLLVDD/AVDDL
SCD1U10V2KX-4GP CKT as close to chip as

2
R66 45 possible
AVDDL_G AVDD
2 1
FCM1608KF-2-GP-U 52 LAN_AVDD 1 R68 2
AVDD
1

SCD1U10V2KX-4GP
68.00217.171 SC1U10V3KX-3GP C384 0R0603-PAD
C C82 SCD1U10V2KX-4GP 39 C
AVDDL

1
44 49 MDI3- 24 C71 C70
2

R257 AVDDL TRD3-

46 AVDDL TRD3+ 50 MDI3+ 24
2 1 GPHY_PLLVDD 51 SCD1U10V2KX-4GP

2
1D2V_LAN_S5 FCM1608KF-2-GP-U AVDDL
48
DY TRD2- MDI2- 24
1

68.00217.171 SC1U10V3KX-3GP C405 47 MDI2+ 24

C399 SCD1U10V2KX-4GP TRD2+
35 GPHY_PLLVDD
42 MDI1- 24
2

R241 TRD1-
TRD1+ 43 MDI1+ 24
2 1 PCIE_PLLVDD
FCM1608KF-2-GP-U 30 41
DY PCIE_PLLVDD TRD0- MDI0- 24
1

68.00217.171 SC1U10V3KX-3GP C395 40 MDI0+ 24

C387 SCD1U10V2KX-4GP TRD0+
SB modify
2
2

LINKLED#
SPD100LED# 1 10M/100M/1G_LED# 24
2 R245 1 PCIE_SDSVDD 27 PCIE_VDD SPD1000LED# 67
1

0R3-0-U-GP 33 66 LAN_ACT_LED# 24
PCIE_VDD TRAFFICLED#
1

C93 C389
SC1U10V3KX-3GPSCD1U10V2KX-4GP 24 8 GPIO2
2

PCIE_GND GPIO2 TP3 TPAD30

2

17 PCIE_RXP1 SCD1U10V2KX-4GP 2 1 C91 PCIE_RXDP 26 9 UART_MODE

SCD1U10V2KX-4GP 2 PCIE_TXDP UART_MODE
17 PCIE_RXN1 1 C90 PCIE_RXDN 25 PCIE_TXDN GPIO1_SERIALDI 7 GPIO1 TP4 TPAD30
17 PCIE_TXP1 31 4 GPIO0 TP2 TPAD30
PCIE_RXDP GPIO0_SERIALDO TP1 TPAD30
17 PCIE_TXN1 32 PCIE_RXDN
17,28 PCIE_WAKE# 12 WAKE#
7,17,21,28,31,33 PLT_RST1# 1 R69 2 LAN_RST 10 3D3V_AUX_S5
0R0402-PAD PERST# SCLK
3 CLK_PCIE_LAN 29 REFCLK+ SCLK 65
1

C83 28 63 SI SB modify 3D3V_LAN_S5

3 CLK_PCIE_LAN# REFCLK- SI

1
B SO B
64
DY

SC4D7U10V5ZY-3GP
SC100P50V2JN-3GP SO CS# 10KR2J-3-GP
62
2

CS# R440
-1 modify DY C76
DY

1
3D3V_LAN_S5

SCD1U10V2KX-4GP
C66

2
3D3V_S0 R62 1KR2J-1-GP
NC#59/(ENERGY_DET) 59 ENERGY_DET 31
G49 2 1VAUX_PRESENT54

2
VAUXPRSNT

3
1 2 VMAINPRSNT_R R59 2 1 1KR2J-1-GP VMAINPRSNT 53 Q4
VMAINPRSNT 4K7R2J-2-GP 10KR2J-3-GP
31 LOW_PWR 3 LOW_PWR 1
1

GAP-CLOSE-PWR R65 1 2 R57 R439 BCP69T1-1-GP

C61 10KR2J-3-GP DY 84.00069.A1B 2D5V_LAN_S5
DY 235mA

2
LAN_SMB_CLK

SC10U10V5ZY-1GP
17,19,28 SMB_CLK 1 2 58
2

2
SCD1U10V2KX-4GP 0R2J-2-GP R60 2LAN_SMB_DATA 57 SMB_CLK
17,19,28 SMB_DATA 1 SMB_DATA
0R2J-2-GP R61 18 REGCTL25
REGCTL25 DY

1
LAN_X1_R 2 1 C75
X4 R247 200R2J-L1-GP LAN_X1 22 C65
LAN_X0 XTALO
SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

1 2 21 SCD1U10V2KX-4GP

2
XTALI 3D3V_LAN_S5
XTAL-25MHZ-91GP 2 R239 1RDAC 37 RDAC
1

82.30020.761
C397 C398 14 REGCTL12 C72 C74
DY

SC4D7U10V5ZY-3GP
1K24R2F-GP REGCTL12

1
SCD1U10V2KX-4GP
2

11

2
NC#11(CLK_REQ#)
CL=20PF 30PPM 16
GND

REG_GND
SB modify C

E
BCM5787MKMLG-1-GP
69

71.05787.M02 B Q3
A 55.4H001.S04G A

2SB772ZPT-GP-U1 1D2V_LAN_S5
590mA
C
SC10U10V5ZY-1GP

Wistron Corporation
SCD1U10V2KX-4GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

1
C73 C64 Taipei Hsien 221, Taiwan, R.O.C.
DY Title
2

BCM5787MKMLG
Size Document Number Rev

www.vinafix.vn
A3
Biwa -3
Date: Tuesday, March 13, 2007 Sheet 23 of 42
5 4 3 2 1
 A B C D E

Voltage
4401E 5789 5787
Rail

VDDIO_PCI 3D3V_LAN_S5 3D3V_S0 Don't Care

4 4
VDDC 1D8V_LAN_S5 1D2V_LAN_S5
VDDIO 3D3V_LAN_S5 3D3V_LAN_S5 LAN Connector
VESD 3D3V_LAN_S5 3D3V_S0 Don't Care
LED COLOR
VDDP Don't Care 2D5V_S5
RJ1
3D3V_2D5V_S5 3D3V_S5 2D5V_S5 9 A2(+) A1(-)::GREEN
23 10M/100M/1G_LED# A1
CONN_PWR_2 A2 A2(+) A3(-):ORANGE
MCT4
1D8V_1D2V_S5 1D8V_LAN_S5 1D2V_S5 MCT3 RJ45_1_1
A3
1

MCT2 RJ45_2_1 2
MCT1 RJ45_3_1 3
RJ45_4_1 4
RJ45_5_1 5

8
7
6
5
RJ45_6_1 6
RN6 RJ45_7_1 7
SRN75J-1-GP RJ45_8_1 8
CONN_PWR_1 B1
B1(+) B2(-):YELLOW
23 LAN_ACT_LED# B2

1
2
3
4
3 10 3

2D5V_LAN_S5 LAN_TERMINAL 1 2 RJ45-125-GP-U1

EC15 22.10277.021
SC1KP2KV8KX-GP
2

R70
0R0402-PAD XF1
1 12 RJ45_7
23 MDI3+
LAN Link: Green(A3), behavior is the
1

TCT1 3 10 MCT4 RN59 same for 10/100/1000 bits

1 8 RJ45_7_1
2 11 RJ45_8 2 7 RJ45_8_1
23 MDI3- RJ45_4_1
3 6 LAN Data: Yellow(B2), when LAN is
5 8 RJ45_4 4 5 RJ45_5_1 transfering data.
23 MDI2+
4 9 MCT3 SRN0J-5-GP
C89 C92
1

6 7 RJ45_5
23 MDI2-
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

XFORM-271-GP
2

68.HD081.301

10M/100M/1G_LED#
XF2 3D3V_LAN_S5
1 12 RJ45_3 LAN_ACT_LED#
23 MDI1+
3 10 MCT2 RN60
1 8 RJ45_3_1 1 2 CONN_PWR_1
2 RJ45_6 RJ45_6_1 R63 100R2J-2-GP 2
23 MDI1- 2 11 2 7
1.route on bottom as differential pairs. 3 6 RJ45_1_1
5 8 RJ45_1 4 5 RJ45_2_1 1 2 CONN_PWR_2
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. 23 MDI0+ R64 100R2J-2-GP
3.No vias, No 90 degree bends. 4 9 MCT1 SRN0J-5-GP
C77 C63
4.pairs must be equal lengths.
1

1
3
5
7
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

6 7 RJ45_2
23 MDI0- ERC2
5.6mil trace width,12mil separation.
XFORM-271-GP DY SRC470P50V8MX-GP
6.36mil between pairs and any other trace.
2

68.HD081.301
7.Must not cross ground moat,except

2
4
6
8
RJ-45 moat. -1 modify for EMI -1 modify for EMI

RJ11 signal must leave the other signal

or power plane 100mil.

DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers

1 10/100 LAN Transformer RJ45 PIN 55.4H001.S04G 1

TD+ --> TX+ RJ45-1 Wistron Corporation

TD- --> TX- RJ45-2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RD+ --> RX+ RJ45-3 Title

RD- --> RX- RJ45-6 LAN Connector

Size Document Number Rev

www.vinafix.vn
A3
Biwa -1
Date: Tuesday, March 13, 2007 Sheet 24 of 42
A B C D E
 A B C D E

C782 should close Pin-P15

and Pin-R17.

SCD1U16V2ZY-2GP
1394_AGND

SCD1U16V2ZY-2GP
3D3V_PLL_S0

4 VCC_ASKT_S0 4

2
2
3D3V_S0

2
C341
C338

P15 VDDPLL_15
K19 VR_PORT2
VR_PORT1
17 PCI_C/BE#0 C331 C332

1
1
17 PCI_C/BE#1 SCD1U25V3ZY-1GP 1 2

1
17 PCI_C/BE#2
17 PCI_C/BE#3 SCD1U16V2ZY-2GP

W10

U19

U15
P14
P13

A15

P10

F14
F12
L14
J19

J14
W8
U5
1 OF 2

P2

V7

K2

K1

P1

P8
P6

F9
F6
L6

J6
U34A

VCCCB

VCCP
VCCP

VCCCB
VR_PORT
VR_PORT
C/BE3#
C/BE2#
C/BE1#
C/BE0#

VR_EN#

VDDPLL_33
VDDPLL_15

AVDD_33
AVDD_33
AVDD_33

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PCI_AD[31..0]
17,26 PCI_AD[31..0]
PCI_AD0 R11 P19
AD0 CAD0/D3 CBB_D3 27
PCI_AD1 P11 N18 CBB_D4 27
PCI_AD2 AD1 CAD1/D4
U11 AD2 CAD2/D11 N17 CBB_D11 27
PCI_AD3 V11 M15 CBB_D5 27
PCI_AD4 AD3 CAD3/D5
W11 AD4 CAD4/D12 N19 CBB_D12 27
PCI_AD5 R10 M18 CBB_D6 27
PCI_AD6 AD5 CAD5/D6
U10 AD6 CAD6/D13 M17 CBB_D13 27
PCI_AD7 V10 L19 CBB_D7 27 * All 1394 signals must be routed on top side only
PCI_AD8 AD7 CAD7/D7 * Differential pairs of each ports should have equal trace length
R9 AD8 CAD8/D15 L18 CBB_D15 27
PCI_AD9 U9 L15 CBB_A10 27 * Stubs must be keep as short as possible
3 PCI_AD10 AD9 CAD9/A10 3
V9 AD10 CAD10/CE2# K18 CBB_CE2# 27
PCI_AD11 W9 K17 CBB_OE# 27
PCI_AD12 AD11 CAD11/OE#
V8 AD12 CAD12/A11 K15 CBB_A11 27
PCI_AD13 U8 J18 CBB_IORD# 27
PCI_AD14 AD13 CAD13/IORD#
R8 AD14 CAD14/A9 J15 CBB_A9 27
PCI_AD15 W7 J17 CBB_IOWR# 27
PCI_AD16 AD15 CAD15/IOWR#
W4 AD16 CAD16/A17 H19 CBB_A17 27
PCI_AD17 T2 F15 CBB_A24 27
PCI_AD18
PCI_AD19
PCI_AD20
T1
R3
P5
AD17
AD18
AD19
AD20
TI PCI7412 CAD17/A24
CAD18/A7
CAD19/A25
CAD20/A6
E17
D19
A16
CBB_A7 27
CBB_A25 27
CBB_A6 27
PCI_AD21 R2 E14 CBB_A5 27
PCI_AD22 AD21 CAD21/A5
R1 AD22 CAD22/A4 B15 CBB_A4 27
PCI_AD23 P3 B14 CBB_A3 27
PCI_AD24 AD23 CAD23/A3
N3 AD24 CAD24/A2 A14 CBB_A2 27
PCI_AD25 N2 C13 CBB_A1 27
PCI_AD26 AD25 CAD25/A1
N1 AD26 CAD26/A0 B13 CBB_A0 27
PCI_AD27 M5 C11 CBB_D0 27
PCI_AD28 AD27 CAD27/D0

MC_PWR_CTRL_1/SM_R/B#
M6 AD28 CAD28/D8 E11 CBB_D8 27
PCI_AD29 M3 F11 CBB_D1 27
PCI_AD30 AD29 CAD29/D1
M2 AD30 CAD30/D9 A10 CBB_D9 27
PCI_AD31 M1 C10 CBB_D10 27
AD31 CAD31/D10

MC_PWR_CTRL_0
SD_CMD/SM_ALE
SD_CLK/SM_RE#
SD_DAT3/SM_D7
SD_DAT2/SM_D6
SD_DAT1/SM_D5
SD_DAT0/SM_D4
17 PCI_PAR U7 PAR SD_WP/SM_CE# CPAR/A13 H14 CBB_A13 27

CC/BE3#/REG#

CC/BE0#/CE1#
CC/BE2#/A12
Bypass/Decupoling Capacitors

CC/BE1#/A8
SD_CD#
VSSPLL

Should be places as close to

AGND
AGND
AGND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

2 2
PCI7412 as possible
U14
U13
R14

P9
P7
N6
M14
K14
K6
H6
G14
F13
F10
F7

R17

E6
B5
A5
C6

E7
C5
A4
F8
C8
E9

E13
E18
H18
L17
71.07412.B0U PCI7412ZHK-GP
3D3V_S0

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
CBB_CE1# 27
CBB_A8 27

C335

C337
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SD_D3
CBB_A12 27

1
SD_D2 C325 C330
CBB_REG# 27
1394_AGND SD_D1 SD_CD# SD_CD# 27
SD_D0

2
3D3V_S0
27 SD_WP SD_WP
27 SD_CMD SD_CMD
27 SD_CLK SD_CLK
4
3

27 SM_R# SM_R#
RN28 CardReader 3D3V_S0 3D3V_PLL_S0
SRN10KJ-5-GP R200 0R0603-PAD
1 2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
C329 C339 C340 C336
1
2

SD_D[3..0]
SD_D[3..0] 27 MC_PWR_CTRL 27
SC1U10V2ZY SC1U10V2ZY
C

2
CBB_D[15..0] CardReader
CBB_D[15..0] 26,27
MC_PWR_CTRL1_0 B Q5
CBB_A[25..0] MMBT2222A-3-GP
CBB_A[25..0] 26,27
84.02222.V11
E

1 55.4H001.S04G 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TI PCI7412 (1 of 2)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
25 of 42
SA
 A B C D E

CLOSE TO CHIP
1394_TPB0P
1394_TPB0N
1394_TPA0P
1394_TPA0N

4 4

1
1

1
R430 1394
R429 1394 R431 1394 56R2J-4-GP R433
56R2J-4-GP 56R2J-4-GP 56R2J-4-GP
1394

2
2

2
TP111 TP116 1394_TPBIAS0 1394_TPB0
TPAD28 TPAD28 27 1394_TPBIAS0
TP115

1
TPAD28 TP113 C454 1394

1
TPAD28 C448 1394 1394
SC220P50V3JN-GP R432

7412_E51

PC2 1
PC1 1
PC0 1
SC1U10V3ZY-6GP 5K1R2-GP

2
SB modify
G108

W12

U12
V12
E5
1 2
U34B PCI7412ZHK-GP

2 OF 2
GAP-CLOSE

NC#E5

PC2
PC1
PC0
1394_AGND

17 PCI_TRDY# W5 TRDY#
17 PCI_STOP# V6 STOP#
17 PCI_SERR# W6 SERR#
17 PCI_REQ#0 L3
3
17
17
PCI_PERR#
PCI_IRDY#
17,25 PCI_AD22 1 R197
2 7412_IDSEL
R7
V5
N5
REQ#
PERR#
IRDY#
IDSEL
TI PCI7412 CCLK/A16 F18 CBB_A16_R 1 R195 2 CBB_A16 27
3

100R2F-L1-GP-U L2 A11 33R2J-2-GP

17 PCI_GNT#0 GNT# CCLKRUN#/WP/IOIS16# CBB_WP 27
17 PCI_FRAME# R6 FRAME# CRST#/RESET C15 CBB_RESET 27
17 PCI_DEVSEL# U6 DEVSEL#
MS_D[3..1] A3
27 MS_D[3..1] XD_CD#/SM_PHYS_WP# XD_CD# 27
MS_D3 B6 B4 SM_CLE 27
MS_D2 MS_DATA3/SD_DAT3/SM_D3 SM_CLE SM_CD#
A6 MS_DATA2/SD_DAT2/SM_D2 SM_CD# B8 TP107 TPAD30
MS_D1 C7 MS_DATA1/SD_DAT1/SM_D1 3D3V_S0
27 MSCSDIO B7 MS_SDIO/DATA0/SD_DAT0/SM_D0 SUSPEND# 1 R196
27 MS_CLK A7
A8
MS_CLK/SD_CLK/SM_EL_WP# IDSEL:AD22 SUSPEND# J5
H3
2
10KR2J-3-GP
27 MS_CD# MS_CD# SPKROUT PCI_SPKR 29
27 MSCBS E8 MS_BS/SD_CMD/SM_WE# INTA-->:INT_PIRQG# SDA G3 1 R389 2
10KR2J-3-GP 3D3V_PLL_S0
SCL G2
1394 SCD1U25V3ZY-1GP INTB-->:INT_PIRQB# RI_OUT#/PME# L5
1 2 1394_TPBIAS1 W17 P17 PHY_TEST_MA 1 R199 2
C342 1394_TPBIAS0 R13
TPBIAS1
TPBIAS0
INTC-->:INT_PIRQF# PHY_TEST_MA 4K7R2J-2-GP
27 1394_TPBIAS0 V15 INTA# CARBUS 1 (INT_PIRQG#)
W15
TPB1P INTD-->:INT_PIRQG# J3
RN29
PM_CLKRUN# 17,31,33 INTB# 1394 (INT_PIRQB#)
1394_TPB0P TPB1N MFUNC6 MFUNC5
27 1394_TPB0P
1394_TPB0N
V13
W13
TPB0P GNT:PCI_GNT#0 MFUNC5 J2
J1 INTD# MFUNC4
3
4
2
1
3D3V_S0 INTC# Flash Media (INT_PIRQF#)
27 1394_TPB0N TPB0N MFUNC4
V16 REQ:PCI_REQ#0 H1 INT_SERIRQ 17,31,33 INTD# SD Host (INT_PIRQG#) share
1394_AGND TPA1P MFUNC3 SRN4K7J-8-GP
W16 TPA1N MFUNC2 H2 INTC# INT_PIRQF# 17
1394_TPA0P V14 H5 INTB# INT_PIRQB# 17
27 1394_TPA0P
1394_TPA0N TPA0P MFUNC1 MFUNC4: use bit 19-16 Register define.
27 1394_TPA0N W14 TPA0N MFUNC0 G1 INTA# INT_PIRQG# 17

CSTSCHG/BVD1/STSCHG#/RI#
1394_R1 T19 F1 CLK48_CARDBUS 3
2 R1 CLK_48 2
1 1394 2 1394_R0 T18 R0 A_USB_EN# E10
6K34R2F-GP R198 R12 H15
RSVD#C4/VD0/VCCD1#

CPS CBLOCK#/A19 CBB_A19 27

CAUDIO/BVD2/SPKR#

C334 SC12P50V2JN-3GP P12

CLOCK/VD1/VCCD0#

CINT#/READY/IREQ#

1394_XO TEST0
LATCH/VD3/VPPD0

2 1 R18 XO
DATA/VD2/VPPD1

1394_XI MC_PWR_CTRL-1
CREQ#/INPACK#

1394 R19 G5 TP112 TPAD30

RSVD#M19/D14

CSERR#/WAIT#

XI RSVD#G5
2

CDEVSEL#/A21
RSVD#H17/A18

CFRAME#/A23
RSVD#B10/D2

CCD1#/CD1#
CCD2#/CD2#
CPERR#/A14

CTRDY#/A22
CSTOP#/A20
CGNT#/WE#

1394 X3
CIRDY#/A15

CVS1/VS1#
C333 CVS2/VS2#
RSVD#G6
RSVD#D1
RSVD#E1
RSVD#E2
RSVD#E3

X-24D576MHZ-52GP
RSVD#F2
RSVD#F3
RSVD#F5

SC12P50V2JN-3GP 82.30023.441

GRST#

PRST#
1

PCLK
2 1
1394
3D3V_S0
71.07412.B0U
B10
C4
D1
E1
E2
E3
F2
F3
F5
G6
H17
M19

C9
A9
B9

B12
F19
E19
G17
E12
F17
G19
C14
C12
G18
A12
G15

A13
B16

N15
B11

K5
L1
K3
SB modify 12/29
2

R191 PCIRST1# 17
10KR2J-3-GP PCLK_PCM 3

27 CBB_D2 CBB_CD2# 27
1

27 VCCD1# CBB_CD1# 27
CBB_VS2# 27
2

27 CBB_A18 CBB_VS1# 27
R190
27 CBB_D14 CBB_A22 27
10KR2J-3-GP 27 VPPD0 CBB_BVD1# 27
DY 27 VCCD0# CBB_A20 27
27 VPPD1 CBB_WAIT# 27
1

27 CBB_BVD2# CBB_INPACK# 27
27 CBB_A21 CBB_A14 27
1 27 CBB_A23 CBB_A15 27 55.4H001.S04G 1
27 CBB_WE# CBB_RDY 27

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TI PCI7412 (2 of 2)
Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
26 of 42
SB
 5 4 3 2 1

PCMCIA Socket Cardbus I/F 3D3V_S0

3D3V_S0

CBB_D[15..0]
CBB_D[15..0] 25,26

2
PCMCIA1 CBB_A[25..0]
PCMCIA
CBB_A[25..0] 25,26 PCMCIA 4K7R2J-2-GP

1
NP1 PCMCIA R189
1 CBB_IORD# 25 C323 C322 U31
35 SC1U10V3ZY-6GP SCD1U16V2ZY-2GP
CBB_IOWR# 25

1
CBB_D3 2 CBB_OE# 25 3 14 VPPD1 VPPD1 26
CBB_CD1# 5V_S0 3.3V VPPD1 VPPD0
36 CBB_WE# 26 4 3.3V VPPD0 15 VPPD0 26
D CBB_D4 3 CBB_REG# 25 5 16 2211_SHDN# D
CBB_D11 5V SHTDN#
37 CBB_RDY 26 6 5V
CBB_D5 PM_PS_12V VCC_ASKT_S0
4 CBB_WP 26 9 12V PCMCIA GND 7

1
CBB_D12 38 CBB_RESET 26 C313 C319PCMCIA TPAD28
CBB_D6 5 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP TP83 8 11
CBB_D13 CBB_WAIT# 26 OC# VCCOUT VPP_ASKT_S0
39 DY 12

2
CBB_D7 CBB_INPACK# 26 VCCD0# VCCOUT
6 26 VCCD0# 1 VCCD0# VCCOUT 13
CBB_D14 40 26 VCCD1# VCCD1# 2 10
CBB_CE1# VCCD1# VPPOUT
7 CBB_CE1# 25 PCMCIA

1
CBB_D15 41 CBB_CE2# 25 TPS2211AIDBR-1GP C320
CBB_A10 8 74.02211.A79 SC1U10V3ZY-6GP
CBB_CE2# CBB_BVD1# 26
42

2
VCC_ASKT_S0 CBB_OE# CBB_BVD2# 26
9 CBB_CD1# 26
CBB_VS1# 43
CBB_A11 CBB_CD2# 26
10 CBB_VS1# 26
CBB_IORD# 44 CBB_VS2# 26
CBB_A9 11
CBB_IOWR# 45
SC4D7U10V5ZY-3GP

SC1KP50V2KX-1GP

CBB_A8 12
SCD1U25V3ZY-1GP
1

C312 C314 C311 CBB_A17 46

PCMCIA

PCMCIA

PCMCIA

CBB_A13 13
CBB_A18 47
2

CBB_A14 14
CBB_A19 48
CBB_WE# 15
CBB_A20 49
CBB_RDY 16
CBB_A21 50
17
C VPP_ASKT_S0 51 C
18
52
CBB_A16 19

4
CBB_A22 53
1

C307 C306 CBB_A15 20 PC1

PCMCIA
SCD1U25V3ZY-1GP

PCMCIA
SC4D7U10V5ZY-3GP

CBB_A23 54 CARDBUS-SKT93-GP-U
CBB_A12 21 21.H0150.001
2

CBB_A24 55
CBB_A7 22

3
CBB_A25 56 SD_D[3..0]
SD_D[3..0] 25
CBB_A6 23 SD_D0
CBB_VS2# 5V_S5 CRB1 SD_D1
CBB_A16 CBB_A5
57 PCMCIA 3D3V_S0 SD_D2
24 41 42
CBB_RESET 58 MH1 45 SD_D3
CBB_A4 5V_S5 3D3V_S0 MS_D[3..1]
CBB_WAIT#
25 2nd source: 21.H0056.011 1 2
MS_D1
MS_D[3..1] 26
59
CBB_A3 26 5V_S5 3 4 MS_D2
CBB_INPACK# 60 5 6 MS_D3
CBB_A2 27 7 8
22,31 USB_PWR_EN# USBPN3 17
CBB_REG# 61 USB_OC#3 9 10
17 USB_OC#3 USBPP3 17
Place close to pin 19. CBB_A1 28 11 12
1

CBB_BVD2# 62 26 XD_CD# 13 14
C328 CBB_A0 SD_D0 MC_PWR_CTRL 25
29 26 SM_CLE 15 16
DUMMY-C2 CBB_BVD1# 63 17 18 SD_D1
25 SM_R#
CBB_D0 30 19 20 SD_D2
25 SD_CMD
CBB_D8 64 25 SD_CLK 21 22 SD_D3
CBB_D1 31 26 MS_CD# 23 24
2

CBB_D9 65 2 1 MS_CLK-R 25 26
B 26 MS_CLK MSCSDIO 26 B
CBB_D2 32 R194 0R0402-PAD 27 28 MS_D1
26 MSCBS
CBB_D10 66 25 SD_CD# 29 30 MS_D2
CBB_WP 33 31 32 MS_D3
Clock AC termination CBB_CD2# 67 PCMCIA
25 SD_WP
33 34
34 35 36
33MHz clock for 32-bit 26 1394_TPB0N 1394_TPA0N 26
1

DY C295 68 26 1394_TPB0P 37 38 1394_TPA0P 26

SCD01U16V2KX-3GP
Cardbus card I/F NP2 31 1394_DETECT 39 40 1394_TPBIAS0 26
2

62.10024.851 43 44
CARDBUS68P-23GP MH2 46

2nd source: 62.10024.601 20.F0084.040

AMP-CONN40-2-UGP

2nd source: 20.F0853.040

A 55.4H001.S04G A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
XD
Title
MS / MS PRO
SD / SD IO / MMC PCMCIA / CARD READER BD
Size Document Number Rev

5 4
www.vinafix.vn 3 2
Date: Tuesday, March 13, 2007
Biwa
Sheet
1
27 of 42
SA
 A B C D E

Mini Card Connector

NEWCARD Connector 3D3V_S5 3D3V_S0 1D5V_S0 3D3V_S0 MINIC
NEW2 MINIC1
Reserve the symbol
1 2 for bottom side 6 1.5V REFCLK+ 13 CLK_PCIE_MINI1 3
NEW REFCLK- 11 CLK_PCIE_MINI1# 3

1
connector 2 3.3V
CARDBUS-SKT70-GP-U R400 R280 23 PCIE_RXN2 17
21.H0110.001 NEW1 0R3-0-U-GP PERN0
4 0R2J-2-GP 28 +1.5V PERP0 25 PCIE_RXP2 17 4
NP2 48
SB modify 26 DY +1.5V
31 PCIE_TXN2 17

2
PETN0
17 PCIE_TXP3 25 52 +3.3V PETP0 33 PCIE_TXP2 17
17 PCIE_TXN3 24
23 24 +3.3VAUX USB_D- 36 USBPN4 17
17 PCIE_RXP3 22 USB_D+ 38 USBPP4 17
17 PCIE_RXN3 21
20 -3 modify
3 CLK_PCIE_NEW 19 3 RESERVED#3 SMB_CLK 30
3D3V_NEW_S0 18 5 32
3 CLK_PCIE_NEW# CPPE# UMI_PWR RESERVED#5 SMB_DATA
17 TPAD30 TP66 8 RESERVED#8
TP106 NEWCARD_TEST 16 TPAD30 TP71 UMI_DATA 10
UMI_CLK RESERVED#10 MINI_WAKE#
15 12 1
UIM TPAD30 TP72 RESERVED#12 WAKE# TP64 TPAD30
1

DY EC31 14 TPAD30 TP75 UMI_RESET 14 7

3D3V_NEW_LAN_S5 TPS2231_PERST# UMI_VPP RESERVED#14 CLKREQ#
13 TPAD30 TP76 16 RESERVED#16 PERST# 22 PLT_RST1# 7,17,21,23,31,33
SCD1U10V2KX-4GP

12 17
2

31 E51_RxD RESERVED#17
1

DY EC34 17,23 PCIE_WAKE# 1DY 2 PCIE_WAKE#_R 11 31 E51_TxD 19 RESERVED#19

R192 0R2J-2-GP 10 20 4
1D5V_NEW_S0 31 WIRELESS_EN RESERVED#20 GND
SCD1U10V2KX-4GP

RN27 9 1 DY 2 37 9
2

RESERVED#37 GND
17,19,23 SMB_DATA 1 DY 4 SMB_DATA_NEW 8
5V_S5
R375 10KR2J-3-GP 39 RESERVED#39 GND 15
17,19,23 SMB_CLK 2 3 SMB_CLK_NEW 7 41 RESERVED#41 GND 18
SRN33J-5-GP-U CONN_TP1 6 43 21
TP109 CONN_TP2 RESERVED#43 GND
5 1 R386 25V_AUX_S5_MINI 45 RESERVED#45 GND 26
TP110 CPUTSB# 4 SB modify DY 47 27
0R2J-2-GP RESERVED#47 GND
3 49 RESERVED#49 GND 29
17 USBPP8 2 51 34
17 USBPN8 RESERVED#51 GND
NEW GND 35
1 GND 40
3 NP1 TPAD30 TP85 LED_WWAN# 42 50 3
WLAN_LED# LED_WWAN# GND
14 WLAN_LED# 44 LED_WLAN# GND 53
FCI-CON26-5-GP 1 LED_WPAN# 46 54
20.F0789.026 TP87 TPAD28 LED_WPAN# GND

NP1
NP2
1D5V_NEW_S0
MINIPCI52P-1-GP-U2 62.10043.331

NP1
NP2
1D5V_S0

Change to 1st 62.10043.461

3D3V_NEW_S0
3D3V_S5
3D3V_S0 3D3V_NEW_LAN_S5

1D5V_S0 3D3V_S5
R188 NEW 3D3V_S0
12
11
17
15

7,17,21,23,31,33 PLT_RST1# 1 2
2
3

0R2J-2-GP U32
1

C316 MINIC MINIC MINIC MINIC MINIC

3_3VOUT

1_5VOUT

AUXOUT
3_3VIN

1_5VIN

AUXIN

1
ST220U6D3VDM-13GP
TC21 C545 C543 C528
SC100P50V2JN-3GP DY C542 C516 C538 C530 C527
2

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
3D3V_S5

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
DY

2
SRN100KJ-6-GP RN26 NEW_PLT_RST1# 6 4 3D3V_S0
CPPE# SYSRST# NC#4 3D3V_NEW_S0
4 1 10 CPPE# NC#5 5 MINIC
3 DY 2 CPUTSB# 9 CPUSB# NC#13 13 1D5V_NEW_S0 MINIC
2 TPS2231_PERST# 1D5V_S0 2
8 PERST# NEW NC#14 14
31,34,42 S5_ENABLE 20 SHDN# NC#16 16 SB modify
RCLKEN
STBY#

GND

GND
OC#

Place near MINIC1

P2231NFC1-GP 74.02231.A73
1
18
19
21

17,31,34,38,39 PM_SLP_S3#

3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5

C317
1

C318 C326
C321 C327 C324
SCD1U16V2ZY-2GP

1
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP 55.4H001.S04G 1
NEW
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SC1U10V3ZY-6GP NEW
NEW NEW NEW NEW Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Place them Near to Chip Place them Near to Connector Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD / NEW CARD

Size Document Number Rev

A B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
28 of 42
-3
 A B C D E

3D3V_S0 5VA_S0
"VAUX" Pull high to enable standby mode
RN52
26 PCI_SPKR C549 1 2 PCI_SPKR_1 4 5

1
SCD47U10V3ZY-GP 3 6 C548 C575

1
31 KBC_BEEP C550 1 2 KBC_BEEP_1 2 7 AUDIO_BEEP 1 2AUDIP_PC_BEEP C554 C546 SC10U10V5ZY-1GP C587
SCD47U10V3ZY-GP 1 8 SC10U10V5ZY-1GP SCD1U10V2KX-4GP

2
17 ACZ_SPKR C551 1 2 ACZ_SPKR_1 SC1U10V3KX-3GP SCD1U10V2KX-4GP

2
SCD47U10V3ZY-GP SRN47KJ-1-GP C552 DY

1
4 R388 C563 2 1 4
SC100P50V2JN-3GP
10KR2J-3-GP SC10P50V2JN-4GP

2
ACZ_RST# 16,22
ACZ_SYNC 16,22

2
ACZ_BITCLK 16
1 R394 2 LINEOUT_JD# 30
C555 DY 5K1R2F-2-GP
2 1
ALC268_SENSE 1 R395 2 LINEIN_JD# 30
SC10P50V2JN-4GP 10KR2F-2-GP
C553 DY
1 R396

25
38

12
11
10

33

44
43

34
13
2 1 2 MIC_JD# 30

1
9

6
U54 20KR2F-L-GP
SC10P50V2JN-4GP

PCBEEP

BCLK

SENSE_B
SENSE_A
DVDD-IO
AVDD1
AVDD2

RESET#
DVDD

SYNC

NC#33

NC#44
NC#43
30 LINE_IN_L SC4D7U10V5KX-1GP1 2C574 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT 16,22
30 LINE_IN_R SC4D7U10V5KX-1GP1 LINE1-L_PORT-C SDATA-OUT
2C582 ALC861_LINE_IN_R 24 LINE1-R_PORT-C SDATA-IN 8 AC97_DATIN 1 2 ACZ_SDATAIN0 16
14 R392 39R2J-L-GP
NC#14
15 NC#15
SPDIFO 48
29 47 ALC_EAPD
LINE1-VREFO EAPD
31 GPIO1

1
3
30 AUD_MICIN_L
30 AUD_MICIN_R
SC2D2U10V3KX-GP 1
SC2D2U10V3KX-GP 1
2
2
C567
C570
AUD_MICIN_L_C
AUD_MICIN_R_C
21
22
MIC1-L_PORT-B
MIC1-R_PORT-B
ALC268 NC#45
DMIC-CLK
45
46 R17
0R2J-2-GP 3
SC1U10V3ZY-6GP 1 2 C559 INT_MIC1_C 16

2
30 INT_MIC1 SC1U10V3ZY-6GP 1 C564 INT_MIC2_C MIC2-L_PORT-F
2 17 MIC2-R_PORT-F HP-OUT-L_PORT-A 39 SOUNDL 30
HP-OUT-R_PORT-A 41 SOUNDR 30 G1410_SHDN# 30
RN56
SB modify 1 8 MIC1V_R 32
MIC1V_L MIC1-VREFO-R
2 7 28 MIC1-VREFO-L LINE-OUT-L_PORT-D 35 FRONTL 30

DMIC-12/GPIO0
DMIC-34/GPIO3
3 6 MIC2-VREFO 30 36 FRONTR 30
MIC2-VREFO LINE-OUT-R_PORT-D
4 5 -1 For modify for POPO noise

MONO-OUT
2

SRN2K2J-2-GP

JDREF
AVSS1
AVSS2
DVSS
DVSS

VREF

CD-G
C591 C589 C590

CD-R
CD-L
SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP
1

ALC268-GR-GP

26
42
4
7

27

40
37

2
3

18
20
19
71.00268.00G

JDREF
VREF
ALC_GPIO0

1
MONO-OUT
R393

1
1 TP114 10KR2J-3-GP
C588 R401 TPAD30 DY
SCD47U10V3ZY-GP 20KR2F-L-GP

2
2

2 2
-1 For modify layout pad

CUT MOAT
G107

POWER GENERATE 5VA_S0

*Layout* 1
GAP-CLOSE
2

20 mil
1

C569 R406 AUD_AGND

1

G913 G913
5V_S0 U52 SC22P50V2JN-4GP 28K7R2F-GP
2

1 5 5VA_SETPIN
EN NC#5
2 GND
2

3 4 R403
VIN VOUT
1
C558
SC1U10V3KX-3GP

G913
1
RT9198-4GPBG-GP 10KR2F-2-GP <Variant Name> 1
2

74.09198.A7F C571
1

C568 VOUT = 1.25 (1 + R1/R2)

SC1U10V3ZY-6GP SC2D2U6D3V3MX-1-GP
Wistron Corporation
2

SB modify 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
AUD_AGND AUD_AGND
Title
AZALIA CODEC - ALC268
Size Document Number Rev

www.vinafix.vn
Biwa -1
Date: Tuesday, March 13, 2007 Sheet 29 of 42
A B C D E
 A B C D E

AUDIO OP AMPLIFIER HP_L

C573
1 2
DY
SC470P50V2KX-3GP
I/P signal level C583
need +5V level R410
C584 1 2FRONTL_1 1 R424 2 1 2 OUTL
1 2 SOUND_L2 1 2 SOUND_L_OP1 29 FRONTL 20KR2J-L2-GP R426 10KR2J-3-GP
29 SOUNDL
SC1U10V3ZY-6GP

2
SCD22U10V2KX-1GP 15KR2J-1-GP C566
R409 1 2FRONTR_1 1 R425 2 1 2 OUTR
0R2J-2-GP 5V_S0 29 FRONTR 20KR2J-L2-GP R427 10KR2J-3-GP
4 -1 For modify layout pad SC1U10V3ZY-6GP 4
DY DY C572

1
HP_R 1 2
R390 DY
100KR2J-1-GP SC470P50V2KX-3GP
5V_S0
R398 U51 SB modify

2
2 1 16 VDD SHUTDOWN# 19 AMP_SHUTDOWN# 31
0R0603-PAD 5V_S0_VDD 6 10 LBYPASS 1 2
PVDD BYPASS C578 SC1U16V3ZY-GP
15 PVDD

1410_VSS
C581 C547 C556 SOUND_L_OP1 5 18 SPKR_R+
LIN- ROUT+
1

1
SC1U16V3ZY-GP

1 2 LIN+ 9 14 SPKR_R- C579 C1P

SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

C577 SC1U16V3ZY-GP SOUND_R_OP1 17 LIN+ ROUT- SPKR_L+

RIN- LOUT+ 4 1 2
1 2 RIN+ 7 8 SPKR_L-
2

RIN+ LOUT-

1
C576 SC1U16V3ZY-GP SC4D7U10V5ZY-3GP DY

12
11
10
U56

9
5V_S0_VDD 3D3V_S0 C565
1 R407 2 GAIN0 2 1 U53 SC2D2U16V5ZY-2GP

NC#12
NC#11

NC#9
NVDD
2
0R0402-PAD GAIN1 GAIN0 GND
3 GAIN1 GND 11

1
13 1410_VSS 1 6 C1N
GND R408 OUT C1+ 3D3V_S0 HP_R
GND 20 2 IN SHDN# 5 13 PGND INR 8
12 21 DY 10KR2J-3-GP 3 4 14 7 OUTR
NC#12 GND C1- GND NC#14 OUTR 1410_VSS
15 PVDD SVSS 6
APA2031RI-TRLGP 16 5 OUTL

2
SHDNL# OUTL

2
74.02031.01G G5930TBU-GP 17

SHDNR#
74.05930.07P GND C562

SGND
SVDD
SC2D2U16V5ZY-2GP

1
1

INL
3 R423 3
R387
C544 10KR2J-3-GP G1412R41U-GP 74.01412.0E3

1
2
3
4
1 2 SOUND_R2 1 2 SOUND_R_OP1 29 G1410_SHDN#
29 SOUNDR
3D3V_S0

2
2
SCD22U10V2KX-1GP 15KR2J-1-GP 1 R56 2 HP_L
31 AMP_SHUTDOWN#
R391 0R2J-2-GP

2
0R2J-2-GP DY

1
R414 C585
-1 For modify layout pad DY -1 For modify for POPO noise 10KR2J-3-GP
1

SC2D2U10V3ZY-1GP

2
1
Internal Speaker

6
LIN1

LINE IN -3 modify
NP2
NP1
SPKR_L-
SPKR_L+
SPKR_R-
4
3
2
29 LINEIN_JD# 5
4 SPKR_R+ 1
1 2 AUD_LINE_R 3
29 LINE_IN_R R416 1KR2J-1-GP SPKR1
6
1 2 AUD_LINE_L 2 EC142 EC141 ACES-CON4-1-GP

5
29 LINE_IN_L

1
R404 1KR2J-1-GP 1 20.D0197.104
1
2

2 EC55 EC62 EC61 2

1

1
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

PHONE-JK234-GP EC143 EC140

CDS2C16GTH-GP

CDS2C16GTH-GP
22.10133.B11 CDS2C16GTH-GP CDS2C16GTH-GP
SRN10KJ-5-GP 83.02C16.0A0 83.02C16.0A0
2nd source:22.10251.311
2

RN53
-1 For modify for ESD solution 2nd source: 20.D0174.104

2
4
3

Close to SPKR1
Reserved 0402 pad for "Varistor"

-1 For EMI
Internal Microphone
INTMIC1
3
1
LINE OUT LOUT1 2
MIC IN MICIN1
NP2
29 INT_MIC1
EC104
4

1
SC1KP50V2KX-1GP
NP2 NP1 20.D0197.102
-3 modify NP1 29 LINEOUT_JD# 5 -1 For EMI ACES-CON2-1-GP-U
29 MIC_JD# 5 4

2
4 OUTR 2 1 OUTR_1 3 2nd source: 20.F0070.002
1 2 AUD_MIC_R 3 R412 33R2J-2-GP 6 SB modify
29 AUD_MICIN_R R415 1KR2J-1-GP OUTL OUTL_1
6 2 1 2
1 2 AUD_MIC_L 2 R402 33R2J-2-GP 1
29 AUD_MICIN_L
1
2

1
R417 1KR2J-1-GP 1 EC57 <Variant Name> 1
1

EC63 EC60 EC59 C592 C586 PHONE-JK235-GP

1

1
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC680P50V2KX-2GP

SC1KP50V2KX-1GP
SC680P50V2KX-2GP

PHONE-JK233-GP DY 22.10133.B21
22.10133.B01 SRN1KJ-7-GP
2nd source:22.10251.321 Wistron Corporation
2

2nd source:22.10251.301 RN55 DY DY

2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

4
3

Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO AMP AND JACK

-1 For EMI SB modify Size Document Number Rev

www.vinafix.vn
A3
Biwa -3
Date: Tuesday, March 13, 2007 Sheet 30 of 42
A B C D E
 A

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
1

1
C104 C96 KCOL[1..18] 32,42
3D3V_AUX_S5 3D3V_S0 KROW[1..8] 32
X1

2
3
KBC_XO

1
1 2
R256

5
6
7
8

1
10KR2J-3-GP

4
3D3V_S0 R73 RESO-32D768KHZ-GP
3D3V_AUX_S5 U15B 2 OF 2 DY

33KR2J-3-GP
4
RN37 82.10026.021 4

2
CL=6pF 20PPM
SRN4K7J-10-GP D9

2
1
2N7002DW-1-GP 1 1 2 KBC_XI 77 53 KCOL1
4
3
2
1 32KX1/32KCLKIN KBSOUT0/JENK#
84.27002.D3F 17 ECSCI#_1 D18 R271 R71 52 KCOL2
BAS16-1-GP ECSCI#_KBC 10KR2J-3-GP 10MR2J-L-GP KBSOUT1/TCK KCOL3
3 KBSOUT2/TMS 51
KBC_SCL2 3 4 SMBC_G792 20 83.00016.B11 DY 50 KCOL4
KBC_XO_R KBSOUT3/TDI KCOL5
2 79 49

2
32KX2 KBSOUT4 KCOL6
2 5 23 LOW_PWR 30 CLKOUT/GPIO55 KBSOUT5/TDO 48
47 KCOL7
KBC_SDA2 KBSOUT6/RDY# KCOL8
1 6 SMBD_G792 20 32 PROGRAM# 63 TB1/GPIO14/HGPIO04 KBSOUT7 43
KCOL9
40 CHG_3S_4S# 117
31
TA2/GPIO20 KBC KBSOUT8 42
41 KCOL10
29 KBC_BEEP TA1/GPIO56 KBSOUT9
TPAD30 TP117 CHG_V_PWM 32 40 KCOL11
A_PWM0 KBSOUT10 KCOL12
40 CHG_I_PWM 118 A_PWM1/GPIO21 KBSOUT11 39
17 ECSWI# 1 14 BRIGHTNESS 62 38 KCOL13
D22 B_PWM0/GPIO13 KBSOUT12/GPIO64 KCOL14
KBSOUT13/GPIO63 37
3D3V_AUX_S5 3D3V_S0 BAS16-1-GP 3 ECSWI#_KBC 36 KCOL15
83.00016.B11 KBSOUT14/GPIO62 KCOL16
KBSOUT15/GPIO61/XOR_OUT 35
2 41 BAT_IN# 13 34 KCOL17
PSDAT3/GPIO12 KBSOUT16/GPIO60
2

10KR2J-3-GP 1 R284 2 E51_RxD 40 CHG_ON# 12 33 KCOL18

R434 PSCLK3/GPIO25 KBSOUT17/GPIO57/HGPIO03
DY 22 FP_DETECT# 11 PSDAT2/GPIO27
27 1394_DETECT 10 PSCLK2/GPIO26
10KR2J-3-GP 10KR2J-3-GP 1 R275 2 E51_TxD 32 TPDATA 71 54 KROW1
PSDAT1 KBSIN0 KROW2
DY 32 TPCLK 72 PS/2 55
1

PSCLK1 KBSIN1

2
56 KROW3
40 CHG_BCTL1 KBSIN2
R283 57 KROW4
KBSIN3 KROW5
KBSIN4 58
10KR2J-3-GP 33 SPIDI 86 59 KROW6
3D3V_AUX_S5 F_SDI KBSIN5 KROW7
3

33 SPIDO 87 60 3
1

3D3V_S0 F_SDO KBSIN6 KROW8

33 SPICS# 90
92
F_CS0# FIU KBSIN7 61
3D3V_KBC_AUX_S5 33 SPICLK F_SCK
2 1
C143 R268 0R0603-PAD 85 ECRST#
VCC_POR#
1

1
C416
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP C413 C412 C419 C140

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
2

WPC8763LDG-1-GP

102

115
71.08763.A0G
80

19
46
76
88

2
4
1 2 1 OF 2 U15A
7,17,21,23,28,33 PLT_RST1#
R267 0R0402-PAD VBAT

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
1

C417
SC470P50V2KX-3GP 3D3V_AUX_S5 ECRST#
DY
2

124 104 SRN10KJ-5-GP C459

LPCPD#/GPIO10/HGPIO00 VREF

1
PLT_RST1#_1

SC1U10V2ZY
7

E
LRESET#
3 PCLK_KBC 2
3
LCLK A/D AD0/GPI90 97
98
AD_IA 40 3
4
2
1ECRST#_Q B
16,33 LPC_LFRAME# 20,34 PURE_HW_SHUTDOWN#

2
LFRAME# AD1/GPI91 MAIL# 32 Q12
16,33 LPC_LAD0 126 LAD0 AD2/GPI92 99 INTERNET# 32
2

127 100 RN45 MMBT3906-3-GP

16,33 LPC_LAD1

C
R274 3D3V_AUX_S5 LAD1 AD3/GPI93 SYNC# 32
16,33 LPC_LAD2 128 LAD2 AD4/GPIO05 108 EPRESENTATION# 32
0R2J-2-GP KBC_MATRIX0#
16,33 LPC_LAD3 1 LAD3 LPC AD5/GPIO04 96
DY 17,26,33 INT_SERIRQ 125 SERIRQ
17,26,33 PM_CLKRUN# 8
1

C418 CLKRUN#/GPIO11/HGPIO02
16 KBRST# 122 KBRST# 3D3V_AUX_S5
1 2PCLK_KBC_RC
DY SC4D7P50V2CN-1GP
16 KA20GATE
ECSCI#_KBC
CHG_BCTL1
121
29
GA20
ECSCI#
DA0/GPI94
DA1/GPI95
101
105 BRIGHT_SETTING KBC_THERMALTRIP# 16
TP119 TPAD30
<-- -1 modify
9 SMI# D/A DA2/GPI96 106 ENERGY_DET 23
3
4

2
ECSWI#_KBC 123 107
PWUREQ# DA3/GPI97 CRT_DEC# 15
2 2

RN32 R259
SRN4K7J-8-GP
10KR2J-3-GP
KBC_SDA2 68 64 PM_SLP_S3# 17,28,34,38,39

1
KBC_SCL2 SDA2 GPIO01 CHG_BCTL0
THERMAL-----> 67 SMB 95 KBC_PWRBTN# 32
2
1

SCL2 GPIO03
41 BAT_SDA 69 SDA1 GPIO06/HGPIO06 93 AC_IN# 40
BATTERY-----> 41 BAT_SCL 70 SCL1 GPIO07/HGPIO07 94
119
LID_CLOSE# 32
GPIO23 PM_PWRBTN# 17
LDRQ#/GPIO24/HGPIO01
GPIO30
6
109
1 DY
R611
2
0R2J-2-GP
LDRQ0#
NUM_LED# 14
16,33 -1 modify
<--
17,38,39 PM_SLP_S4# 81 SWD/GPIO66 SP GPIO31 120 CAP_LED# 14
GPIO32
GPIO33
65
66
FRONT_PWRLED 14
STBY_LED 14
-1 modify
<-- G86
GPIO40 16 RSMRST#_KBC 17 1 2
32 E-BUTTON# 84 SPI_DI/GPIO77 GPIO42/TCK 17 AD_OFF 41
22 BLUETOOTH_EN 83 SPI 20 ELOCK# 32 GAP-OPEN
SPI_DO/GPIO76/SHBM GPIO43/TMS
28 WIRELESS_EN 82 SPI_SCK/GPIO75 GPIO GPIO44/TDI 21 CHG_LED 14 SB modify
91 22 SW1 ON
3D3V_AUX_S5 30 AMP_SHUTDOWN# 1 R269 2
GPIO81 GPIO45
23
BT_BTN# 14
1 5
GPIO46/TRST# WLAN_TEST_LED 14 17 PSW_CLR#
10KR2J-3-GP 24 2 6
GPIO47/JEN0# CHG_BCTL0 40
25 BT_LED 14 KBC_MATRIX0# 3 7
GPIO50/TDO
2

28 E51_TxD E51_TxD 111 26 WIRELESS_BTN# 14 4 DY 8

SOUT_CR/GPIO83/BADDR1 GPIO51

1
CIRR262 E51_RxD 113 27
10KR2J-3-GP 14
28 E51_RxD
CCD_ON 112
SIN_CR/CIRRX/GPIO87
GPIO84/HGPIO01/BADDR0
GPIO52/RDY#
GPIO53 28
BLON_OUT 14
GMCH_BL_ON 7
H Big KB(17") R287 SW-DIP-4-2-U2-GP
73 IRSL0_KBC 1 DY 2 10KR2J-3-GP
IRRX2_IRSL0/GPIO70 IRSL0 32
114 74 IRTX_KBC 1R612DY 20R2J-2-GP IRTX 32
1

14 DC_BATFULL CIRTX/GPIO16/HGPIO04 IRTX/GPIO71 IRRX1_KBC

14 75 1R613DY 20R2J-2-GP IRRX1 32
L Small KB (Biwa)

2
32 CIR GPIO34/CIRRX2 IRRX1/GPIO72 R614 0R2J-2-GP
28,34,42 S5_ENABLE 15 GPIO36 GPIO82/HGPIO00/TRIS# 110 USB_PWR_EN# 22,27
SER/IR
1

1 1

VCORF
R276
10KR2J-3-GP
R260 R263
10KR2J-3-GP
<-- -3 modify 55.4H001.S04G

44 VCORF 10KR2J-3-GP
DY DY NON_FIR Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

2
2

AGND

GND
GND
GND
GND
GND
GND

Taipei Hsien 221, Taiwan, R.O.C.

R264
1

C407
Title
10KR2J-3-GP SCD1U16V2ZY-2GP
KBC WPC8763L
103

5
18
45
78
89
116

WPC8763LDG-1-GP
1

www.vinafix.vn
71.08763.A0G
Size Document Number Rev
A3
Biwa -3
A
Date: Tuesday, March 13, 2007 Sheet 31 of 42
 A B C D E

3D3V_AUX_S5
Internet Button Mail Button Cover Up Switch

1
INTERNET1 MAIL1 3D3V_S0
1 3 1 3 RN4 R45
MAIL#_1 8 1 10KR2J-3-GP
5 5 INTERNET#_1 7 2 CVR1 R46
Program_1 6 3 3

2
2 4 2 4 E-Button_1 5 4 1 COVER_SW# 1 2 LID_CLOSE# 31
2

1
SW-TACT-91-GP SW-TACT-91-GP SRN10KJ-6-GP 4 100R2J-2-GP C48
62.40009.561 62.40009.561 SCD1U16V2ZY-2GP
4 ACES-CON2-GP-U 4

2
MAIL#_1 1 8 SB modify 20.F0714.002
INTERNET#_1 2 7 MAIL# 31
Program_1 INTERNET# 31
E-Button_1
3 6
PROGRAM# 31 2nd source: 20.F1000.002
4 5
E-BUTTON# 31
Program Button E-Button
PROGRAM1 EBUTTON1 SRN470J-3-GP
1 3 1 3 RN3 3D3V_AUX_S5

1
3
5
7
5 5 5V_S0 5V_S0
TOUCH PAD

1
ERC1
2 4 2 4 DY SRC470P50V8MX-GP
R7 2nd source: 20.K0227.012

8
7
6
5

1
SW-TACT-91-GP SW-TACT-91-GP 10KR2J-3-GP EC45 DY

2
4
6
8
62.40009.561 62.40009.561 RN48 SCD1U16V2ZY-2GP C467 ACES-CON12-4-GP

2
SC1U10V3ZY-6GP
SRN10KJ-6-GP 20.K0228.012

2
KBC_PWRBTN#_R
2 1 KBC_PWRBTN# 31
14
2nd source: 62.40009.431 R6 12

1
2
3
4
1
470R2J-2-GP C5 RN47 11
3D3V_S0 SCD1U16V2ZY-2GP 1 4 TP_DATA 10
31 TPDATA
RN2 2 3 TP_CLK 9
SYNC 31 TPCLK

2
SYNC1 8 1 1 PWRSW1 3 8
1 3 SYNC#_1 7 2 SRN100J-3-GP 7
EPRESENTATION#_1 6 3 5 22 TP_SCROLL_RIGHT 6
5 ELOCK#_1 5 4 5
2 4 Power Button 22
22
TP_SCROLL_UP
TP_SCROLL_DOWN 4
2 4 SRN10KJ-6-GP SW-TACT-103-GP-U 22 TP_LEFT 3
3 62.40009.631 22 TP_RIGHT 2 3
SW-TACT-91-GP 1 8
62.40009.561 SYNC#_1 2 7 22 TP_SCROLL_LEFT 1
EPRESENTATION#_1 3 6 SYNC# 31 13

1
ELOCK#_1 4 5 EPRESENTATION# 31 EC106 EC107 EC108 EC109 EC111 EC110 EC48 EC47
ELOCK# 31

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP
TPAD1

SC47P50V2JN

SC47P50V2JN
1

1
SRN470J-3-GP

2
RN1
EPRESENTATION
ELOCK

2
EPRESENT1 -1 modify for EMI
1 3 ELOCK1
1 3
5
5
2 4
2 4
SW-TACT-91-GP
62.40009.561 SW-TACT-91-GP
62.40009.561

Internal KeyBoard CONN EMI Bypass cap.

2
27
KB1

1 KROW8
VISHAY FIR Module 2
KROW5 EC112 SC220P50V2KX-3GP Layout Guide:
2 KROW7 KROW6 EC113
1
1
2
2 SC220P50V2KX-3GP
PlanarID
(1) FIR_3D3V : 30 mils,
3
4
KROW6
KROW5
KROW7
KROW8
EC115
EC116
1
1
2
2
SC220P50V2KX-3GP
SC220P50V2KX-3GP (2) C583, C581 close
(1,0)
5 KROW4
KROW3
to U32 SA: 0,0 3D3V_S0
6
7 KROW2 SB: 0,1
8 KROW1 KCOL9 EC117 1 2 SC220P50V2KX-3GP
-2: 1,0

1
9 KCOL18 KCOL5 EC118 1 2 SC220P50V2KX-3GP
KCOL17 KCOL6 EC119 SC220P50V2KX-3GP R273 R281
10
11 KCOL16 KCOL7 EC120
1
1
2
2 SC220P50V2KX-3GP TBD: 1,1 10KR2J-3-GP
12 KCOL15 DUMMY-R2
13 KCOL14 Place C19 ,C20

2
14 KCOL13

2
15 KCOL12 KCOL4 EC121 1 2 SC220P50V2KX-3GP 3D3V_S0 near Pin1 and FIR1
KCOL11 KCOL3 EC122 SC220P50V2KX-3GP 17 PCB_VER0
16 1 2 Pin6 17 PCB_VER1
17 KCOL10 KCOL2 EC123 1 2 SC220P50V2KX-3GP 30mil 1
KCOL9 KCOL1 EC124 SC220P50V2KX-3GP VCC2/IRED_ANODE
18 1 2 2 IRED_CATHODE
1

1
KCOL8 C593 C594 C595 10mil
SC10U10V5ZY-1GP

19 3
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

33 IRTX TXD
20 KCOL7 FIR FIR 10mil 4 R282 R272
33 IRRX1 RXD
21 KCOL6 33 IRSL0 10mil 5 FIR 10KR2J-3-GP
2

KCOL5 KCOL10 EC125 SC220P50V2KX-3GP SD DUMMY-R2

22 1 2 6 VCC1
23 KCOL4 KCOL11 EC127 1 2 SC220P50V2KX-3GP CIR_SENSE 7

2
KCOL3 KCOL12 EC126 SC220P50V2KX-3GP MODE
24 1 2 8

2
GND
2

25 KCOL2 KCOL8 EC128 1 2 SC220P50V2KX-3GP

26 KCOL1 R418
28 0R2J-2-GP FIR-TFDU6102-GP -2 modify SB modify
CIR 56.15001.051
1
KROW1 EC129 1 2 SC220P50V2KX-3GP IR_GND 55.4H001.S04G 1
1

ETY-CON26-2-GP KROW2 EC130 1 2 SC220P50V2KX-3GP 31 CIR G109

20.K0127.026 KROW3 EC131 1 2 SC220P50V2KX-3GP 1 2
KROW[1..8] KROW4 EC132 SC220P50V2KX-3GP
KROW[1..8] 31 1 2
GAP-CLOSE Wistron Corporation
KCOL[1..18] KCOL17 EC137 1 2 SC220P50V2KX-3GP -1 modify for EMI IR_GND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
KCOL[1..18] 31,42
1 25 KCOL18 EC138 1 2 SC220P50V2KX-3GP Taipei Hsien 221, Taiwan, R.O.C.
KCOL13 EC133 1 2 SC220P50V2KX-3GP
........ KCOL14 EC134 1 2 SC220P50V2KX-3GP Title
KCOL15 EC135 1 2 SC220P50V2KX-3GP
KCOL16 EC136 1 2 SC220P50V2KX-3GP BUTTONs / KB / TOUCHPAD / FIR
Size Document Number Rev

CHECK KB SPEC. AND PIN DEFINE

A
SB modify for EMI
B
www.vinafix.vn C D
Date: Tuesday, March 13, 2007
Biwa
Sheet
E
32 of 42
-2
 LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD[0..3] 16,31
LPC_LAD3
LDRQ0# 16,31
PLT_RST1# 7,17,21,23,28,31
INT_SERIRQ 17,26,31
3D3V_S0
LPC_LFRAME# 16,31
CLK14_SIO 3

1
PCLK_SIO 3

1
C695 C696 C697

1
SC1U10V3ZY-6GP SCD1U16V2ZY-2GPSCD1U16V2ZY-2GP R606

2
R608 DUMMY-R2

24
35

32
36
38
40

16
27
28
30

43
25
8
U67
FIR FIR FIR

LCLK
LAD0
LAD1
LAD2
LAD3

LDRQ#/XOR_OUT
LRESET#
SERIRQ
LFRAME#
VDD
VDD
VDD

CLKIN
DUMMY-R2

2
2
PCLK_SIO_RC CLK14_SIO_RC
1 CTS1# NC#42 42

1
44 DCD1# NC#33 33
45 37 C698 C699
DSR1# NC#37
3 RI1# NC#39 39 DUMMY-C2 DUMMY-C2

VCORF_SIO
46
10
BADRR_STRAP 2
SIN1
VCORF SIO PC87381 NC#41
NC#4
41
4

IRRX2_IRSL0/GPIO17
18

2
DTR1#_BOUT1/BADDR NC#18

1
C700

RESERVED/GPO24
FIR 47 26

CLKRUN#/GPIO22
RTS1#/TRIS# NC#26

1
SCD1U16V2ZY-2GP 48 29

GPIO21/LPCPD#
R607 SOUT1/TEST# NC#29
31

2
10KR2J-3-GP NC#31
-1 2/16 Add Super IO for FIR
FIR

GPIO00
GPIO01
GPIO02
GPIO03
GPIO04
GPIO20

GPIO23
2

IRRX1

IRTX

VSS
VSS
VSS
FIR PC87381-VBH-GP
71.87381.A0G

11
12
13
14
15
17
21
19
22
20

5
7
6

9
23
34
IRTX
IRRX1
IRSL0
Connecting a 10 K external pull-down resistor
3D3V_AUX_S5
makes the base address sample low, setting the IRTX
Index-Data pair at 2Eh-2Fh. IRTX 32
IRSL0
IRSL0 32
IRRX1 IRRX1 32
3D3V_S0
5
6
7
8

R609 PM_CLKRUN# 17,26,31

RN13
SRN10KJ-6-GP 1 FIR 2 LPCPD# 1 2 PM_SUS_STAT# 17
10KR2J-3-GP R610 DUMMY-R2

SPI FLASH ROM

4
3
2
SPI_HOLD# 1

8M Bits
2

SB modify for EMI

R326 DY
10KR2J-3-GP Close to KBC
U24 3D3V_AUX_S5
1

31 SPICS# SPICS# 1 8 150R2J-L1-GP-U

SPIDI_R CS# VCC SPI_HOLD# R297
31 SPIDI 1 2 2 DO HOLD# 7
R437 SPI_WP# 3 6 SPICLK_R 1 2 SPICLK 31
150R2J-L1-GP-U WP# CLK SPIDO_R
4 GND DIO 5 1 2 SPIDO 31
1

R438
1

EC603 150R2J-L1-GP-U
SC4D7P50V2CN-1GP W25X80-VSSI-GP EC602 C599
2

72.25X80.001 SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2

-1 modify for EMI

EMI RC circuit Close to output Pin

R first then C to GND

55.4H001.S04G

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BIOS & Super IO

www.vinafix.vn
Size Document Number Rev
A3 -2
Biwa
Date: Tuesday, March 13, 2007 Sheet 33 of 42
 1D05V_S0

2
R382

H_PWRGD_R
56R2J-4-GP

1
PM_THRMTRIP# 4,7,16
DY

E
R384
1 2 B Q13
4,16,42 H_PWRGD 1KR2J-1-GP MMBT2222A-3-GP

1
DY 84.02222.V11

C
DY C541
SCD1U10V2KX-4GP

Aux Power

2
3D3V_AUX_S5 2
D31
BAS16-1-GP 3 PURE_HW_SHUTDOWN# 20,31

37 3V/5V_EN 1
3D3V_AUX_S5
G84
1 2 3D3V_AUX_S5_G913 1 2 S5_ENABLE 28,31,42

1
5V_AUX_S5 R385 10KR2J-3-GP

1
I max = 120 mA GAP-OPEN-PWR DY DY R292
U17 C443 36K5R2F-GP
SC22P50V2JN-4GP R1

2
1 5 G913_SET

1 2
SHDN# SET
2 GND
3 IN DY OUT 4
R294
22KR2J-GP R2
DY
G913CF-GP
74.00913.A3F Vout = 1.25*(1+ R1/R2)

Run Power 5V_S0

U46
5V_S5
Aux Power 3D3V_AUX_S5
DY 1 S D 8
C560 2 S D 7
1 2 3 S D 6
4 G D 5
DCBATOUT SCD1U25V3KX-GP
Q16 RUN_POWER_ON AO4468-GP
84.04468.037
1 2 Z_12V S D
R405 10KR2J-3-GP 5V_AUX_S5
K
1

NDS0610-NL-GP C561 R397

U19 3D3V_AUX_S5
100KR2J-1-GP

84.S0610.B31 R399 D32

G

3D3V_S0
SCD1U25V3KX-GP

10KR2J-3-GP BZX384-C9V1-GP 3D3V_S5 G85

2

DY 83.9R103.B3F U50 1 5 3D3V_AUX_S5_G909 1 2

Z_12V_G3 S D VIN VOUT
2 1 1 8 2
A
2

R413 330KR2F-L-GP S D GND GAP-CLOSE-PWR

2 7 3 SHDN# NC#4 4
1

3 S D 6
R411 4 G D 5

1
100KR2J-1-GP G909-330T1U-GP C450
Z_12V_D4 AO4468-GP C451 74.00909.03F SC1U16V3ZY-GP
84.04468.037 SC1U16V3ZY-GP
Z_12V_D3 2

2
D

DY Q22
G 2N7002-11-GP
84.27002.W31
S

Q21
SB modify
D

2N7002-11-GP
84.27002.W31

17,28,31,38,39 PM_SLP_S3# G 55.4H001.S04G

S

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RUN POWER and 3D3V_AUX_S5

www.vinafix.vn
Size Document Number Rev

Biwa -1
Date: Tuesday, March 13, 2007 Sheet 34 of 42
 5 4 3 2 1

MAX8717
CPU_CORE 1D8V/1D05V
MAXIM MAX8770
Input Power Output Power
5V_S0
VDD
VID Setting Output Signal 1D8V_S3 (10A)
H_VID0 1D8V (O)
VID0(I / 1.05V) VGATE_PWRGD
H_VID1 PWRGD(OD / 3.3V) DCBATOUT_8717
VID1(I / 1.05V) VCC
D H_VID2 CLK_EN# 1D05V_S0 (13A) D
VID2(I / 1.05V) CLKEN#(O) 1D05V(O)
H_VID3
VID3(I / 1.05V)
H_VID4 Input Signal
VID4(I / 1.05V)
H_VID5 PM_SLP_S4#
VID5(I / 1.05V) Output Power EN1
H_VID6
VID6(I / 1.05V) VCC_CORE_S0(Imax=47A) PM_SLP_S3#
VCC_CORE_PWR(O) EN2 0D9V_S0
Input Signal 5V_S5
PSI# VIN
PSI# (I / 3.3V) Output Signal
CPUCORE_ON CPUCORE_ON 1D8V_S3 0D9V_S0 (1.2A)
SHDN# (I / 3.3V) PGOOD1 VLDOIN VTT
PM_DPRSLPVR
DPRSLPVR (I / 3.3V)
H_DPRSTP# PGOOD2 PM_SLP_S3#
DPRSTP# (I / 3.3V) S3 0D9V_S3
VTTREF
PM_SLP_S4#
S5
Voltage Sense
VCC_SENSE
CCI(I / Vcore) TPS51100
C
VSS_SENSE C
GNDS(I / Vcore)
1D25V_S0
Input Power 5V_S5
VCNTL
DCBATOUT_8770 1D25V_S0 (1.5A)
VCC(I) VOUT(O)
1D8V_S3
VIN
5V_S0
VCC(I)
PM_SLP_S3# CPUCORE_ON
EN POK

APL5915

ISL6236 1D5V_S3
5V/3D3V 5V_S5
VCNTL
B
1D5V_S3 (5A) B
1D8V_S3 VOUT(O)
Input Signal Output Signal VIN
POK1(OD / 5V) CPUCORE_ON
PM_SLP_S4# CPUCORE_ON
EN POK
POK2(OD / 5V) CPUCORE_ON
3V/5V_EN
ON3 APL5912
Output Power
3V/5V_EN Charger ISL6255
ON5
5V_S5 (5A)
OUT1 Input Signal Output Signal
CHGON#/OFF BT+SENSE
ICTL BATT
3D3V_S5 (5A)
OUT2
Input Power BT_TH AC_IN
PKPRES ACOK

DCBATOUT_6236
A VIN 55.4H001.S04G A
Input Power Output Power

AD+ BT+ Wistron Corporation

ACIN VOUT (O) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DCBATOUT Title
VOUT (O) Power Block Diagram
Size Document Number Rev

www.vinafix.vn
A3
Biwa SA
Date: Tuesday, March 13, 2007 Sheet 35 of 42
5 4 3 2 1
 5 4 3 2 1

G15 G16
1 2 2 1
GAP-CLOSE-PWR DCBATOUT_8770 GAP-CLOSE-PWR
D G17 G18 D
DCBATOUT 1 2 2 1 DCBATOUT
GAP-CLOSE-PWR GAP-CLOSE-PWR
G19 G20
1 2 2 1
GAP-CLOSE-PWR GAP-CLOSE-PWR
5V_S0 G21 G22
1 2 2 1
GAP-CLOSE-PWR GAP-CLOSE-PWR DCBATOUT_8770

1
R130 C225
10R3J-3-GP SC10U10V5KX-2GP

2
2

1
Id=13A

1
C228 8770_VCC DCBATOUT_8770 C154 C468 C430 C445 C150
Qg=10~14nC
1

5
6
7
8

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U25V3KX-GP
SC2D2U10V3KX-1GP

TC27

2
3D3V_S0 Rdson=9.4~12mohm SE100U25VM-7GPU

D
D
D
D

D
D
D
D

2
1
DY
2

U23 R152 U43 U20

1

200KR2F-L-GP FDS6298-GP FDS6298-GP

R146
2K2R2J-2-GP
19 VCC VDD 25 -1_0205 for acoustic noise

G
S
S
S

G
S
S
S
8 8770_TON

4
3
2
1

4
3
2
1
TON
1 C227
2

CLKEN# SCD22U16V3KX-2-GP
C
7,17 VGATE_PWRGD 2 30 8770_BST11 R127 2 8770_BST1_11 2 C
PWRGD BST1 0R0603-PAD VCC_CORE_S0
5 H_VID[0..6] H_VID0 8770_D0 8770_DH1
1 2 31 D0 DH1 29 L12
H_VID1 R128 0R0402-PAD 8770_D1
H_VID2
1
R129
1
2
0R0402-PAD
2 8770_D2
32
33
D1
28 8770_LX1
SB_20061108 1 2
H_VID3 R131 0R0402-PAD 8770_D3 D2 LX1
1 2 34 D3

1
H_VID4 R132
1 0R0402-PAD
2 8770_D4 35 26 8770_DL1 IND-D36UH-9-GP
H_VID5 R133 0R0402-PAD 8770_D5 D4 DL1 R124 R122 TC13 TC12 TC15
1 2 36 D5 DY

5
6
7
8

5
6
7
8

SE330U2VDM-6-GP

SE330U2VDM-6-GP

SE330U2VDM-6-GP
H_VID6 R134
1 0R0402-PAD
2 8770_D6 37 27 3KR2F-GP 0R0402-PAD

2
D6 PGND1

D
D
D
D

D
D
D
D
R136 0R0402-PAD 18 U44 U22
8770_PSI# GND
1 2 3 FDS6676AS-GP FDS6676AS-GP

1
4 PSI# R147 0R0402-PAD PSI#
1 R123 28770R1
1 R125 2
8770_DPRSTP# 8770_CSP1 2KR2F-3-GP
4,7,16 H_DPRSTP# 1
R140
2
0R0402-PAD
40 DPRSTP# CSP1 17
16 8770_CSN1
SB_20061113 SB_20061108 C229 NTC-10K-9-GP
CSN1 R143

G
S
S
S

G
S
S
S
1 2 8770_DPRSLPVR 39 8770_CSP1 1 2
7,17 PM_DPRSLPVR R139 0R0402-PAD DPRSLPVR 8770_FB 1 R141 2 8770_FB_1 1 10R2F-L-GP
2

4
3
2
1

4
3
2
1
1 2 8770_SHDN# 38 3K3R2F-2-GP 8770_CSN1 SCD22U16V3KX-2-GP
37,38,39 CPUCORE_ON SHDN#

1
R137 0R0402-PAD Id=14.5A PANASONIC
C233
C2421 2 8770_CCV 9 12 SC1KP50V2KX-1GP Qg=25~35nC DCBATOUT_8770 330uF / 2V / V size

2
SC470P50V2KX-3GP CCV FB
Rdson=5.9~7.25mohm ESR=6mohm / Iripple=3.7A
C2381 2 8770_REF 11
-3_20070306
SCD22U10V2KX-1GP REF 8770_CCI C2431
CCI 10 2 8770_CCI_1 1 R155 2 VCC_SENSE 5 DY

1
SC470P50V2KX-3GP 20KR2F-L-GP

5
6
7
8

5
6
7
8
20 8770_BST21 R126 2 8770_BST2_11 2 C211 C213 C437 C149 C212
BST2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
0R0603-PAD C226 SCD22U16V3KX-2-GP SCD1U25V3KX-GP

D
D
D
D

D
D
D
D

2
1 R151 2 8770_TIME 7 TIME DH2 21 8770_DH2
U18 U42
B 71K5R2F-1-GP 8770_LX2 FDS6298-GP FDS6298-GP B
LX2 22
8770_VCC
24 8770_DL2

G
S
S
S

G
S
S
S
DL2
1 R150 2 6 Id=13A

4
3
2
1

4
3
2
1
THRM
10KR2F-2-GP Qg=10~14nC
PGND2 23
Rdson=9.4~12mohm
-1_20070125 for acoustic noise
4 CPU_PROCHOT# VCC_CORE_S0
14 8770_CSP2
CSP2
15 8770_CSN2 R138
1D25V_S0 CSN2 L11
100R2F-L1-GP-U
13 8770_GNDS 1 2
SB_20061108 1 2
GNDS VSS_SENSE 5
1 R149 2 8770_VRHOT# 5 VRHOT#
TC9 TC10 TC16
1

1
SE330U2VDM-6-GP

SE330U2VDM-6-GP

SE330U2VDM-6-GP
IND-D36UH-9-GP
56R2J-4-GP 41 DY C232 R87 R85 DY
GND

5
6
7
8

5
6
7
8
TP45 TPAD30 POUT 1 R148DY2 8770_POUT 4 SC1KP-GP 3KR2F-GP 0R2J-2-GP
2

2
POUT

D
D
D
D

D
D
D
D
U39 U16
10KR2J-3-GP FDS6676AS-GP FDS6676AS-GP

1
1

SB_20061101 1 R86 28770R2

1 R84 2
DY C241 MAX8770GTL-GP 2KR2F-3-GP
SCD1U10V2KX-4GP 74.08770.073 Id=14.5A NTC-10K-9-GP
2

G
S
S
S

G
S
S
S
C231
Qg=25~35nC SB_20061108 1 2
4
3
2
1

4
3
2
1
G27 Rdson=5.9~7.25mohm
1 2 8770_CSP2 SCD22U16V3KX-2-GP

GAP-CLOSE-PWR 8770_CSN2

A 55.4H001.S04G A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VCC_CORE
Size Document Number Rev

www.vinafix.vn
A3
Biwa -3
Date: Tuesday, March 13, 2007 Sheet 36 of 42
5 4 3 2 1
 5 4 3 2 1

DCBATOUT DCBATOUT_6236 DCBATOUT

G43 G90
D 1 2 1 2 D

GAP-CLOSE-PWR GAP-CLOSE-PWR
SB_20061206
G44 G89
1 2 1 2 5V_VCC
DCBATOUT_6236
GAP-CLOSE-PWR GAP-CLOSE-PWR
G42 G88

1
1 2 1 2

1
GAP-CLOSE-PWR GAP-CLOSE-PWR 0R0402-PAD 0R0402-PAD
G45 G87 R360 C512 R567
1 2 1 2 SCD01U50V2KX-1GP

2
5V_VCC

1
GAP-CLOSE-PWR GAP-CLOSE-PWR 6236_VIN Id=9.2A
G33 R565
Qg=9~12nC,

1
0R2J-2-GP DCBATOUT_6236
1 2 DY

6236_VREF3
C510 Rdson=17.4~22mohm

1
GAP-CLOSE-PWR SCD1U25V3KX-GP 5V_AUX_S5

2
G32 DCBATOUT_6236 DY R364 C509 6236_REF_R
DCBATOUT_6236 0R2J-2-GP
1 2 -1_20070201

1
SC1U10V3KX-3GP
R369

1
GAP-CLOSE-PWR 0R0402-PAD R566 C523 C304 C305
-1_20070201

1
G34 R368 C505 0R2J-2-GP
1 2 DY

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2 100KR2F-L1-GP SC4D7U10V5KX-1GP

SCD1U50V3ZY-GP
2
1 2

2
5
6
7
8
GAP-CLOSE-PWR C250 C499 C498

6236_TON
6236_REF
2
1

D
D
D
D
LDO_EN C517
SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U10V2KX-4GP U29
SCD1U50V3ZY-GP
1

8
7
6
5

1
C C
2

D
D
D
D
TC25 U25 R361 AO4468-GP
SE100U25VM-7GPU 39KR3F-GP 84.04468.037
AO4468-GP Iomax=5A
2

G
S
S
S
84.04468.037 U48 Cyntec
-1_20070111

8
7
6
5
4
3
2
1
Id=9.2A OCP>8.88A(20V),8.48A(9V)

4
3
2
1
DCR=5.8~7mohm
SB_20061120

LDO

REF
LDOREFIN

VIN
VREF3
EN_LDO
VCC
TON
Qg=9~12nC, Irms=14A,Isat=16A 3D3V_S5

S
S
S
G
L17
Iomax=5A Cyntec Rdson=17.4~22mohm 33 G106
1
2
3
4
GND R371 1 23D3V_PWR 3D3V_PWR 1 2
OCP>8.8A(20V),8.32A(9V) DCR=11~13.2mohm 226KR3F-1-GP
Irms=11A,Isat=14.5A
SB_20061120 9
REFIN2 32
31 6236_ILIM2 1 2 IND-2D2UH-44-GP GAP-CLOSE-PWR
BYP ILIM2

1
5V_S5 10 30 G103
L16 OUT1 OUT2

5
6
7
8
G94 6236_FB1 11 29 6236_SKIP# 1 2 R563 1 2
FB1 SKIP#

1
D
D
D
D
1 2 5V_PWR 1 2 1 R358 2 6236_ILIM1 12 28 3V/5V_POK 0R0402-PAD U30 0R2J-2-GP TC23
ILIM1 POK2

SE220U6D3VM-7GP
232KR3F-GP 3V/5V_POK 13 27 3V/5V_EN R367 AO4712-GP GAP-CLOSE-PWR
POK1 EN2
1

GAP-CLOSE-PWR IND-3D3UH-55-GP 3V/5V_EN 14 26 6236_UGATE2 G105

2
R356 34 3V/5V_EN 6236_UGATE1 EN1 UGATE2 6236_PHASE2
G93 15 25 SB_20061120 1 2
0R2J-2-GP 6236_PHASE1 UGATE1 PHASE2
1 2 DY 16 PHASE1
1

1
LGATE1

LGATE2

G
S
S
S
TC20 GAP-CLOSE-PWR

BOOT1

BOOT2
SECFB
1

1
PGND
PVCC
GAP-CLOSE-PWR R564
SE220U6D3VM-7GP

G104

GND
2

4
3
2
1
8
7
6
5

G95 C503 C515 0R2J-2-GP

DY 1 2
2

D
D
D
D

1 2 U28 SCD1U25V3KX-GP 74.06236.073 SCD1U25V3KX-GP

6236_R12

6236_R22
1

AO4712-GP ISL6236IRZA-T-GP GAP-CLOSE-PWR

17
18
19
20
21
22
23
24

2
GAP-CLOSE-PWR G102
G92 0R0402-PAD 79.22710.6AL 1 2
R357 Id=9.1A R353 26236_BOOT1 6236_BOOT2 1 R370 2 6236_OUT2
1 2 SB_20061120 1
0R0603-PAD 6236_LGATE2
0R0603-PAD GAP-CLOSE-PWR
SB_20061206 Kemet 220uF
S
S
S
G
2

GAP-CLOSE-PWR Qg=12nC, 6236_LGATE1 Id=9.1A G100

1
2
3
4

G91 Rdson=15~18mohm 6D3V, V Size 1 2

B
1 2 79.22710.6AL 5V_AUX_S5 G41 Qg=12nC, ESR=25mohm B

Nippon 1 2 Rdson=15~18mohm GAP-CLOSE-PWR

1
GAP-CLOSE-PWR Kemet 220uF G101
G96 Chemi-Con C508 GAP-CLOSE Nippon 1 2
1 2 Al Cap. 6D3V, V Size SC1U10V3KX-3GP

2
ESR=25mohm Chemi-Con GAP-CLOSE-PWR
GAP-CLOSE-PWR 6D3V, F61 Al Cap. G99
G97 ESR=10mohm. 6D3V, F61 1 2
1 2
ESR=10mohm. GAP-CLOSE-PWR
GAP-CLOSE-PWR
G98
1 2
Maximum current:5A
If LIR=0.35
GAP-CLOSE-PWR
△I=5x0.35=1.75A
3D3V_PWR Vin=20V;Fsw=500K
Maximum current:5A 1
L~2.2uH
If LIR=0.35
R365
△I=5x0.35=1.75A 100KR2J-1-GP OCP:5x2=10A
Vin=20V;Fsw=400K Iocp=10-(1.75/2)~9.125A
L~3.3uH
2

Vth=9.125A*24mOhm=219mV
R(Ilim)=(219mV*10)/5uA
OCP:5x2=10A 3V/5V_POK 1 R372 2 CPUCORE_ON 36,38,39
~438K--->442K
A Iocp=10-(1.75/2)~9.125A 0R0402-PAD 55.4H001.S04G A
Vth=9.125A*24mOhm=219mV
R(Ilim)=(219mV*10)/5uA Wistron Corporation
~438K--->442K 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6236_5V_3D3V
Size Document Number Rev

www.vinafix.vn
A3
Biwa -2
Date: Tuesday, March 13, 2007 Sheet 37 of 42
5 4 3 2 1
 A B C D E

G10
DCBATOUT 1 2 DCBATOUT_8717_1D05
G5
GAP-CLOSE-PWR 1 2
DCBATOUT
G11
1 2 GAP-CLOSE-PWR
G4
GAP-CLOSE-PWR 1 2
G9
1 2 GAP-CLOSE-PWR
G3
GAP-CLOSE-PWR 1 2 TC26

1
4 G13 ST15U25VDM-3-GP 4
1 2 GAP-CLOSE-PWR 77.C1561.01L
G6

2
GAP-CLOSE-PWR 1 2
G14 -1_0208 for acoustic noise
1 2 GAP-CLOSE-PWR
G7
GAP-CLOSE-PWR 8717_BST2_1 8717_BST1_1 1 2
G12
1 2 GAP-CLOSE-PWR

1
G8
GAP-CLOSE-PWR DCBATOUT_8717_1D05 D6 1 2
0R0603-PAD DCBATOUT_8717_1D8V
R12
BAW56PT-U SB_20061106 GAP-CLOSE-PWR
83.00056.E11
C52 C51 C57

3
1

1
8717_VCC 5V_S5

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP
C19 C24 C34 C358

SCD1U50V3ZY-GP

8
7
6
5
2 SCD1U50V3KX-GP 1 R39 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP
D
D
D
D
20R3J-4-GP

SCD1U50V3ZY-GP
2

2
1

5
6
7
8
Iomax=10A

D
D
D
D
Id=13A U12 8717_BST2 C42 C17 U6
FDS6298-GP SC1U10V3KX-3GP AO4406-1-GP OCP>14.8A(20V),14.2A(9V)
Iomax=13A 1 2

2
Qg=10~14nC 84.04406.A37
OCP>18.6A(20V),17A(9V) Rdson=9.4~12mohm SC1U10V3KX-3GP Nippon Vout(cal.)=1.845V

S
S
S
G

1
U4

1
2
3
4
Chemi-Con

G
S
S
S
DCR=3.5mohm 13 17 C16 SANYO 330uF

VCC
1D05V_S0 1D05V_PWM BST2 VDD
Rs1 = L / DCR / Cs1Al Cap.

4
3
2
1
Vout(cal.)=1.075V Irms=20A,Isat=28A 8717_DH2 14 23 8717_BST11 R14 SCD1U50V3KX-GP 2D5V, ESR=9mohm
G81
L6 DH2 BST1 2
0R0603-PAD DCR=5.8~7mohm
SB_20061117 390uF/2D5V 1D8V_S3
3
SB_20061117 8717_LX2 8717_DH1 ESR=10mohm 1D8V_PWM 3
1 2 1 2
IND-1UH-41-GP-U
15 LX2 DH1 22
Irms=14A,Isat=16AL4 SB_20061117 G55
1

1
GAP-CLOSE-PWR C380 TC5 21 8717_LX1 1 2 1 2
Rs2 = L / DCR / Cs2 DY LX1
SE390U2D5VM-GP

G73 Nippon R233 IND-2D2UH-44-GP

1

8
7
6
5

1
22R2J-2-GP TC2 GAP-CLOSE-PWR
SCD1U50V3ZY-GP

1 2
Rs2
2

Chemi-Con

D
D
D
D

SE390U2D5VM-GP
DY U11 8717_DL2 16 R218 C372 G54
DL2

5
6
7
8

1
GAP-CLOSE-PWR Al Cap. R234 22R2J-2-GP
FDS6676AS-GP DY Rs1 1 2

SCD1U50V3ZY-GP
1 2

2
D
D
D
D
G80 1KR3F-GP 8717_R2 20 8717_DL1 DY
1 2 79.3971V.60L 390uF/2D5V DL1 U5 R214 GAP-CLOSE-PWR
2

1 2
SANYO 330uF ESR=10mohm DY C379 AO4706-GP 8717_R1 1K33R3F-GP G56
GAP-CLOSE-PWR SC1500P50V3KX-GP Id=14.5A 84.04706.037
SB_20061117
79.3971V.60L

S
S
S
G
1 2
2

2
G74 2D5V, ESR=9mohm DY C370

1
2
3
4
Qg=25~35nC
1

SC1500P50V3KX-GP

G
S
S
S
1 2 29 GAP-CLOSE-PWR
Cs2

2
GND

1
C27 Rdson=5.9~7.25mohm C597 G57
Ra Cs1

4
3
2
1
1

1
GAP-CLOSE-PWR SC470P50V2KX-3GP C32 SC1KP50V2KX-1GP 1 2
2

G71 R21 1 2 12 C35 DY R18

2
562R2F-GP C598 8717_CSH2 CSH2 7K87R3F-GP GAP-CLOSE-PWR
1 2 SB_20061101 1 2
2

1
SCD22U16V3KX-1-GP 11 24 DY C28 G58
GAP-CLOSE-PWR SC470P50V2KX-3GP CSL2 CSH1 8717_CSH1 SCD22U16V3KX-1-GP Rc 1 2
2

2
G82 8717_ON1 SC100P50V2JN-3GP
-1_20070125 1 2 6 25

2
17,31,39 PM_SLP_S4# R37 0R0402-PAD ON1 CSL1 GAP-CLOSE-PWR
1 2
1 2 8717_ON2 7 26 8717_FB1 G59
17,28,31,34,39 PM_SLP_S3# ON2 FB1
1

GAP-CLOSE-PWR R32 0R0402-PAD

-1_20070125 1 2
1

1
G72 R28 8717_ILIM2 8 27 CPUCORE_ON 36,37,39
ILIM2 PGOOD1
1

1
1 2 10KR3F-L-GP C44 R25 GAP-CLOSE-PWR
C40 SC1U10V3KX-3GP 8717_ILIM1 8717_REF C37 10KR3F-L-GP G60
Rb DY 28 9 SB_20061117 DY
2

GAP-CLOSE-PWR SC100P50V2JN-3GP ILIM1 PGOOD2 SC100P50V2JN-3GP 1 2

Rd
2

2
G70 Vout=(1+Ra/Rb)*1 8717_SKIP1 2 5 8717_FSEL 1 R44 2

2
SKIP1 FSEL 0R0402-PAD GAP-CLOSE-PWR
1 2

2
2 8717_SKIP2 8717_REF 8717_VCC 2
4 G52
GAP-CLOSE-PWR SKIP2 R36 R43 1 2

PGND

AGND
G83 8717_FB2 10 3 DY 0R2J-2-GP 1 DY 2 Vout=[1+(Rc/Rd)]*1
FB2 REF GAP-CLOSE-PWR
1 2

1
0R2J-2-GP G53

1
GAP-CLOSE-PWR MAX8717ETI-T-GP C47 FSET 1 2
18

19
G69 G46 SCD22U10V3KX-2GP

2
1 2 1 2 GND f = 200KHz GAP-CLOSE-PWR
REF f = 300KHz G51
GAP-CLOSE-PWR GAP-CLOSE-PWR 1 2
G68 VCC f = 500KHz
1 2 GAP-CLOSE-PWR

GAP-CLOSE-PWR
G67 Adjust the current limit threshold from R30, R35
1 2
GAP-CLOSE-PWR 8717_REF

SKIP
1

VCC=Force PWM
R30 R35 8717_VCC 8717_VCC
SB_20061120 110KR3F-GP 330KR2F-L-GP REF=Low noise
GND=Pulse Skipping
1

1
SB_20061117
2

8717_ILIM1 8717_ILIM2 DY R47

0R3-0-U-GP 0R0603-PAD
1

R41 55.4H001.S04G
1
R26 R33 8717_REF 8717_REF R38 1
2

100KR2F-L1-GP 100KR2F-L1-GP 1 R48 2 8717_SKIP1 1 2 8717_SKIP2

0R0603-PAD DY Wistron Corporation
1

1
2

R49 0R3-0-U-GP R42 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0R3-0-U-GP 0R3-0-U-GP Taipei Hsien 221, Taiwan, R.O.C.
DY DY
Title
VILIM = 0.5V~2.0V
2

MAX8717_1D8V_1D05V
Output Current = Size Document Number Rev

www.vinafix.vn
ILIM / 10 / LDCR - dI/2 A3
Biwa -2
Date: Tuesday, March 13, 2007 Sheet 38 of 42
A B C D E
 5 4 3 2 1

5V_S5
1D8V_S3

0D9V_S0

1
C202
SC10U10V5ZY-1GP C193
Iomax=1.2A OCP=3A

2
SC10U10V5ZY-1GP

2
DDR_VREF_S0
G25
U21
1 2
D D
10 1 DDR_VREF_PWR GAP-CLOSE-PWR
51100_S5 VIN VDDQSNS
17,31,38 PM_SLP_S4# 1 2 9 2 G26
R121 0R0402-PAD S5 VLDOIN
8 GND VTT 3 1 2
1 2 51100_S3 7 4
17,28,31,34,38 PM_SLP_S3# R120 0R0402-PAD S3 PGND GAP-CLOSE-PWR
6 VTTREF VTTSNS 5
G24

GND
DDR_VREF_S3 1 2

1
C223

1
G2997F6U-GP 74.02997.079 GAP-CLOSE-PWR

SCD1U16V2ZY-2GP

11
1
C203 C195 G23

2
C222 SC10U10V5ZY-1GP SC10U10V5ZY-1GP
DY 1 2

2
SCD1U16V2ZY-2GP
2
GAP-CLOSE-PWR

2nd source: 74.51110.B79

5V_S5 1D8V_LDO_1D25V G75

1 2
GAP-CLOSE-PWR 1D25V_S0

1
G76
C60
SC1U10V3ZY-6GP
C373
SC10U10V5ZY-1GP
C59
SC10U10V5ZY-1GP
1 2 Iomax=3A

2
GAP-CLOSE-PWR
C 1D8V_S3 1D8V_LDO_1D25V
DY
G77 OCP>3.8A C
G64 SB_20061201 1 2
1 2
GAP-CLOSE-PWR
Iomax=2A
U38

6
GAP-CLOSE-PWR Vo(cal.)=1.2581V G78
G61 1 2

VCNTL
1 2 1 2 5915_POK 7 5 1D25V_LDO
36,37,38 CPUCORE_ON POK VIN
R229 0R0402-PAD 9 GAP-CLOSE-PWR 1D25V_S0
GAP-CLOSE-PWR VIN
G79
G62 PM_SLP_S3# 1 2 5915_EN 8 3 1 2
R232 0R0402-PAD EN VOUT
1 2 VOUT 4
GAP-CLOSE-PWR

1
GAP-CLOSE-PWR C390 C79

1
G65 C376 2 5915_FB R236 C381 DY TC3

GND
FB

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
1 2 SCD1U16V2ZY-2GP 39KR3F-GP SC56P-GP ST100U4VBM-10-GP

2
GAP-CLOSE-PWR DY 2 APL5913-KAC-1-GP

2
74.05913.A71 SO-8-P

1
R235 KEMET
68K1R3F-1-GP
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

2
Vo=0.8*(1+(R1/R2))

B B

1D5V_S0 G40
1 2
1D8V_LDO_1D5V
Iomax=2A GAP-CLOSE-PWR
5V_S5
OCP>4A 1
G36
2
GAP-CLOSE-PWR
1

G35
1D8V_S3 1D8V_LDO_1D5V C244 C245 C246 1 2
G28 SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

1 2 GAP-CLOSE-PWR
G37
GAP-CLOSE-PWR 1 2
G29
1 2 GAP-CLOSE-PWR
U27
6

Vo(cal.)=1.5096V G38
GAP-CLOSE-PWR 1 2
VPP

G30 1 2 5912_POK 7 5 1D5V_LDO

36,37,38 CPUCORE_ON POK VIN
1 2 R328 0R0402-PAD 9 GAP-CLOSE-PWR 1D5V_S0
GND
G39
GAP-CLOSE-PWR PM_SLP_S3# 1 2 5912_EN 8 3 1 2
R329 0R0402-PAD VEN VO#3
G31 4
VO#4 C504 GAP-CLOSE-PWR
1 2
1

C493 C258 C502 TC18

SC82P50V2JN-3GP

A 55.4H001.S04G A
GAP-CLOSE-PWR 5912_FB R355 ST100U4VBM-10-GP
2 DY
SCD1U16V2ZY-2GP

GND

ADJ
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

26K7R3F-GP
2

DY G971-120ADJF11U-GP Wistron Corporation

1

74.00971.03D SO-8-P 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
1

KEMET Title
R359
30K1R3F-GP 100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm
1D25V/1D5V/0D9V
Size Document Number Rev

www.vinafix.vn
2

A3
Vo=0.8*(1+(R1/R2)) Biwa SB
Date: Tuesday, March 13, 2007 Sheet 39 of 42
5 4 3 2 1
 DY D2
2 1
Layout Trace 200mil Layout Trace 200mil DCBATOUT
SSM34PT Layout Trace 280mil
AD+
R4
U1 U7
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
7 2 2 7
6 D S 3 D02R3721F-GP-U 3 S D 6

1
5 D G 4 4 G D 5
EC2 EC6

1
FDS4435BZ-GP SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
AO4433-GP For EMI 01/26

2
2

1
C4 84.04433.A37

<--
SC1U50V5ZY-1-GP G2 G1 EC3
For EMI ID = 9.7A @

2
GAP-CLOSE

SCD1U50V3ZY-GP
DY

2
GAP-CLOSE
DY VGS = 10V

1
ISL6255_CSON

ISL6255_CSOP_1

ISL6255_CSIN_1

1
1
R213
R55 226R3F-GP
2R3J-2-GP ISL6255_SGATE
ISL6255_BGATE

2
SCD1U50V3ZY-GP

2
C361
1 2 DCBATOUT

ISL6255_CSOP

SC10U35V0ZY-GP

SC10U35V0ZY-GP
SCD1U50V3ZY-GP
20060926

5
6
7
8

1
C38

C23

C25
10KR2F-2-GP

D
D
D
D
ISL6255_CSIN

ISL6255_CSIP
R29 U8

1
ISL6255_VDD Q8 C41

2
AO4468-GP
3D3V_AUX_S5 SCD1U50V3ZY-GP
1 2 DY DY

2
ISL6255_UGATE

2
G C46 ISL6255_BOOT_1

G
S
S
S
SC1U50V5ZY-1-GP

2
3
BSS84-7-F-GP G47
S

4
3
2
1
1
84.00084.F31 D15 G48 GAP-CLOSE

21

20

19

18

17

16

15
1

R20 BAS16-1-GP GAP-CLOSE BT+

R216

1
R52 2R3J-2-GP L5

CSOP

CSIP

SGATE

BGATE

PHASE

UGATE
CSIN
100KR2J-1-GP SCD1U50V3ZY-GP CHG_PWR-2 1 2 CHG_PWR-3 1 2
C366
R208 DY

1
SC10U25V0KX-3GP

SC10U25V0KX-3GP

SC10U25V0KX-3GP
1 2 22 14 ISL6255_BOOT IND-10UH-119-GP D02R3721F-GP-U C15 C354 C360 C355
2

CSON BOOT

SC10U25V0KX-3GP
1 2ISL6255_VDD Layout Trace 240mil C357

SCD1U50V3ZY-GP
2R3J-2-GP R50

2
AC_IN# 1 2 ISL6255_ACPRN# 23 13 C31 2R3J-2-GP DY
31 AC_IN# R51 0R0402-PAD ACPRN VDDP ISL6255_VDDP 1 2
SC10U10V5ZY-1GP

DY

2
1

C56 24 12 ISL6255_LGATE SC1U10V3ZY-6GP

DCPRN LGATE CHG_PWR-2_R
Near ISL6255 Pin 13

5
6
7
8

1
DY DY
2

D
D
D
D
ISL6255_DCIN 25 11 U9 C53
DCIN PGND SC1000P50V3JN-GP

2
AO4468-GP
AD+ ISL6255_VDD CHG_BCTL1 CHG_BCTL0
26 VDD GND 10 Cell voltage

G
S
S
S
1 2 ISL6255_ACSET 27 9 ISL6255_VADJ 4.10V/cell L H

4
3
2
1
R54 ACSET VADJ
SC1U10V3ZY-6GP
1

R31
200KR2F-L-GP R53 ISL6255_ACLIM 1
15K4R3-GP
28 DCSET ACLIM 8 2 4.20V/cell H L

1
ACSET Threshold 1.27V typ. 73K2R3F-1-GP
1

R27 ISL6255_VREF
29 4.35V/cell L L
2

ACSET > 1.29V Max. --> AC GND

1
C54 10KR3F-L-GP

1
VCOMP

DETECT C33 ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/Rsense)

ICOMP
CELLS

CHLIM
2

VREF

SC2700P50V3KX-1GP

24K3R3F-GP
Near ISL6255

2
Adaptor is 90W/19V : I_LIMIT = 4.02A ( 85% )
ICM

32K4R3F-GP
EN

Pin 26 DY R560 DY

1
R212
U10
1

2
SC680P50V2KX-2GP ISL6255HRZ-1-GP ISL6255_VADJ
ISL6255_VDD C365 74.06255.A73 R562

1
100KR2J-1-GP 1 2 ISL6255_ICOMP DY R559 R561 11K8R3F-GP
300KR2F-GP 36K5R2F-GP
DY
2
1 2 ISL6255_EN ISL6255_CHLIM 2 R16 1 CHG_I_PWM 31 DY DY3D3V_AUX_S5
1
SC6800P25V2KX-1GP

C49

SC10U10V5KX-2GP

2N7002-11-GP
3D3V_AUX_S5
2

1
R217 ISL6255_VREF 100KR2J-1-GP

2
1
R211 ISL6255_VDD VADJ_1 VADJ_0
2

1
ISL6255_ICM DY C36
20060926 100KR2J-1-GP
1

10KR2J-3-GP SCD01U16V2KX-3GP

2N7002-11-GP
R298 R532 R534
ISL6255_VCOMP

DY

D
2
2

3D3V_AUX_S5
R40

130KR2F-GP 100KR2J-1-GP 100KR2J-1-GP

1

R215 R34 Q23 Q30

Q7 100R2F-L1-GP-U
DY
D

2
2N7002-11-GP 100KR2J-1-GP G G
CHG_BCTL1 31 CHG_BCTL0 31
2

84.27002.W31
1

ISL6255_VCOMP_R DY DY

S
AD_IA 31
SC100P50V2JN-3GP

G ISL6255_CELLS
31 CHG_ON#
1

1
C45

C50

C43 ICM Voltage =

SCD1U16V2ZY-2GP
S

19.9 x AC adapter Current x R sensor(20m).

1

55.4H001.S04G
2

2
2

DY R209
150KR2J-GP R210
CELLS Operate Mode DY 100KR2J-1-GP Wistron Corporation
D
2

Q6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1

VDD 4S 2N7002-11-GP Taipei Hsien 221, Taiwan, R.O.C.

G 84.27002.W31
31 CHG_3S_4S# Title
GND 3S CHARGER ISL6255
S

www.vinafix.vn
Size Document Number Rev
Float 2S A3
Biwa SB
Date: Tuesday, March 13, 2007 Sheet 40 of 42
 A B C D E

DC1
Adaptor in to generate DCBATOUT
4 AD+

Layout Trace 200mil U2 Layout Trace 200mil

1 AD+_JK 1 S D 8
4 2 S D 7 4

P4SSMJ24PT-GP
3 S D 6
2 D1 AD+_2 4 G D 5

1
1
C1 R3 C2 FDS4435BZ-GP C3
SCD1U50V3ZY-GP SCD1U50V3ZY-GP

SCD1U50V3KX-GP
3

A
2

2
200KR2F-L-GP

2
5

2
6
MH1 Q2
R2
E
DC-JACK115-GP B R1
22.10037.C51 AD_OFF_Q C

PDTA124EU-1-GP

1
84.00124.K1K
31 AD_OFF B Q1 R2
MMBT2222A-3-GP 100KR2F-L1-GP

1
84.02222.V11

2
R1
1KR2J-1-GP

2
3 3

3D3V_AUX_S5

2
BATTERY CONNECTOR 2

2
3D3V_AUX_S5
DY DY DY
D14 D13 D12
3

3
BAV99-5-GP BAV99-5-GP BAV99-5-GP
1

83.00099.T11 83.00099.T11 83.00099.T11 BAT1

R205 8
100KR2F-L1-GP 1

RN33 2
2

1 4 BATA_CLK_1 3
31 BAT_SCL
2 3 BATA_DAT_1 4
31 BAT_SDA
31 BAT_IN# 5
SRN33J-5-GP-U 6
BT+ 7
9
EC40
1

1
SC1KP50V2KX-1GP

EC4 EC5 SYN-CON7-21-GP

C18 C356 20.80862.007
SC22P50V2JN-4GP

SC22P50V2JN-4GP
SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
2

2
DY
1 55.4H001.S04G 1

-1 modify for EMI Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
-1 modify for EMI Taipei Hsien 221, Taiwan, R.O.C.

Title
AD/BATT CONN
Size Document Number Rev

www.vinafix.vn
A3
Biwa -1
Date: Tuesday, March 13, 2007 Sheet 41 of 42
A B C D E
 5 4 3 2 1

EMI Capacitor Unused gate

5V_S0
DCBATOUT 1D5V_S0 5V_AUX_S5 3D3V_S5 5V_S5 5V_S0 1D05V_S0 3D3V_S0

14

13
D D
1

1
EC22 EC19 EC17 EC8 EC1 EC21 EC26 EC33 EC30 EC13 EC32 EC14 EC11 EC29 EC35 EC50 EC36 EC16 EC24 EC51 EC20 EC18 EC42 EC10 EC25 EC12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
12 11
2

2
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY U3D
TSAHCT125PW-GP

7
2006/12/04 5V_S0 3D3V_S0 VCC_CORE_S0 1D8V_S3
DCBATOUT 1D05V_S0
SB for EMI
1

1
EC7 EC41 EC9 EC43 EC27 EC23 EC72 EC73 EC74 EC75 EC77 EC76 EC78 EC80 EC79 EC81 EC82 EC83 EC84 EC85 EC87 EC86 EC88 EC92 EC91 EC93 EC90 EC89

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

KBC JTAG Test Pad

2

2
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
KCOL1 TP88 TPAD28
31,32 KCOL1

KCOL2 TP91 TPAD28

5V_USB2_S5 DCBATOUT 3D3V_AUX_S5 BT+ 31,32 KCOL2
C C

KCOL3 TP92 TPAD28

1
EC97 EC96 EC98 EC95 EC94 EC99 EC100 EC105 EC139 31,32 KCOL3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
CARD READER BD CPU Near H8 KCOL4 TP90 TPAD28
31,32 KCOL4
H9 H8
DY DY DY DY DY
TOP HOLE HOLE
1
K1 DY
1
K2 DY KCOL6 TP89 TPAD28
31,32 KCOL6
SPRING-5-GP SPRING-5-GP
34.41Y01.001 34.41Y01.001 -1_20070115 KCOL7 TP93 TPAD28
1

31,32 KCOL7

34.42Y01.011
-1_0131 for thermal
CPU Thermal Module MDC SB MINI CARD
H18 H21 H19 H22 H20 H15 H16 H26 H25
DFX Test Point
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE

B
BOTTOM B
3D3V_AUX_S5 TP97 TPAD30
1

3D3V_S5 TP102 TPAD30

34.42Y01.011 34.42Y01.011 34.42Y01.011 34.4G502.001

5V_S5 TP100 TPAD30

CPU PCMCIA Near H8 Near H15 Near CCD Between NB & DIMM Between NB & DIMM
TP31 TPAD30
K5 K10DY K8 K7 K3 K11 K13 4,16,34 H_PWRGD
DY DY DY DY
1 1 1 1 1 1 1
K4 DY TP86 TPAD30
1 SPRING-7 SPRING-7 SPRING-23-GP SPRING-23-GP SPRING-23-GP SPRING-23-GP SPRING-35-GP 28,31,34 S5_ENABLE
34.49U26.001 34.49U26.001 34.39S07.001 34.39S07.001 34.39S07.001 34.39S07.001 34.41P18.001 TP39 TPAD30
SPRING-23-GP
K6 K9 K12 K14 4,6 H_CPURST#
34.39S07.001 DY DY
1 1 1 1

SPRING-7 SPRING-7 SPRING-23-GP SPRING-35-GP

34.49U26.001 34.49U26.001 34.39S07.001 34.41P18.001

H2 H4 H3 H11 H5 H6 H12 H10 H1 H7 H13

-1_20070206 Test Point放在Dimm Door打開可量測處
A HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE 55.4H001.S04G A
GP8 GP7 GP5 GP11 GP2 GP3 GP1 GP12
GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD
Wistron Corporation
1

1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

EMI/Spring/Boss Rev

www.vinafix.vn Biwa -1
Date: Tuesday, March 13, 2007 Sheet 42 of 42
5 4 3 2 1