60NF06 PDF
60NF06 PDF
60NF06 PDF
STP60NF06FP
N-CHANNEL 60V - 0.014Ω - 60A TO-220/TO-220FP
STripFET POWER MOSFET
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and INTERNAL SCHEMATIC DIAGRAM
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ AUTOMOTIVE
THERMAL DATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1.36 3.57 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 300 °C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 30 A
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy 360 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 30 V)
ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 2 4 V
R DS(on) Static Drain-source On VGS = 10V, ID = 30 A 0.014 0.016 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS =15V , ID = 30 A 20 S
C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 1810 pF
Coss Output Capacitance 360 pF
Crss Reverse Transfer 125 pF
Capacitance
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STP60NF06 - STP60NF06FP
SWITCHING OFF
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
td(off) Turn-off-Delay Time VDD = 30 V, ID = 30 A, 43 ns
tf Fall Time R G = 4.7Ω, VGS = 10V 20 ns
(see test circuit, Figure 3)
td(off) Off-voltage Rise Time Vclamp =48V, I D = 60 A 40 ns
tf Fall Time R G = 4.7Ω, VGS = 10V 12 ns
tc Cross-over Time (see test circuit, Figure 3) 21 ns
Safe Operating Area for TO-220 Safe Operating Area for TO-220FP
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STP60NF06 - STP60NF06FP
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STP60NF06 - STP60NF06FP
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STP60NF06 - STP60NF06FP
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load
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STP60NF06 - STP60NF06FP
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A
D
C
D1
L2
F1
G1
H2
G
Dia.
F
F2
L5
L9
L7
L6 L4
P011C
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