This document contains 24 multiple choice questions about digital logic circuits and number systems. The questions cover topics such as number bases, logic gates, adders, encoders, decoders, and multiplexers. Answer choices are provided for each question.
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This document contains 24 multiple choice questions about digital logic circuits and number systems. The questions cover topics such as number bases, logic gates, adders, encoders, decoders, and multiplexers. Answer choices are provided for each question.
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Multiple choice questions.
1. In which of the following base systems is 123 not a valid number?
(a) Base 10 (b) Base 16 (c) Base8 (d) Base 3 2. Storage of 1 KB means the following number of bytes (a) 1000 (b) 964 (c) 1024 (d) 1064 3. What is the octal equivalent of the binary number:10111101 (a) 675 (b) 275 (c) 572 (d) 573. 4. The binary code of (21.125)10 is (a) 10101.001 (b) 10100.001 (c) 10101.010 (d) 10100.111 5. A NAND gate is called a universal logic element because (a) it is used by everybody (b) any logic function can be realized by NAND gates alone (c) all the minimization techniques are applicable for optimum NAND gate realization (d) many digital computers use NAND gates. 6. The number 1000 would appear just immediately after (a) FFFF (hex) (b) 1111 (binary) (c) 7777 (octal) (d) All of the above. 7. A hexadecimal odometer displays F 52 F. The next reading will be (a)F52E (b)G52F (c)F53F (d)F53O. 8. Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is (a) TTLS (b) CMOS (c)ECL (d)TTLLS 9. The universal gate is ……………… (a) NAND gate (b) OR gate (c) AND gate (d) None of the above 10. The inverter is …………… (a) NOT gate (b) OR gate (c) AND gate (d) None of the above 11. A half adder circuit has two inputs and a) one output b)two output c) three output d)none of these 1|Page 2. A half subtractor circuit has a) 2 i/p & 2 o/p b)3 i/p & 2 o/p c) 2 i/p & 3 o/p d) none of these 12. Which one of the following is odd? a) Multiplexer b) Decoder c) Adder d) Flip-Flop 13. The output of SUM is equal to output of a) OR gate b) AND gate c) X-OR gate d) X-Nor gate 14. The output of CARRY is equal to output of a) AND gate b) OR gate c) NOT gate d) NOR gate 15. For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is: a) The same as if the carry-in is tied LOW since the least significant carry-in is ignored. b) That carry-out will always be c)00001011BCD d)00010011BCD10. 16. What is the major difference between half-adders and full-adders? a) Nothing basically; full-adders are made up of two half-adders. b) Full adders can handle double-digit numbers. c) None of these. d) All of above 17. What is the difference between a full-adder and a half-adder? a) Half-adder has a carry-in. b) Full-adder has a carry-in. c)Half-adder does not have a carry-out. d) Full-adder does not have carry output. 18. A combinational circuit which is used to change a decimal number into an equivalent BCD number is a) Decoder b) Encoder c) Multiplexer d) De-multiplexer 19. A combinational circuit which is used to change a BCD number into an equivalent decimal number is (a) Decoder b) Encoder c) Multiplexer d) Demultiplexer 20. A combinational circuit which is used to send data coming from a single source to two or more separate destinations is called as: (a) Decoder b) Encoder c) Multiplexer d) Demultiplexer 21. How many data select lines are required for selecting eight inputs? a)1 b) 2 c) 3 d) 4 22. How many 3-line-to-8-line decoders are required for a1-of-32 decoder? a)1 b)2 c)4 d)88. 23. A combinational circuit which is used to change a decimal number into an equivalent BCD number is a) Decoder b) Encoder c) Multiplexer d) Demultiplexer 24.Which of the following statements accurately represents the two BEST methods of logic circuit simplification? a) Boolean algebra and Karnaugh mapping b) Karnaugh mapping and circuit waveform analysis c) Actual circuit trial and error evaluation and waveform analysis d) Boolean algebra and actual circuit trial and error evaluation
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