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    Lab 23: Logic Circuit Families: PATH Introduction To Electronics

    Uploaded by

    Dave Allen
    This lab document provides instructions for a student to simulate various logic circuit families using a laptop and simulation software. The student will enter schematics for diode logic gates, resistor-transistor logic (RTL) gates, and combine multiple gates. By probing the input and output nodes of each simulated circuit, the student will determine the logical functions of the individual gates and combined circuits.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Lab 23: Logic Circuit Families: PATH Introduction To Electronics

    Uploaded by

    Dave Allen
    20 views2 pages
    This lab document provides instructions for a student to simulate various logic circuit families using a laptop and simulation software. The student will enter schematics for diode logic gates, resistor-transistor logic (RTL) gates, and combine multiple gates. By probing the input and output nodes of each simulated circuit, the student will determine the logical functions of the individual gates and combined circuits.

    Original Description:

    A lab for electronics class.

    Original Title

    Electronics Lab

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    This lab document provides instructions for a student to simulate various logic circuit families using a laptop and simulation software. The student will enter schematics for diode logic gates, resistor-transistor logic (RTL) gates, and combine multiple gates. By probing the input and output nodes of each simulated circuit, the student will determine the logical functions of the individual gates and combined circuits.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    20 views2 pages

    Lab 23: Logic Circuit Families: PATH Introduction To Electronics

    Uploaded by

    Dave Allen
    This lab document provides instructions for a student to simulate various logic circuit families using a laptop and simulation software. The student will enter schematics for diode logic gates, resistor-transistor logic (RTL) gates, and combine multiple gates. By probing the input and output nodes of each simulated circuit, the student will determine the logical functions of the individual gates and combined circuits.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    NAME: ______________________________________ DATE: _________________________________

    Lab 23: Logic Circuit Families


    PATH Introduction to Electronics

    Objective: This lab will introduce circuit implementations of logic functions.


    Method: Enter schematics for various logic functions and simulate.
    Equipment: Laptop
    Procedure:
    I. Enter the diode logic gate schematic below and run transient analysis. Before you probe a node, right-click on the Plot
    Plane and select Add Plot Plane twice. Then, click on the Plot Planes one at a time and probe IN1, IN2, and OUT1, one
    per Plot Plane.
    In the Plot Plane displaying OUT1, move your cursor to the far left until you see the yellow ruler icon. Left-click, and
    then change the Bottom to 0V.
    Assuming a "1"is the highest voltage and a "0" is the lowest value observed on OUT1, and a "1" and "0" for IN1 and IN2
    are 1 V and 0 V respectively, fill in the truth table for this circuit below.

    What is the logical function


    of this circuit? ____________

    II. Add the schematic below to your drawing. Based on the type of diode logic gate implemented, and the fact that one of
    the inputs is tied high, what should be the function of this gate? ___________
    Run a transient simulation on the combined circuits and fill in the truth table below.
    The logic function of the combined circuit is __________
    NAME: ______________________________________ DATE: _________________________________

    III. Enter the schematic of the RTL gate below (you can re-use the voltage supplies from your last schematic, or you can
    just add the gate to your last schematic). Run a transient simulation as before and complete the truth table below.

    IV. Enter the schematic below (you can reuse some of the previous circuit) and run the simulation. What is the value of
    OUTD at 45ms? ______

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