Solution:

Analog to Digital Converter

The ADC converts an analog input voltage to a 10-bit digital value.

The ADC is connected to an 8-channel Analog Multiplexer which allows each pin of
PortA to be used as input for the ADC. The analog input channel is selected by
writing to the MUX bits in ADMUX. This allows the selection of any of the 8
channels, AGND, or a fixed voltage reference.

The ADC has two different operating modes. In single conversion mode, each
conversion will be initiated by the user. In free running mode, the ADC is
constantly sampling and updating the ADC Data Registers. This mode is selected
by the ADFR bit in the ADC Control and Status Register.

The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSR. Voltage
reference and input channel selections will not go into effect until ADEN is set.

A conversion is started by writing a logical one to the ADC Start Conversion bit,
ADSC. This bit stays high until the conversion is complete (Hardware will clear the
bit). If a different data channel is selected while a conversion is in process, the ADC
will finish the current conversion before performing the channel change.

The 10-bit result is stored in ADC data registers ADCH and ADCL. Default is right
justified, by setting the ADLAR bit in ADMUX, the result can be left adjusted. If
using left adjusted, reading ADCH is sufficient if 8-bit precision is only required.
Otherwise, ADCL must be read first, then ADCH.

When a conversion is complete, the result is written to the ADC data registers, and
ADIF is set. In single conversion mode, ADSC is cleared simultaneously. The
software may then set ADSC again to start a new conversion. In Free Running
 Mode, a new conversion will be started immediately after the conversion completes
while ADSC remains high.

The ADC requires an input clock frequency between 50kHz and 200kHz. ADPS
bits in ADCSR are used to generate a proper ADC clock input frequency.

Using of the ADC:

Following the steps below will set up the Analog to Digital Converter for use.

1. Select the channel to convert using the MUX bits.

2. Select the voltage reference for the ADC using the REF bits.
3. Select the clock frequency for the ADC using the ADPS bits.
4. Select the justification through the ADLAR bit.
5. Select single conversion or free running mode using the ADFR
bit.
6. Enable the ADC using the ADEN bit.

The following procedure is used to read the result of the conversion.

1. Start a conversion by setting the ADSC bit.

2. Wait for the conversion to finish ( monitor the ADIF bit ).
3. Clear the conversion flag ADIF.
4. Read the results in the ADCH and ADCL registers.

ADC Registers
We will discuss the registers one by one.

ADMUX – ADC Multiplexer Selection Register

The ADMUX register is as follows.
ADMUX Register

The bits that are highlighted are of interest to us. In any case, we will discuss all the bits one by
one.

● Bits 7:6 – REFS1:0 – Reference Selection Bits – These bits are used to choose the
reference voltage. The following combinations are used.

Reference Voltage Selection

ADC Voltage Reference Pins

The ADC needs a reference voltage to work upon. For this we have three pins AREF, AVCC and
GND. We can supply our own reference voltage across AREF and GND. For this, choose the
first option. Apart from this case, you can either connect a capacitor across the AREF pin and
ground it to prevent noise, or you may choose to leave it unconnected. If you want to use the
VCC (+5V), choose the second option. Or else, choose the last option for internal Vref.
Let’s choose the second option for Vcc = 5V.
● Bit 5 – ADLAR – ADC Left Adjust Result – Make it ‘1’ to Left Adjust the ADC
Result. We will discuss this a bit later.
● Bits 4:0 – MUX4:0 – Analog Channel and Gain Selection Bits – There are 8 ADC
channels (PA0…PA7). Which one do we choose? Choose any one! It doesn’t matter.
How to choose? You can choose it by setting these bits. Since there are 5 bits, it consists
of 2^5 = 32 different conditions as follows. However, we are concerned only with the
first 8 conditions. Initially, all the bits are set to zero.
Input Channel and Gain Selections
Thus, to initialize ADMUX, we write

ADMUX = (1<<REFS0);

ADCSRA – ADC Control and Status Register A

The ADCSRA register is as follows.

ADCSRA Register

The bits that are highlighted are of interest to us. In any case, we will discuss all the bits one by
one.

● Bit 7 – ADEN – ADC Enable – As the name says, it enables the ADC feature. Unless
this is enabled, ADC operations cannot take place across PORTA i.e. PORTA will
behave as GPIO pins.
● Bit 6 – ADSC – ADC Start Conversion – Write this to ‘1’ before starting any
conversion. This 1 is written as long as the conversion is in progress, after which it
returns to zero. Normally it takes 13 ADC clock pulses for this operation. But when you
call it for the first time, it takes 25 as it performs the initialization together with it.
● Bit 5 – ADATE – ADC Auto Trigger Enable – Setting it to ‘1’ enables auto-triggering
of ADC. ADC is triggered automatically at every rising edge of the clock pulse. View the
SFIOR register for more details.
● Bit 4 – ADIF – ADC Interrupt Flag – Whenever a conversion is finished and the
registers are updated, this bit is set to ‘1’ automatically. Thus, this is used to check
whether the conversion is complete or not.
● Bit 3 – ADIE – ADC Interrupt Enable – When this bit is set to ‘1’, the ADC interrupt
is enabled. This is used in the case of interrupt-driven ADC.
 ● Bits 2:0 – ADPS2:0 – ADC Prescaler Select Bits – The prescaler (division factor
between XTAL frequency and the ADC clock frequency) is determined by selecting the
proper combination from the following.

ADC Prescaler Selections

Assuming XTAL frequency of 16MHz and the frequency range of 50kHz-200kHz, we choose a
prescaler of 128.
Thus, F_ADC = 16M/128 = 125kHz.

Thus, we initialize ADCSRA as follows.

ADCSRA = (1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0);

// prescaler = 128

ADCL and ADCH – ADC Data Registers

The result of the ADC conversion is stored here. Since the ADC has a resolution of 10 bits, it
requires 10 bits to store the result. Hence one single 8 bit register is not sufficient. We need two
registers – ADCL and ADCH (ADC Low byte and ADC High byte) as follows. The two can be
called together as ADC.
ADC Data Registers (ADLAR = 0)

ADC Data Registers (ADLAR = 1)

You can very well see the effect of the ADLAR bit (in ADMUX register). Upon setting ADLAR
= 1, the conversion result is left adjusted.

Usage:

ADMUX = 0x00; // selects channel 0 with no reference voltage

ADMUX = ADMUX | 0x40; // selects Avcc as the reference voltage

ADMUX = ADMUX | 0x20; // selects left justified results

ADCSR = 0x07; // set the ADC clock frequency

 ADCSR = ADCSR | 0x80; // enables the ADC

ADCSR = ADCSR | 0x40; // start a conversion

while( ( ADCSR & 0x10 ) == 0 ); // wait for the conversion to complete

ADCSR = ADCSR | 0x10; // clear the ADC flag

high = ADCH; // read the high byte of the result

low = ADCL; // read the low byte of the result

b) Explain ADC Prescaler. How can the Prescaler manipulate

the System Clock?
Solution:

The ADC module contains a prescaler, which divides the system clock to an acceptable ADC
clock.

The ADC of the AVR converts analog signal into digital signal at some regular interval. This
interval is determined by the clock frequency. In general, the ADC operates within a frequency
range of 50kHz to 200kHz. But the CPU clock frequency is much higher (in the order of MHz).
So to achieve it, frequency division must take place. The prescaler acts as this division factor. It
produces desired frequency from the external higher frequency. There are some predefined
division factors – 2, 4, 8, 16, 32, 64, and 128. For example, a prescaler of 64 implies F_ADC =
F_CPU/64. For F_CPU = 16MHz, F_ADC = 16M/64 = 250kHz.
c) Design a 5V (DC) voltage source using 7805.
Solution:

d) What is L293D? Draw the pin diagram of L293D.

Solution:

The L293D is a 16 pin IC, with eight pins, on each side, dedicated to the controlling of a motor.
There are 2 INPUT pins, 2 OUTPUT pins and 1 ENABLE pin for each motor. L293D consists of
two H-bridges. H-bridge is the simplest circuit for controlling a low current rated motor.

Pin diagram of L293D

e) Why do we need motor driver IC?
Solution:

Motor Driver ICs are primarily used in autonomous robotics only. Also most microprocessors
operate at low voltages and require a small amount of current to operate while the motors
require relatively higher voltages and current . Thus current cannot be supplied to the motors
from the microprocessor. This is the primary need for the motor driver IC.