EC226 - AE Lab Manual, III Semester B.Tech.

(E&C), July-Dec 2017

Expt.1 : Logic Gates Using Diodes

Aim: To design OR and AND logic gates using diodes and resistors for
a) positive logic (logic 1 = 5 V, logic 0 = 0 V)
b) negative logic (logic 1 = -5 V, logic 0 = 0 V)
Circuit Diagram

D1 D1
VOUT VOUT
D2 D2

+ + + +
V1 − − V2 1 kΩ V1 − − V2 1 kΩ

Positive logic OR gate Negative logic OR gate

D1
VOUT
D2
1 kΩ
+ +
V1 − − V2 +
− 5V

Positive logic AND gate

1. The circuit diagram for the Positive logic OR gate, Negative logic OR gate and Positive logic
AND gate are shown in the figures. Use diodes ‘1N4001’ and test the circuit with appropri-
ate voltages of V1 and V2 . Note down your observations in the format shown in the table below.

2. Simulate all the gates using any circuit simulator (LTSpice or TINA) and note down the
readings. How do you compare the simulated results with those obtained from experiments.

V1 V1 VOU T (Experimental) VOU T (Simulated)

(volts) (volts) (volts) (volts)

3. Design a Negative logic AND gate and test it in a similar way.

List/Explain the following
1. Typical voltage drop across the diodes (Silicon, Germanium, and Gallium Arsenide) for 10 mA
of forward current.

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

2. Typical reverse saturation current in 1N4001 diode.

3. Standard values of the resistors in the range of 100 Ω - 10 KΩ
4. Common cathode connection and common anode connection.

For those who are interested

1. For all the circuits, repeat the experiment with V1 =5 V and V2 =7 V. What do you get? Why?

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Expt. 2 : Diode as a Clipper/Rectifier

Aim: To study and analyze a diode based positive clipper.

Circuit Diagram

D1 vout R vout

vs R vs D1

Positive Clipper Positive Clipper

Topology-1 Topology-2

Figure above shows two topologies of a diode based positive clipper. Conduct the following
experiments.

Experiment (a)
1. Rig-up the topology-1 with diode 1N4001 and resistor R = 1 kΩ. Set the input vs =
10 sin(1000πt).
2. Observe the output vout on the Digital storage oscilloscope (DSO) along with the input vs .
Note down the waveforms on your observation book showing all the salient features of the
waveforms. How does it compare with the ideal vout .
3. Find the average (mean) value of vout using DSO. Compare it with the ideal value of the
average. What do you observe and why?
4. Repeat the steps 1 & 2 for vs = 2 sin(1000πt).
Experiment (b)
1. For the topology-1, set vs = 5 sin(1000πt). Observe and note down vs & vout for R =
100 Ω & 220 kΩ
2. What do you observe? Explain the reasons.
Experiment (c)
1. Repeat the steps 1 to 3 given in Experiment (a) for the topology-2.
2. Compare the result with that of topology-1. What do you notice? Why?
Experiment (d)
1. Perform simulations using circuit simulator for all the experiments (a) to (c) and compare with
the results obtained from hardware experiments. Plot input and output voltages for at-least
5 cycles of input. Comment on your observations.

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

For those who are interested

to Ch-2 of DSO

1 kΩ to GND of DSO

vs D1
to Ch-1 of DSO

1. Set the function generator for an output voltage of 20 V peak-to-peak and frequency 20 Hz.
2. Rig up the circuit shown in the figure below, and make the connections to the DSO as men-
tioned in the figure.
3. Put the Channel-1 of the DSO in Invert mode (to invert the waveform for displaying).
4. Set both the channels to 2 V per division and the time axis to 5 ms per division.
5. Now set the display in X-Y mode where Channel-1 voltage is plotted along x-axis and Channel-
2 is plotted along Y axis (You may seek help from Faculty members / Assistants in the lab
for this purpose).
6. What do you observe? Comment on your observation.
7. Now, increase the frequency to 200 Hz, 2 kHz, 20 kHz and 200 kHz. What do you observe?
8. Repeat all the steps by replacing the diode with a 4.7 V Zener Diode.

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Expt. 3 : Clipping & Clamping Circuits

Aim: To study clipping circuits and clamping circuits.

(i) Clipping Circuits

1 kΩ vout D1 1 kΩ vout 1 kΩ vout

D1 1 kΩ D1 D2
vs vs vs
Vd1 Vd1 Vd1 Vd2

(a) (b) (c)

Figures (a), (b) and (c) show three clipping circuits. Conduct following experiments with
vs = 10 sin(1000πt).

1. For Figure (a), find vout for Vd1 = 2 V & -2 V. Compare the practical waveform vout with the
ideal waveform (i.e. assuming ideal diode).
2. For Figure (b), find vout for Vd1 = 2 V. Compare the practical waveform vout with the ideal
waveform.
3. For Figure (c), find vout for Vd1 = 2 V & Vd2 = -5 V.
4. Simulate all the circuits for at-least 5 cycles of input. Compare the results.

(ii) Clamping Circuits

C vout

D R
vs

A typical clamping circuit is shown in the figure above. The input to this circuit is a 1 kHz sine wave
with a peak-to-peak voltage of 10 V. What is the expected output voltage waveform if RC time
constant is 10TS , where TS is the period of the input (choose R=100 kΩ). Conduct an experiment
to verify your result. Also simulate the circuit and verify the circuit functionality, especially, observe
the first few cycles as this cannot be seen in hardware experiment.

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Expt. 4 : Full-wave Rectifier

Aim: To study a full-wave bridge rectifier driven by AC mains.

Circuit Diagram

Following figure shows a bridge rectifier circuit feeding a resistor load.

P vO

+ D1 D3
230 V
50 Hz vIN 1 kΩ
+
- D4 D2 vD
N -

(a) Full-wave bridge rectifier

1. Use a step-down transformer 230 V-to-9 V (or 230 V-to-6 V).

2. Without connecting the bridge rectifier, power the transformer and observe the secondary
voltage on DSO. Measure the RMS voltage in DC-coupling mode. Is the secondary output
sinusoidal?
3. Now connect the bridge rectifier circuit and observe the output on DSO.
4. Keep the DSO in DC-coupling and measure the average output voltage (VDC ).
5. Put the DSO in AC-coupling and measure the RMS value (Vac ) of the ac component of output
voltage.
6. Find the ripple factor γ = Vac /VDC .
7. Note down the output voltage with all salient features.
8. Note down the voltage vD across diode D2 .
9. What is the peak inverse voltage (PIV) across each diode?
10. Measure the RMS value of voltage across the transformer secondary. How does it compare
with VDC .
11. Simulate the circuit using LTSpice. For the simulation replace the transformer with an ideal
sinusoidal voltage source having frequency of 50 Hz and peak-to-peak voltage equal to that of
the transformer. Find Average and RMS value of the output. Compare the results obtained
from the hardware experiment.

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Expt. 5: Unregulated and Regulated Power supply

Aim:
a) To design an unregulated power supply for an output voltage of approximately 10 V and
current 0.1 A.
b) To design a regulated power supply for an output voltage of 5 V and current of 0.1 A using
voltage regulator chip µA7805.

Experiment (a)

Following figure shows the circuit diagram of an unregulated power supply.

P vOUT
+ D1 D3
230 V
50 Hz vIN C R
- D4 D2
N

Unregulated power supply

Test the designed circuit. Measure the average output voltage (VDC ), RMS value (Vac ) of the ac
component of output voltage and ripple factor. Compare these values with the theoretical values.
How do these values compare with the unfiltered rectifier output?

Compare the results by simulating the designed circuit.

Experiment (b)

Following figure shows the circuit diagram of a regulated power supply.

1 3
P µA7805 vOUT
2
+ D1 D3
230 V
50 Hz vIN C R
- D4 D2
N

Regulated power supply

Test the circuit. Measure the average output voltage (VDC ), RMS value (Vac ) of the ac com-
ponent of output voltage and ripple factor. Compare these values with the theoretical values and
with the values obtained in experiment (a).

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Think about these

• What type of capacitors are used in the filter (Electrolytic why?)?
• How to identify the polarity of the capacitor?
• Discuss the limitations of the electrolytic capacitor.
• Why inductive capacitors are not used for filtering noise?
• What is a rectifier diode?
• What is the repetitive peak current of the diode?

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 EC226 - AE Lab Manual, III Semester B.Tech.(E&C), July-Dec 2017

Expt. 6 : RC Circuit - AC Analysis

Aim:
To study the behavior of a simple RC circuit for sinusoidal excitation.
Circuit Diagram

R vout C vout

vs C vs R

(a) (b)

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1. Design the circuit shown in Figure (a) for a time constant of sec (Choose R >> source
1000π
impedance).
2. Set the input voltage (vs ) to a peak-to-peak of 20 V.
3. Keep the DSO in AC coupling, as we need to measure AC components.
4. Measure the peak-to-peak voltage at the output for various frequencies of the input (i.e.
10 Hz, 20 Hz, 30 Hz, . . . 90 Hz, 100 Hz, 200 Hz, 300 Hz,,. . . 900 Hz, 1 kHz, 2 kHz 3 kHz and so on
upto about 100 kHz. (Before taking the readings, make sure that you are getting the desired
response by verifying the salient features of the expected response)
5. Measure the phase of the output with respect to the input by measuring the time difference
between them. Phase φ should be taken as negative if output lags the input, else take it as
positive.
6. Tabulate your measurements in the format given below.
7. Plot the gain magnitude in dB and phase angle in degrees on a semi-log sheet.
8. Find the practical value of dc gain, cut-off frequency and roll-off and compare it with the
expected values.
9. Repeat the experiment for the Figure (b)
10. Simulate both the circuits to obtain the frequency response. Also do a transient analysis by
applying a sinusoidal input at frequencies fs = fo /10, fs = fo /2, fs = fo , fs = 2fo and
fs = 10fo , where fo is the corner frequency. Correlate the results with that of the frequency
response.
Input freq. Output p-p  Gain  Gain in dB  Time difference Phase (φ)
Vout,p−p Vout,p−p
fs (Hz) Vout,p−p (V) 20 log ∆t (sec) ∆t × fs × 360o
Vs,p−p Vs,p−p