Biasing DC and Ac Load Lines

TRANSISTOR AS AN AMPLIFYING DEVICE
 Importance of Biasing
 Operating Point
 Load line (DC and AC)

TRANSISTOR BIASING
 The proper flow of zero signal collector current and the maintenance of proper
collector emitter voltage during the passage of signal is known as Transistor
Biasing.
 The circuit which provides transistor biasing is called as Biasing Circuit.
Need for DC biasing
 If a signal of very small voltage is given to the input of BJT, it cannot be amplified.
Because, for a BJT, to amplify a signal, two conditions have to be met.
 The input voltage should exceed cut-in voltage for the transistor to be ON.
 The BJT should be in the active region, to be operated as an amplifier.

Output Characteristics
When the output characteristics of a transistor are considered, the
curve looks as below for different input values.
In the above figure, the output characteristics are drawn between collector
current IC and collector voltage VCE for different values of base current IB.
These are considered here for different input values to obtain different
output curves.
Operating Point
When a value for the maximum possible collector current is
considered, that point will be present on the Y-axis, which is nothing
but the saturation point.
As well, when a value for the maximum possible collector emitter
voltage is considered, that point will be present on the X-axis, which is
the cutoff point.

Operating Point
When a line is drawn joining these two points, such a line can be called as Load
line. This is called so as it symbolizes the output at the load. This line, when drawn
over the output characteristic curve, makes contact at a point called as Operating
point.
 This operating point is also called
as quiescent point or simply Q-point.
 There can be many such intersecting
points, but the Q-point is selected in
such a way that irrespective of AC signal
swing, the transistor remains in active
region.
Operating Point
 The load line has to be drawn in order to obtain the Q-point.
 A transistor acts as a good amplifier when it is in active region and
when it is made to operate at Q-point, faithful amplification is
achieved.
 Faithful amplification is the process of obtaining complete
portions of input signal by increasing the signal strength.

DC Load line
 When the transistor is given the bias and no signal is applied at its
input, the load line drawn at such condition, can be understood
as DC condition.
 Here there will be no amplification as the signal is absent.
 The circuit will be as shown below.
 The value of collector emitter
voltage at any given time will
be
VCE=VCC−ICRC
DC Load line
 As VCC and RC are fixed values, the above one is a first degree
equation and hence will be a straight line on the output
characteristics.
 This line is called as D.C. Load line.
 The figure below shows the DC load line.
 To obtain the load line, the two end
points of the straight line are to be
determined. Let those two points be
A and B.
DC Load line
To obtain A
When collector emitter voltage VCE = 0, the collector current is maximum and is
equal to VCC/RC.
VCE=VCC−ICRC
0=VCC−ICRC
IC=VCC/RC
This gives the point A (OA = VCC/RC) on collector current axis
To obtain B
When the collector current IC = 0, then collector emitter voltage is maximum and
will be equal to the VCC. This is shown as
VCE=VCC−ICRC
VCE=VCC (As IC = 0)
This gives the point B, which means (OB = VCC) on the collector emitter voltage
axis shown in the above figure.
DC Load line
 Hence we got both the saturation and cutoff point determined and
learnt that the load line is a straight line.
 So, a DC load line can be drawn.

AC load line
 The DC load line discussed previously, analyzes the variation of
collector currents and voltages, when no AC voltage is applied.
 Whereas the AC load line gives the peak-to-peak voltage, or the
maximum possible output swing for a given amplifier.
 We shall consider an AC equivalent circuit of a CE amplifier for
our understanding.
From the above figure,
 VCE=(RC//R1)×IC
VCE=(RC//R1)×IC
rC=RC//R1
AC load line
For a transistor to operate as an amplifier, it should stay in active
region. The quiescent point is so chosen in such a way that the
maximum input signal excursion is symmetrical on both negative and
positive half cycles.
Hence,
Vmax=VCEQVmax=VCEQ and Vmin=−VCEQVmin=−VCEQ
Where VCEQ is the emitter-collector voltage at quiescent point

AC load line
The following graph represents the AC load line which is drawn
between saturation and cut off points.

AC load line
 From the graph above, the current IC at the saturation point is
IC(sat)=ICQ+(VCEQ/rC)IC(sat)=ICQ+(VCEQ/rC)
 The voltage VCE at the cutoff point is
VCE(off)=VCEQ+ICQrC
 Hence the maximum current for that corresponding VCEQ = VCEQ / (RC // R1) is
ICQ=ICQ∗(RC//R1)
 Hence by adding quiescent currents the end points of AC load line are
IC(sat)=ICQ+VCEQ/(RC//R1)
VCE(off)=VCEQ+ICQ∗(RC//R1)
AC and DC Load Line
 When AC and DC Load lines are represented in a graph, it can be understood
that they are not identical.
 Both of these lines intersect at the Q-point or quiescent point.
 The endpoints of AC load line are saturation and cut off points. This is
understood from the figure below.
 From the below figure, it is understood that the quiescent point (the dark
dot) is obtained when the value of base current IB is 10mA.
 This is the point where both the AC and DC load lines intersect.

Biasing DC and Ac Load Lines

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TRANSISTOR AS AN AMPLIFYING DEVICE

 Load line (DC and AC)

collector emitter voltage during the passage of signal is known as Transistor

 The circuit which provides transistor biasing is called as Biasing Circuit.

Need for DC biasing

Because, for a BJT, to amplify a signal, two conditions have to be met.

 The BJT should be in the active region, to be operated as an amplifier.

When a value for the maximum possible collector current is

considered, that point will be present on the Y-axis, which is nothing

but the saturation point.

As well, when a value for the maximum possible collector emitter

voltage is considered, that point will be present on the X-axis, which is

the cutoff point.

 This operating point is also called

as quiescent point or simply Q-point.

 There can be many such intersecting

points, but the Q-point is selected in

such a way that irrespective of AC signal

swing, the transistor remains in active

 The load line has to be drawn in order to obtain the Q-point.

 A transistor acts as a good amplifier when it is in active region and

when it is made to operate at Q-point, faithful amplification is

 Faithful amplification is the process of obtaining complete

portions of input signal by increasing the signal strength.

input, the load line drawn at such condition, can be understood

 Here there will be no amplification as the signal is absent.

 The circuit will be as shown below.

 The value of collector emitter

voltage at any given time will

equation and hence will be a straight line on the output

 This line is called as D.C. Load line.

 The figure below shows the DC load line.

 To obtain the load line, the two end

points of the straight line are to be

determined. Let those two points be

This gives the point A (OA = VCC/RC) on collector current axis

learnt that the load line is a straight line.

 So, a DC load line can be drawn.

 The DC load line discussed previously, analyzes the variation of

collector currents and voltages, when no AC voltage is applied.

 Whereas the AC load line gives the peak-to-peak voltage, or the

maximum possible output swing for a given amplifier.

 We shall consider an AC equivalent circuit of a CE amplifier for

From the above figure,

For a transistor to operate as an amplifier, it should stay in active

region. The quiescent point is so chosen in such a way that the

maximum input signal excursion is symmetrical on both negative and

positive half cycles.

Vmax=VCEQVmax=VCEQ and Vmin=−VCEQVmin=−VCEQ

Where VCEQ is the emitter-collector voltage at quiescent point

The following graph represents the AC load line which is drawn

between saturation and cut off points.

 From the graph above, the current IC at the saturation point is

 The voltage VCE at the cutoff point is

 When AC and DC Load lines are represented in a graph, it can be understood

that they are not identical.

 Both of these lines intersect at the Q-point or quiescent point.

understood from the figure below.