Metro Train Prototype
Metro Train Prototype
Metro Train Prototype
INTRODUCTION
Telecom
• Automotive application
Domestic application
Robotic
Aerospace application
Medical equipment
Defense system
Office automation
• Laser printers, Fax machines, Pagers, Cash registers,
Gas pumps, Credit /Debit card readers, Thermostats,
Grain analyzers.
COMPONENTS
1 IC 8051 MC 1
2 IC ULN 2003 1
3 TRANSFORMER 1
4 VOLTAGE 1
REGULATOR 7805
5 2 LINE LCD 1
DISPLAY
6 STEPPER MOTER 1
7 CRYSTAL 1
OSCILLATOR
8 SWITCH 2
9 LED 2
10 RESISTER(220 10
Ω,4.7kΩ,10kΩ)
11 CAPACITOR 2
(33pf,ceramic disk)
12 DIODE 2
13 BUZZER 1
COMPONENT DESCRIPTION
INSTRUCTIONS
PROGRAM
ASSEMBLY LANGUAGE
ASSEMBLER
An assembly language program should be converted to
machine language for execution by processor. Special
software called ASSEMBLER converts a program written in
mnemonics to its equivalent machine opcodes.
HIGH LEVEL LANGUAGE
PIN DESCRIPTION
Ground
RST (Pin 9)
RESET pin
2.INPUT pin
3.Minimum 2 machine cycles required to make RESET
•Output Pin
PORT 0
•Pins 32-39
•Pins 1 through 8
PORT 2
•Pins 21 through 28
PORT 3
•Pins 10 through 17
Block Diagram
External interrupts
On-chip Timer/Counter
CPU
Bus Serial
4 I/O Ports
OSC Control Port
P0 P1 P2 P3 TxD RxD
Address/Data
Figure No. 1.3: Block Diagram of Microcontroller
ALU
REGISTERS
•WORKING REGISTERS
•INDEX REGISTERS
•STATUS REGISTERS
•CONTROL REGISTERS
Contains configuration bits that affect processor
operation and the operating modes of various internal
subsystems.
Memory Organization
Program Memory
Data Memory
The right half of the internal and external data memory spaces available on
Atmel’s Flash microcontrollers. Hardware configuration for accessing up to 2K
bytes of external RAM. In this case, the CPU executes from internal Flash.
Port 0 serves as a multiplexed address/data bus to the RAM, and 3 lines of
Port 2 are used to page the RAM. The CPU generates RD and WR signals as
needed during external RAM accesses. You can assign up to 64K bytes of
external data memory. External data memory addresses can be either 1 or 2
bytes wide. One-byte addresses are often used in conjunction with one or
more other I/O lines to page the RAM. Two-byte addresses can also be used,
in which case the high address byte is emitted at Port 2.
Internal data memory addresses are always 1 byte wide, which implies an
address space of only 256 bytes. However, the addressing modes for internal
RAM can in fact accommodate 384 bytes. Direct addresses higher than 7FH
access one memory space, and indirect addresses higher than 7FH access a
different memory space. Thus, the Upper 128 and SFR space occupying the
same block of addresses, 80H through FFH, although they are physically
separate entities. The lowest 32 bytes are grouped into 4 banks of 8 registers.
Program instructions call out these registers as R0 through R7. Two bits in the
Program Status Word (PSW) select which register bank is in use. This
architecture allows more efficient use of code space, since register
instructions are shorter than instructions that use direct addressing.
Programming Status Word:
The bits RS0 and RS1 select one of the four register banks shown in Figure 8. A
number of instructions refer to these RAM locations as R0 through R7. The status of the
RS0 and RS1 bits at execution time determines which of the four banks is selected. The
Parity bit reflects the number of 1s in the Accumulator: P=1 if the Accumulator contains
an odd number of 1s, and P=0 if the Accumulator contains an even number of 1s.
Thus, the number of 1s in the Accumulator plus P is always even. Two bits in the PSW
are uncommitted and can be used as general purpose status flags.
Addressing Modes
The addressing modes in the Flash microcontroller instruction set are as follows.
Direct Addressing
In direct addressing, the operand is specified by an 8-bit address field in the instruction.
Only internal data RAM and SFRs can be directly addressed.
Indirect Addressing
In indirect addressing, the instruction specifies a register that contains the address of
the operand. Both internal and external RAM can be indirectly addressed. The address
register for 8-bit addresses can be either the Stack Pointer or R0 or R1 of the selected
register bank. The address register for 16-bit addresses can be only the 16-bit data
pointer register, DPTR.
Register Instructions
The register banks, which contain registers R0 through R7, can be accessed by
instructions whose opcodes carry a 3- bit register specification. Instructions that access
the registers this way make efficient use of code, since this mode eliminates an address
byte. When the instruction is executed, one of the eight registers in the selected bank is
accessed. One of four banks is selected at execution time by the two bank select bits in
the PSW.
Register-Specific Instructions
Some instructions are specific to a certain register. For example, some instructions
always operate on the Accumulator, so no address byte is needed to point to it. In these
cases, the opcode itself points to the correct register. Instructions that refer to the
Accumulator as A assemble as Accumulator-specific opcodes.
Indexed Addressing
Program memory can only be accessed via indexed addressing. This addressing mode
is intended for reading look-up tables in program memory. A 16-bit base register (either
DPTR or the Program Counter) points to the base of the table, and the Accumulator is
set up with the table entry number. The address of the table entry in program memory is
formed by adding the Accumulator data to the base pointer. Another type of indexed
addressing is used in the “case jump” instruction. In this case the dest ination address
of a jump instruction is computed as the sum of the base pointer and the Accumulator
data.
•SRAM
•DRAM
•OTP ROM
•EPROM
•EEPROM
•FLASH
BUSES
A bus is a physical group of signal lines that have a related
function. Buses allow for the transfer of electrical signals between
different parts of the processor
•Data bus
•Address bus
•Control bus
CONTROLLER LOGIC
I/O Peripherals
•Parallel Ports.
•Serial Ports.
•ADC/DAC.
FEATURES
DESCRIPTION
The ULN2001, ULN2002, ULN2003 and ULN2004 are high
voltage, high current Darlington Arrays each contain seven open
collector Darlington pairs with common emitters. Each Channel
rated at 500mA and can withstand peak currents of 600mA.
Suppression diodes are Included for inductive load driving and the
inputs are pinned opposite the outputs to simplify board
MAXIMUM RATING
3)VOLAGE REGULATOR
FEATURES
4)STEPPER MOTOR
Bipolar Stepper Motor Bipolar stepper motors are designed with separate coils.
TECHNICAL SPECIFICATIONS
· Motor
·Motor
This is the first interfacing example for the Parallel Port. We will
start with something simple. This example doesn't use the Bi-
directional feature found on newer ports, thus it should work with
most, if not all Parallel Ports. It however doesn't show the use of
the Status Port as an input. These LCD Modules are very common
these days, and are quite simple to work with, as all the logic
required to run them is on board.
Interfacing 7-Seg Display to
Microcontroller :
P2.0 A
P2.1 B
P2.2 C
P2.3 D
P2.4 E
P2.5 F
P2.6 G
Figure 3
When interfacing more than one 7-seg display the segment's (A-
G) of all displays are connected together whereas their ANODE
(Cathode in case of CC displays) are switched ON one after
another. Consider we have to display '31' on the above 7-seg
display so we TURN ON the first transistor by setting its
corresponding pin to 1 & then give the 7-seg equivalent code for
'3' which is 4fh. Then we TURN OFF the first transistor & TURN ON
the second & output its corresponding 7-seg equivalent code of
'1' i.e. 06h.Then we again go back to display '3'
SCHEMATIC DIAGRAM
CIRCUIT DESCRIPTION
6)POWER SUPPLY
BRIDGE RECTIFIER
During the positive half cycle of the input supply, the upper end
A of the transformer secondary becomes positive with respect to
its lower point B. This makes Point1 of bridge Positive with
respect to point 2. The diode D1 & D2 become forward biased &
D3 & D4 become reverse biased. As a result a current starts
flowing from point1, through D1 the load & D2 to the negative
end. During negative half cycle, the point2 becomes positive with
respect to point1. Diodes D1 & D2 now become reverse biased.
Thus a current flow from point 2 to point1.
7)TRANSFORMER
1.Step up transformer
APPLICATION
9)RESISTORS
FUNCTION
TYPES OF RESISTORS
TESTING
10)CAPACITORS
BASIC
Like a battery, a capacitor has two terminals. Inside the
capacitor, the terminals connect to two metal plates separated by
a dielectric. The dielectric can be air, paper, plastic or anything
else that does not conduct electricity and keeps the plates from
touching each other. You can easily make a capacitor from two
pieces of aluminum foil and a piece of paper. It won't be a
particularly good capacitor in terms of its storage capacity, but it
will work.
l digital meters with the specified function are used. The non-
electrolyte capacitor can be tested by using the digital meter.
11)LED
LED falls within the family of P-N junction devices. The light
emitting diode (LED) is a diode that will give off visible light when
it is energized. In any forward biased P-N junction there is, with
in the structure and primarily close to the junction, a
recombination of hole and electrons. This recombination requires
that the energy possessed by the unbound free electron be
transferred to another state. The process of giving off light by
applying an electrical source is called electroluminescence.
LED is a component used for indication. All the functions being
carried out are displayed by led .The LED is diode which glows
when the current is being flown through it in forward bias
condition. The LEDs are available in the round shell and also in
the flat shells. The positive leg is longer than negative leg.
BUZZER
Buzzer is a device used for beep signal. This will help us to make
understand information or message. A buzzer is usually electronic
device used in automobiles, household applications etc.
PREHISTORY: 8048
The 8048 already had a lot of useful features known well to 8051-
users: external code memory support; external data memory
support (inherently only 256 bytes addressed indirectly by R0 and
R1 as there is no 16 bit pointer register such as the DPTR in 8051
- the 8051 inherited this 8-bit external data access);
quasibidirectional I/O ports. Maximum clock is 11MHz, but an
instruction cycle takes 15 oscillator clocks. The "A" version
(advanced) introduced powerdown mode There were multiple
variations of the 8048 around, mostly with different numbering,
but generally denoted as the MCS-48 family. 8048 itself denoted a
mask-ROM part, 8748 an EPROM part - windowed (CERDIP -
erasable) for development, and unwindowed (PDIP) OTP. The
romless part was a bit surprisingly marked 8035 (probably most
of the parts sold as romless were parts with unusable ROM, due to
error in the "programmed" firmware). There was a low-cost
version with reduced pin count and omitted some of the features
as 8021, and versions with more ROM and RAM as 8049 (2kB
ROM/128B RAM) and 8050 (4kB ROM/256B RAM); with ROMless
versions as 8039 and 8040; and 8049 had also an EPROM version
8749 (the funny thing is, that 8749 came in 1981, one year after
8051/8751). 8048's were second sourced by a number of
manufacturers, including NEC, Toshiba, and were cloned also
behind the then iron curtain in Czechoslovakia (Tesla
MHB8048/8035) and USSR. Application specific versions of 8048
were also built quite early, with adding of various peripherals,
such as 8-bit ADC in 8022 and a parallel-bus slave interface in
8041/8042. The MCS-48 family was used in a quite wide range of
applications. One of the first applications of 8048 was in a gaming
console (Magnavox Odyssey2), but there were also more
"serious" applications, for example in one of the first car engine
"computerized" control units. But the biggest hit came when IBM
decided to use 8048 in its original PC keyboard. Although in the
AT keyboard IBM used the (presumably cheaper) 6805, it used
8042 as a co-processor on the mainboard, communicating with
the keyboard. The 8042 is still present in almost each and every
PC even today, but don't search for a chip with "8042" on it - it is
integrated in the chipset. It may come as a surprise to somebody,
but thanks to this fact the 8048 with its derivatives is most
probably the most widespread microcontroller at all.
THE NEST
Similar to 8048, also the 8051 has been licensed to various
manufacturers worldwide. Some of the early adopters include
Philips, Signetics, MHS (Matra) and Siemens. Most of these
companies don't exist any more, some have been taken over,
others have been renamed; but most of them still manufacture
some derivative of 8051. The licensees started to make fully
compatible models. Naturally, they took over also the datasheets,
for example the "bible" is better used in the Philips version, which
is a verbatim copy of the Intel version, except that it is a true
searchable pdf, while the Intel is a scanned copy of paper
document, unsearchable. More than that, the manufacturers took
over the annoying practice of Intel to include in datasheets only
the specific differences to the "bible", very confusing for the
newbies (but there are opinions on this, some of the users
consider this arrangement better than having huge datasheets
containing all the “common” details). The manufacturers
published their own appnotes, which all together form a huge
knowledge base and code library, but... due to competition it is
scattered across the manufacturers' sites, an another confusing
fact for the newbies. Later, the manufacturers rolled out their
own derivatives and variants with varying marking - there is no
real standard in it (although there are some idiosyncrasies
present in the marking of most manufacturers). All types of
modifications described in the following chapters were applied;
but the compatibility to the original 8051 was usually maintained.
This, together with the availability of second-, third-,...,35th-,...-
source of 8051 is the true source of its immortality.
EMBEDDED IN EMBEDDED
Intel and the licensees soon realized that 8051 is a nice core that
can be embedded in various ASIC chips to perform setup and
control tasks. Typically, the resources of the ASIC are mapped as
external data memory, as if the ASIC would be connected to a
conventional 8051 chip. This approach allows to use an
unmodified core, which speeds up the chip development and
decreases the chance for error; also the ASIC could be
breadboard-prototyped in this form easily. As an example, Intel
produced 80C51SL, a descendant of 8042. Philips has a line of
8051-based teletext controllers. In a particular USB webcamera,
the chip interfacing the CCD and USB was controlled by an
embedded 8051. There are probably much more examples
around, but most of them never get public. In spite of this, the
8051 in this form is produced probably in much higher volumes
than as general-purpose microcontrollers.
EXTRAS
WHERE IS IT GOING?
The 8051 is a sound mcu core with rich history. However, it seems
that it is already over its peak, although it might take quite a lot
of time until it will be completely replaced by most modern
microcontrollers. So we now have superfast 8051 derivatives with
loads of internal FLASH and RAM. ISP and IAP seems to be the
standard these days. There are the 8051s built around advanced
analog circuits, mainly high resolution ADC. There are derivatives
suitable for extreme applications – high temperature, radiation
hardened. There are softcores around, tuned up, and even open
source. There is a wealth of knowledge and experience, however,
it is scattered around and the newbies tend to get the easier path
- competing 8-bit microcontrollers usually do have a single-stop
information resource site, so this knowledge and experience
seems to die out as the "old boys" retire gradually. The price
difference between the high-end 8-bitters and the much more
powerful low-end 32-bit RISCs (such as the ARMs) seems to
decrease rapidly and will change eventually, as the 32-bitters are
becoming the standard in all but the least demanding
applications.So there is perhaps still a need for the 8051s, but this
need is decreasing and 8051s life cycle is slowly approaching its
end.
CHAPTER 3
1) P.C.B. DESIGNING
P.C.B. LAYOUT
DRILLING
ETCHING
SOLDERING
•Mass soldering.
1.Use always an iron plated copper core tip for soldering iron.
3.Use a wet sponge to wipe out dirt from the tip before soldering
instead of asking the iron.
7.Iron should be kept in contact with the joint for 2-3 seconds only
instead of keeping for very long or very small time.
2) WORKING OF PROJECT
1.POWER SUPPLY
2.8051 IC
3.DISPLAY UNIT
1.TRANSFORMER
2.7805 REGULATOR
3.DIODES 4007 (in bridge shape)
1 IC 8051 MC 1 ------
3 TRANSFORMER 1 9-0-9
4 VOLTAGE 1 7805
REGULATOR
7805
5 2 LINE LCD 1 ------
DISPLAY
6 STEPPER 1 ------
MOTER
7 CRYSTAL 1 12mhz
OSCILLATOR
8 SWITCH 2 ------
9 LED 2 ------
10 RESISTER(220 10 220
Ω,4.7kΩ,10kΩ) Ω,4.7kΩ,10
kΩ
11 CAPACITOR 2 33pf
(33pf,ceramic ,
disk) 470µf,100
µ
12 DIODE 2 ------
13 BUZZER 1 ------
14 PCB 1 ------
15 VARIABLE 1 10k
RESISTANCE
16 40 PIN IC 1 -----
BASE
PROBLEM FACED
•First problem that was in making the circuit of METRO
TRAIN PROTOTYPE that, it is difficult to match time with
rotation of stepper motor & LCD.
•Second problem is faced due to redundancy in handling
the rotation of STEPPER MOTOR
•We have to take extra care while soldering 2 line LCD
•During soldering, many of the connection become short
cktd. So we desolder the connection and did soldering
again.
•A leg of the crystal oscillator was broken during
mounting. So it has to be replaced.
•LED`s get damaged when we switched ON the supply so
we replace it by the new one.
TROUBLESHOOT
•Care should be taken while soldering. There should be
no shorting of joints.
•Proper power supply should maintain.
•Project should be handled with care since IC are delicate
•Component change and check again circuit
CHAPTER 5 CONCULSION
AREA OF APPLICATIONS
REFRENCES
1.Collins, J.; Pymm, P, “Replacement of the station data
logger at Hunterston B nuclear power station”,
‘Retrofit and Upgrading of Computer Equipment in
Nuclear Power Stations, IEE Colloquium’ on 11 Mar 1991
Page(s):11 - 15.
2.Engel berg, S.; Kaminsky, T.; Horesh, M.;
“Instrumentation notes - A USB-Enabled, FLASH-Disk-
Based DAS”Vol. 10, Issue 2, April 2007 Page(s):63 – 66.
, Instrumentation & Measurement Magazine, IEEE,
3.Erdem, H, “Design and implementation of data
acquisition for fuzzy logic controller
” ‘Industrial Technology, 2002. IEEE ICIT '02. 2002 IEEE
International Conference’ on 11-14 Dec. 2002
Page(s):199 - 204 vol.1.
4.Kuchta, R.; Stefan, P.; Barton, Z.; Vrba, R.; Sveda, M,
“Wireless temperature data logger”,
‘Sensors and the International Conference on new
Techniques in Pharmaceutical and Biomedical Research,
2005 Asian Conference’ on 5-7 Sept. 2005 Page(s):208 –
212.
5.Lee Tat Man, “Recording power demand characteristics
and harmonic pollution by a general-purpose data
logger”,
‘Advances in Power System Control, Operation and
Management, 1991. APSCOM-91., 1991 International
Conference’ on 5-8 Nov 1991 Page(s):737 - 743 vol.2.
6.Luharuka, E.; GAO, R.X., “A microcontroller-based data
acquisition for physiological sensing
”, ‘Instrumentation and Measurement Technology
Conference, 2002. IMTC/2002. Proceedings of the 19th
IEEE’, 21-23 May 2002 Page(s):175 - 180 vol.1
WEBSITES
www.atmel.com
www.seimens.com
www.philipsemiconductors.com
www.howstuffworks.com
www.alldatasheets.com
www.efyprojects.com
www.thomson.com/learning
www.google.com
APPENDIX
CODING
Program for a stepper having connected & to show
message on the LCD
$mod51
data equ p1 ;p0
busy equ p0.7 ;p0.7
rs equ p3.2
rw equ p3.1
en equ p3.0
org 400h
show0: db 'Welcome To All','0'
show1: db 'Current Station','0'
show2: db 'Next Station','0'
show3: db 'Aligarh','0'
show4: db 'Ghaziabad','0'
Show5: db 'New Delhi','0'
org 0000h
here:
mov p2,#00h
acall ini
mov dptr,# show0
acall read
clr p3.3 ;p1.0
acall delay
mov a,#01h
acall command;
Now make memory clear cursor home
mov dptr,#show1
acall read
mov a,#0c0h
acall command
mov dptr,#show3
acall read
acall delay ;
Stopage1 time 3 sec new delhi
acall delay
acall delay
mov a,#01h
acall command
mov dptr,#show2
acall read
mov a,#0c0h
acall command
mov dptr,#show4
acall read ;
acall delay ;Stopage1 time 3 sec new delhi
acall stepperf
mov a,#01h
acall command
mov dptr,#show1
acall delay
;Stopage2 time 3 sec greater noida
acall delay
acall delay
setb p3.3
; p1.0 ;off led at p1.0 for forward journey
clr p3.4 ; p1.1
; 0n Led for back ward journey
mov a,#01h
acall command
mov dptr,#show2
;display ne noida
acall read
mov a,#0c0h
acall command
mov dptr,#show4
acall read
acall stepperb
mov a,#01h
acall command
mov dptr,#show1
acall read
mov a,#0c0h
acall command
mov dptr,#show4
acall read
acall delay
;Stopage2 time 3 sec noida
acall delay
acall delay
mov a,#01h
acall command
mov dptr,#show2 ;display ne new delhi
acall read
mov a,#0c0h
acall command
mov dptr,#show3
acall read ;
acall delay
acall stepperb
mov a,#01h
acall command
mov dptr,#show1
acall read
mov a,#0c0h
acall command
mov dptr,#show3
acall read
setb p3.4 ;p1.1
ljmp here
;routine for stepper motor
; Delay Routine
delay:
push acc
push 00h
push 01h
push p0
push p1
mov r0,#0eh
loopr:
mov a,#0ffh
loopb:
mov b,#0ffh
loopa:
djnz b,loopa
djnz 0e0h,loopb
djnz r0,loopr
pop p1
pop p0
pop 01h
pop 00h
pop acc
ret ;
dlay stepper delays:
push acc
push 00h
push 01h
push p0
push p1
mov a,#0ffh
loopa1:
mov b,#0ffh
loopb1:
djnz b,
loopb1
djnz 0e0h,
loopa1
pop p1
pop p0
pop 01h
pop 00h
pop acc
ret
;++++++++++++Routine to read data from prog mem
read:
nex: clr a
movc a,@a+dptr
cjne a,#'0',aga
sjmp down
aga: acall display
;acall delay
inc dptr
sjmp nex
down:
;acall delay
ret
;================ stepper routine
stepperf:
push acc
push p1
mov a,#88h
; mov p2,a
mov r0,#0e0h
mov r1,#01h
loop:
mov p2,a
acall delays
rr a
dec r0
cjne r0,#00h,
loop
dec r1
cjne r1,#00h,
loop
pop p1
pop acc
ret
stepperb:
push acc
push p1
mov a,#88h
; mov p2,a
mov r0,#0e0h
mov r1,#01h
mov p2,a
acall delays
rl a
dec r0
cjne r0,#00h,
loop1
dec r1
cjne r1,#00h,
loop1
pop p1
pop acc
ret
end