Datasheet: ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Datasheet: ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Datasheet: ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Contents
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2. Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1.1 Charge Pump Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2 Transmitters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3 Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4 Low Power Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5 Powerdown Functionality (Except ICL3232) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5.1 Software Controlled (Manual) Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5.2 INVALID Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.5.3 Automatic Powerdown (ICL3221/23/43 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.6 Receiver ENABLE Control (ICL3221/22/23/41 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.7 Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.8 Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.9 Operation Down to 2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.10 Transmitter Outputs when Exiting Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.11 Mouse Driveability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.12 High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.13 Interconnection with 3V and 5V Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.14 Pin Compatible Replacements For 5V Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5. Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1. Overview
1.1 Typical Operating Circuits
ICL3221 ICL3222
C3 (Optional Connection, Note) C3 (Optional Connection, Note)
+3.3V + +3.3V +
0.1µF
+
0.1µF
+
15 17
2 C1 2 3
C1 3 C1+ VCC
+ C1+ VCC
V+ + C3 +
V+ + C3
0.1µF 4 0.1µF 0.1µF 4 0.1µF
C1- C1-
C2 5 C2 5
C2+
+ C2+ + 7
0.1µF 6 V- 7 C4 0.1µF 6 V- C4
C2- C2- 0.1µF
+ 0.1µF +
T1 T1
Logic Levels
TTL/CMOS
11 13 12 15
T1IN T1OUT T1IN T1OUT
RS-232
Levels
T2
11 8
9 8
TTL/CMOS
Logic Levels
R1OUT R1IN T2IN T2OUT
R1 5kΩ
RS-232
Levels
13 14
1 EN R1OUT R1IN
16 R1 5kΩ
FORCEOFF VCC
9
12 10 10
To Power R2OUT R2IN
FORCEON INVALID
GND Control 5kΩ
1 EN R2
Logic
14
18 VCC
SHDN
GND
NOTE: The negative terminal of C3 can be
connected to either VCC or GND 16
ICL3223 ICL3232
+3.3V C3 (Optional Connection, Note)
+
0.1µF
19 +3.3V +
2 0.1μF
+
C1 C1+ VCC 3 16
0.1µF
+ V+ + C3
4 0.1µF C1 1
C1- C1+ VCC 2
C2 5 0.1µF
+ V+ + C3
C2+ 3 0.1µF
+ C1-
0.1µF 6 V- 7 C4 4
C2- C2 C2+
0.1µF + 6
T1 + 0.1µF 5 V- C4
13 17 C2- 0.1µF
T1IN T1OUT +
T1
11 14
T2 T1IN T1OUT
12 8
Logic Levels
T2IN T2OUT T2
TTL/CMOS
10 7
RS-232
Logic Levels
Levels
T2IN T2OUT
TTL/CMOS
15 16
RS-232
R1OUT R1IN
Levels
R1 5kΩ 12 13
R1OUT R1IN
10 9 R1
R2OUT R2IN 5kΩ
R2 5kΩ
1 9 8
EN R2OUT R2IN
20 R2
FORCEOFF VCC 5kΩ
14 11 To Power
FORCEON INVALID GND
Control Logic
GND 15
18
NOTE: The negative terminal of C3 can be
connected to either VCC or GND
ICL3241 ICL3243
+3.3V +
+3.3V + 0.1µF
0.1µF 26
26 28
C1 C1+ VCC 27 C3
C1 28 + +
C1+ VCC 27 0.1µF V+
0.1µF
+ V+ + C3 24
C1-
0.1µF
24 0.1µF
C1- C2 1
C2 1 C2+
C2+ 0.1µF + 3 C4
+ 3 2 V-
0.1µF V- C4 C2- 0.1µF
2
C2- 0.1µF +
+ T1
T1 14 9
14 9 T1IN T1OUT
T1IN T1OUT
T2 T2
RS-232
RS-232
13 10
Levels
13 10
Levels
T2IN T2OUT T2IN T2OUT
12 T3 11 T3
12 11
T3IN T3OUT T3IN T3OUT
21
R1OUTB 20
R2OUTB
20
R2OUTB
Logic Levels
19 4
TTL/CMOS
19 4 R1OUT R1IN
Logic Levels
R1OUT R1IN TTL/CMOS
R1
5kΩ
R1 5kΩ
18 5
18 5 R2OUT R2IN
R2OUT R2IN
R2 5kΩ
R2 5kΩ
17 6
RS-232
17 6
Levels
R3OUT R3IN
RS-232
Levels
R3OUT R3IN
R3 5kΩ
R3 5kΩ
16 7
16 7 R4OUT R4IN
R4OUT R4IN R4 5kΩ
R4 5kΩ
15 8
15 8 R5OUT R5IN
R5OUT R5IN R5 5kΩ
23
R5 5kΩ FORCEON
23 EN
22
Control Logic
VCC FORCEOFF
22
To Power
VCC SHDN 21
GND
INVALID GND
25
25
EN 1 18 SHDN
EN 1 16 FORCEOFF
C1+ 2 17 VCC
C1+ 2 15 VCC
V+ 3 16 GND
V+ 3 14 GND
C1- 4 15 T1OUT
C1- 4 13 T1OUT
C2+ 5 14 R1IN
C2+ 5 12 FORCEON
C2- 6 13 R1OUT
C2- 6 11 T1IN
V- 7 12 T1IN
V- 7 10 INVALID
T2OUT 8 11 T2IN
R1IN 8 9 R1OUT
R2IN 9 10 R2OUT
EN 1 20 SHDN EN 1 20 FORCEOFF
C1+ 2 19 VCC C1+ 2 19 VCC
V+ 3 18 GND V+ 3 18 GND
C1- 4 17 T1OUT C1- 4 17 T1OUT
C2+ 5 16 R1IN C2+ 5 16 R1IN
C2- 6 15 R1OUT C2- 6 15 R1OUT
V- 7 14 NC V- 7 14 FORCEON
T2OUT 8 13 T1IN T2OUT 8 13 T1IN
R2IN 9 12 T2IN R2IN 9 12 T2IN
R2OUT 10 11 NC R2OUT 10 11 INVALID
V+ 2 15 GND C2- 2 27 V+
V- 6 11 T1IN R3IN 6 23 EN
C2+ 1 28 C1+
C2- 2 27 V+
V- 3 26 VCC
R1IN 4 25 GND
R2IN 5 24 C1-
R3IN 6 23 FORCEON
R4IN 7 22 FORCEOFF
R5IN 8 21 INVALID
T1OUT 9 20 R2OUTB
T2OUT 10 19 R1OUT
T3OUT 11 18 R2OUT
T3IN 12 17 R3OUT
T2IN 13 16 R4OUT
T1IN 14 15 R5OUT
2. Specifications
2.1 Absolute Maximum Ratings
Parameter Minimum Maximum Unit
VCC to Ground -0.3 6 V
V+ to Ground -0.3 7 V
V- to Ground +0.3 -7 V
V+ to V- 14 V
Input Voltages
TIN, FORCEOFF, FORCEON, EN, SHDN -0.3 6 V
RIN ±25 V
Output Voltages
TOUT ±13.2 V
ROUT, INVALID -0.3 VCC +0.3 V
Short-Circuit Duration
TOUT Continuous
ESD Rating (See ESD Performance)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely
impact product reliability and result in failures not covered by warranty.
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = 25°C (Continued)
Tem
p Uni
Parameter Test Conditions (°C) Min Typ Max t
Input Resistance 25 3 5 7 kΩ
Transmitter Outputs
Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V
Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - W
Output Short-Circuit Current Full - ±35 ±60 mA
Output Leakage Current VOUT = ±12V, VCC = 0V or 3V to 5.5V Full - - ±25 µA
Automatic Powerdown or FORCEOFF = SHDN = GND
Mouse Driveability (ICL324X Only)
Transmitter Output Voltage T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ to Full ±5 - - V
(See Figure 15) GND, T1OUT and T2OUT loaded with 2.5mA each
Timing Characteristics
Maximum Data Rate RL = 3kΩ, CL = 1000pF, one transmitter switching Full 250 500 - kbp
s
Receiver Propagation Delay Receiver input to receiver output, tPHL 25 - 0.3 - µs
CL = 150pF
tPLH 25 - 0.3 - µs
Receiver Output Enable Time Normal operation (except ICL3232) 25 - 200 - ns
Receiver Output Disable Time Normal operation (except ICL3232) 25 - 200 - ns
Transmitter Skew tPHL - tPLH Full - 200 100 ns
0
Receiver Skew tPHL - tPLH Full - 100 500 ns
Transition Region Slew Rate VCC = 3.3V, CL = 200pF to 2500pF 25 4 8.0 30 V/µ
RL = 3kΩ to 7kΩ, s
Measured from 3V to -3V or -3V
CL = 200pF to 1000pF 25 6 - 30 V/µ
to 3V
s
ESD Performance
RS-232 Pins (TOUT, RIN) Human Body Model ICL3221 - ICL3243 25 - ±15 - kV
IEC61000-4-2 Contact Discharge ICL3221 - ICL3243 25 - ±8 - kV
IEC61000-4-2 Air Gap Discharge ICL3221 - ICL3232 25 - ±8 - kV
ICL3241 - ICL3243 25 - ±6 - kV
All Other Pins Human Body Model ICL3221 - ICL3243 25 - ±2 - kV
4
20
2
-6 5
0 1000 2000 3000 4000 5000 0 1000 2000 3000 4000 5000
Figure 1. Transmitter Output Voltage vs Load Figure 2. Slew Rate vs Load Capacitance
Capacitance
45 45
ICL3221 ICL3222 - ICL3232
40 40
250kbps
35 35
250kbps
Supply Current (mA)
30 30
25 25 120kbps
20 120kbps 20
15 15 20kbps
10 20kbps 10
5 5
0 0
0 1000 2000 3000 4000 5000 0 1000 2000 3000 4000 5000
Load Capacitance (pF) Load Capacitance (pF)
Figure 3. Supply Current vs Load Capacitance when Figure 4. Supply Current vs Load Capacitance when
Transmitting Data Transmitting Data
45 3.5
ICL324X 250kbps No Load
40 All Outputs Static
3.0
35 ICL3221 - ICL3232
Supply Current (mA)
2.5
Supply Current (mA)
30
120kbps
25 2.0
20 1.5
20kbps
15
1.0
10
0.5 ICL324X
5
ICL324X
0 0
0 1000 2000 3000 4000 5000 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Load Capacitance (pF) Supply Voltage (V)
Figure 5. Supply Current vs Load Capacitance when Figure 6. Supply Current vs Supply Voltage
Transmitting Data
4. Application Information
The ICL32xx interface ICs operate from a single +3V to +5.5V supply, ensure a 250kbps minimum data rate,
require only four small external 0.1µF capacitors, feature low-power consumption, and meet all ElA RS-232C and
V.28 specifications. The circuit is divided into three sections:
• Charge-pump
• Transmitters
• Receivers
4.2 Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. These transmitters are coupled with the on-chip ± 5.5V supplies and deliver true RS-232 levels
across a wide range of single supply system voltages.
Except for the ICL3232, all transmitter outputs disable and assume a high impedance state when the device
enters the powerdown mode (See Table 5 on page 15). These outputs can be driven to ±12V when disabled.
All devices ensure a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter
operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter
easily operates at 900kbps.
Transmitter inputs float if left unconnected and may cause ICC increases. Connect unused inputs to GND for the
best performance.
4.3 Receivers
All the ICL32xx devices contain standard inverting receivers that three-state (except for the ICL3232) using the
EN or FORCEOFF control lines. Additionally, the two ICL324X products include noninverting (monitor) receivers
(denoted by the ROUTB label) that are always active, regardless of the state of any control lines. All the receivers
convert RS-232 signals to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to
7kΩ input impedance (see Figure 7) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage
uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions.
VCC
RXIN RXOUT
-25V ≤ VRIN ≤ +25V 5kΩ GND ≤ VROUT ≤ VCC
GND
The ICL3221/22/23/41 inverting receivers disable only when EN is driven high. ICL3243 receivers disable during
forced (manual) powerdown, but not during automatic powerdown (See Table 5).
ICL324X monitor receivers remain active even during manual powerdown and forced receiver disable, making
them extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must
be disabled to prevent current flow through the peripheral’s protection diodes (See Figures 8 and 9). When
disabled, the receivers cannot be used for wake up functions, but the corresponding monitor receiver can be
dedicated to this task as shown in Figure 9 on page 17.
VCC
VCC
Current
VCC Flow
VOUT = VCC
Rx
Powered
Down
UART
Tx
SHDN = GND Old
GND RS-232 Chip
Transition
Detector
To ICL324X
Wake-Up
Logic
VCC
R2OUTB
RX VOUT = HI-Z
Powered R2OUT
R2IN
Down
UART
TX T1IN
T1OUT
FORCEOFF = GND
OR SHDN = GND, EN = VCC
FORCEOFF
PWR
MGT FORCEON
Logic
INVALID
ICL3221/23/43
I/O
UART
CPU
Figure 10. Connections for Manual Powerdown when No Valid Receiver Signals are Present
With any of the above control schemes, the time required to exit powerdown and resume transmission is only
100µs. A mouse or other application may need more time to wake up from shutdown. If automatic powerdown is
being used, the RS-232 device reenters powerdown if valid receiver levels are not re-established within 30µs of
the ICL32xx powering up. Figure 11 on page 18 shows a circuit that keeps the ICL32xx from initiating automatic
power-down for 100ms after powering up, which gives the slow-to-wake peripheral circuit time to re-establish valid
RS-232 output levels.
FORCEOFF FORCEON
ICL3221/23/43
Figure 11. Circuit to Prevent Auto Powerdown for 100ms After Forced Power-UP
0.3V
Invalid Level - Powerdown Occurs After 30ms
-0.3V
-2.7V
Valid RS-232 Level - ICL32xx is Active
Automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying
FORCEON high disables automatic powerdown, but manual powerdown is always available using the overriding
FORCEOFF input. Table 5 on page 15 summarizes the automatic powerdown functionality.
Devices with the automatic powerdown feature include an INVALID output signal, which switches low to indicate
that invalid levels have persisted on all of the receiver inputs for more than 30µs (See Figure 13). INVALID
switches high 1µs after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced
or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry.
When automatic powerdown is used, INVALID = 0 indicates that the ICL32xx is in powerdown mode.
Receiver Invalid
} Region
Inputs
Transmitter
Outputs
VCC
INVALID tINVL tINVH
Output 0
AUTOPWDN PWR UP
V+
VCC
V-
5V/Div FORCEOFF
T1
2V/Div
T2
VCC = +3.3V
C1 - C4 = 0.1µF
Time (20µs/Div)
3
VCC = 3.0V
2
1
T1
0
VOUT+
-1
T2
-2
ICL3241/43
-3
VCC T3 VOUT -
-4 VOUT -
-5
-6
0 1 2 3 4 5 6 7 8 9 10
Load Current per Transmitter (mA)
Figure 15. Transmitter Output Voltage vs Load Current (per Transmitter, Such as, Double Current Axis for Total VOUT+
Current)
VCC
+
0.1µF
+ VCC V+
C1+
C1 +
C3
C1-
ICL32xx
+ C2+ V-
C2 C4
+
C2-
TIN TOUT
RIN 1000pF
ROUT
EN 5k
SHDN OR
VCC
FORCEOFF
T1IN T1IN
T1OUT T1OUT
R1OUT R1OUT
5µs/Div 2µs/Div
Figure 17. Loopback Test at 120kbps Figure 18. Loopback Test at 250kbps
5. Die Characteristics
Substrate Potential (Powered Up) GND
Transistor Count ICL3221: 286
ICL3222: 338
ICL3223: 357
ICL3232: 296
ICL324X: 464
Process Si Gate CMOS
6. Revision History
Rev. Date Description
23 Apr 26, 2019 Updated to latest formatting.
Added Related Literature section.
Updated Ordering information table by adding active tape and reel information, updated notes, adding note 3,
removed retired parts, and stamped EOL parts.
Added “Charge Pump Absolute Maximum Ratings” on page 13.
Removed About Intersil section.
Updated M16.15 to the latest revision changes are as follows:
Update graphics to new standard layout, removing the dimension table.
Updated disclaimer.
22 Sep 1, 2015 - Ordering Information Table on page 2.
- Added Revision History.
- Added About Intersil Verbiage.
- Updated POD M16.173 to latest revision changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
- Updated POD M20.173 to most current version changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
- Updated POD M28.173 to most current version changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
-Updated POD M28.3 to most current version change is as follows:
Added land pattern.
7. Package Outline Drawings For the most recent package outline drawing, see E16.3.
M16.15 (JEDEC MS-012-AC ISSUE C) For the most recent package outline drawing, see M16.15.
16 Lead Narrow Body Small Outline Plastic Package
Rev 2, 11/17
M16.173 For the most recent package outline drawing, see M16.173.
16 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 2, 5/10
A
1 3
5.00 ±0.10
6.40
PIN #1
4.40 ±0.10 I.D. MARK
2 3
0.20 C B A 1 8
0.65 B 0.09-0.20
(1.45)
NOTES:
N
INDEX
M16.209 (JEDEC MO-150-AC ISSUE B)
AREA H 0.25(0.010) M B M 16 Lead Shrink Small Outline Plastic Package (SSOP)
E
GAUGE INCHES MILLIMETERS
-B- PLANE
SYMBOL MIN MAX MIN MAX NOTES
A - 0.078 - 2.00 -
1 2 3
A1 0.002 - 0.05 - -
L
SEATING PLANE 0.25 A2 0.065 0.072 1.65 1.85 -
0.010
-A- B 0.009 0.014 0.22 0.38 9
D A
C 0.004 0.009 0.09 0.25 -
-C-
H 0.394 0.419 10.00 10.65 -
α h 0.010 0.029 0.25 0.75 5
e A1
C L 0.016 0.050 0.40 1.27 6
B 0.10(0.004) N 16 16 7
0.25(0.010) M C A M B S α 0° 8° 0° 8° -
Rev. 1 6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
-C-
H 0.394 0.419 10.00 10.65 -
α h 0.010 0.029 0.25 0.75 5
e A1
C L 0.016 0.050 0.40 1.27 6
B 0.10(0.004) N 18 18 7
0.25(0.010) M C A M B S α 0° 8° 0° 8° -
Rev. 1 6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
M20.173 For the most recent package outline drawing, see M20.173.
20 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 2, 5/10
A
1 3
6.50 ±0.10
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2 3
0.20 C B A 1 9
0.65 B 0.09-0.20
1.00 REF
H - 0.05
C
0.90 +0.15/-0.10
1.20 MAX
SEATING
GAUGE
PLANE
PLANE 0.25
0.25 +0.05/-0.06 5
0.10 C 0.10 M C B A
0.05 MIN 0°-8°
0.15 MAX 0.60 ±0.15
SIDE VIEW
DETAIL "X"
(1.45)
NOTES:
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
M28.173 For the most recent package outline drawing, see M28.173.
28 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 1, 5/10
A
1 3
9.70± 0.10
SEE DETAIL "X"
28 15
6.40
PIN #1
4.40 ± 0.10 I.D. MARK
2 3
0.20 C B A 1 14
0.15 +0.05
0.65 B -0.06
TOP VIEW
END VIEW
1.00 REF
H - 0.05
C 0.90 +0.15
-0.10
SIDE VIEW
DETAIL "X"
(1.45)
NOTES:
-C-
e 0.026 BSC 0.65 BSC -
α H 0.292 0.322 7.40 8.20 -
e A1 A2
C L 0.022 0.037 0.55 0.95 6
B 0.10(0.004) N 28 28 7
0.25(0.010) M C A M B S α 0° 8° 0° 8° -
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
TYPICAL RECOMMENDED LAND PATTERN 4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
(1.50mm) 5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
(9.38mm)
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
(1.27mm TYP) (0.51mm TYP)
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