Lead Free Wave Soldering Project: Performance of Lead Free Through-Hole Electrical Interconnects

Download as pdf or txt
Download as pdf or txt
You are on page 1of 8

LEAD FREE WAVE SOLDERING PROJECT:

PERFORMANCE OF LEAD FREE THROUGH-HOLE


ELECTRICAL INTERCONNECTS
Denis Barbini
Universal Instruments Corporation
Conklin, NY, USA
[email protected]

Denis Jean
Plexus Corporation
Neenah, WI, USA
[email protected]

Stuart Longgood
Delphi Corporation
Kokomo, IN, USA
[email protected]

Keith Howell
Nihon Superior Co. Ltd.
Camdenton, MO, USA
[email protected]

Jian Miremadi
Hewlett Packard
Palo Alto, CA, USA
[email protected]

ABSTRACT wave soldering process as well as determining the behavior


Today’s wave soldering processes solder electronic and performance of the various solder joints.
assemblies within the large eutectic tin lead processing
window. The issues surrounding the conversion to lead free The team specifically designed a test vehicle for testing the
assembly are multiple and varied. Logistics, cost, material norms of tin lead wave soldering and to address component
selection, and equipment choices/options are some of these and board types specific to various industries. The result of
challenges that require planning and organization. this investigation is to provide the electronics industry
However, at the core of lead free assembly is soldering. The valuable information pertaining to the relationship between
iNEMI lead free wave soldering team embarked on a multi- through-hole penetration and solder joint performance as a
tiered project that focuses specifically on two aspects: function of thermal cycling, and subsequent failure analysis.
identifying the impact of critical parameters on the
development of a reliable, robust lead free wave soldering Overall, this investigation looks to bring an understanding
process as well as characterizing the performance of the of how critical wave soldering parameters correlate to
electrical interconnect. performance and provide the reader with the information
necessary to make educated decisions in selecting process
While previous investigations of lead free wave soldering as parameters, material sets, and acceptability standards.
well as standards development focused on process
optimization, material selection, through-hole fill, coverage Key words: Pb Free, wave soldering, process, solder, alloy,
requirements, few, published investigations focused on the thermal cycling, joint performance.
reliability of both SMD and Through-Hole solder joints
assembled with various board finishes and thicknesses, INTRODUCTION
component types, and alloys. This iNEMI collaboration The 2009 iNEMI roadmap identifies several trends and
studied and is reporting on identifying the impact of critical transitions that are currently taking place in the electronics
parameters on the development of a reliable, robust lead free manufacturing industry. As a result, there are many
challenges identified in today’s electronics assembly. These
challenges are identified as critical to assembling today’s This updated table provides increased resolution on alloy
high volume electronics as well as the cutting edge composition, component pitch, contact time, and
technologies. The focus is assembly utilizing new atmosphere compared to the 2007 iNEMI Technology
materials, emerging assembly technologies, as well as Forecast. It is also the cumulative analysis of global liquid
meeting quality standards and cost constraints. The 2009 soldering situation. The technology forecast is also broken
roadmap identifies specific gaps in the liquid soldering down by the following regions: Asia, Europe, and N.
assembly area. The information, research and standards America. While the differences between the regions are
development relating to lead free liquid soldering processes material and board complexity based, all reflect similar
and reliability is still in its infancy and the need for robust patterns in most parameters listed.
information and standards is evident from the degree
implementation of lead free compatible materials. 1,2,3 The The technology forecast continues to provide consistent data
Lead Free Wave Soldering project was developed in order on the nature of the liquid soldering landscape. The issues
to characterize and quantify the impact caused by the today continue to be led by the enduring changes in
transition to lead free solder on the liquid soldering process materials and their maturity combined with a significant
itself as well as the impact on the performance and effort to minimize cost. Alloys containing silver adversely
reliability of lead free solder joints. The 2009 iNEMI affect cost thus pressuring assembly houses to find
Roadmap board assembly chapter details both the alternative cheaper materials. Another pressure is the
progression of the integration of lead free materials Table 1 complexity of board technology. Today’s high end board
and also quantitatively provides the technology forecast for designs are quickly migrating to increased layer count,
wave soldering and is listed in Table 2. thicknesses, and complexity, thus exacerbating the
challenges already associated with developing and
maintaining a robust and reliable wave soldering process.
This results in an overall situation where materials are
pushed to the limits of their respective specifications in
terms of exposure to elevated temperature for extended
times. As the lead free implementation progresses, various
questions have arisen.

This project was designed to address many of the challenges


aforementioned.

Table 1. The 2009 iNEMI Soldering Materials Forecast.4 For these and other similar reasons, the iNEMI Lead Free
Wave Soldering Project focused on three critical areas:
Table 1 clearly illustrates two distinctive and nontrivial 1. Materials Selection
trends. The first challenge is that the integration of lead free 2. Process Optimization
materials in electronics assembly is not complete and will 3. Solder Joint Performance
continue to increase for the next 5 to 8 years. The second 4. Standarization
and concerning trend is the drive to utilize alternative alloys In order to achieve these goals the project participants
for soldering. This latter trend is driven by economics as developed a two-phase approach.
well as the desire to drive down operational soldering
temperatures. This results in a lack of standardization, The companies supporting this project throughout Phase II
research efforts, and overall understanding. This challenge included:
has been and continues to be addressed by the iNEMI
Alternative Alloy project.

Figure 1. iNEMI Lead Free Wave Soldering Project


Companies Supporting Phase II

Table 2. Wave and Selective Soldering Technology Global The first phase of the project focused on characterizing
Forecast.4 process-related challenges and optimization of a lead free
wave soldering process for various factors including: fluxes,
alloys, and board thicknesses. Characterizing the window
of opportunity for various materials specifically designed
for lead free assembly and its impact on wave soldering
process is based on the quantification and analysis of
specific defects. The research performed in Phase I
accomplished the aforementioned goal by investigating
various levels of two factors:

 First, selection of a broad variety of materials allows for


the determination of specific interactions. Alloys,
fluxes, board laminate and finishes, component types
and metallurgy, board design including thickness,
thermal tie design, finish, and component orientation
exert individual restrictions on the wave soldering
process that results in an overall window of
opportunity.
 The second factor is the flexibility allowed in
developing the robust soldering process. Development
of the wave process requires selection and control of
various parameters including flux amount, atmosphere, Figure 2. The Populated GTLO Board
preheat temperature, contact time, alloy temperature,
and wave configuration. EXPERIMENTAL
In the design of this experiment a subset of carefully
The findings provide insight into the optimization of the selected materials were fixed for assembly. Criteria for the
wave soldering process for given material combinations. selection of these materials was based on the findings in
Confirmation of the data analysis was achieved by soldering Phase I so that assembly the only variable was board
boards utilizing the optimized parameter settings for the attributes and alloy. Wave soldering equipment use and
respective material combinations. The focus of this latter setup was determined based on common industry practices,
effort was to provide a data driven solution for the basic configuration and operation.
optimized wave soldering process which is an essential part
of a robust and reproducible lead free assembly process. Materials
The scope of the project included accomplishing this goal Fluxes
for three different lead free alloys as well as for tin lead on Soldering fluxes are known to exert a significant influence
three different board thicknesses. on the resulting solder joint. As a result, a single flux was
selected and the process was optimized with this flux.
The goal of the iNEMI lead free wave project is to Unlike in Phase I, the goal of Phase II was to achieve the
ultimately characterize solder joint performance. Phase I best possible through-hole penetration and minimal amount
provides the optimized settings that result in IPC class 3 of bridging.
acceptable through-hole fill for specific material
combinations. Phase II of the project focuses on Alloys
standardizing the lead free wave assembly process based on The various, available lead free alloys on the market today
the Phase I process development and optimization so that consist of tin in excess of 95%. As a result, the melting
only solder joint performance will be evaluated. The intent behavior of the alloys will be dominated by the melting
of Phase II is to provide the electronics assembly industry point of tin, 232°C. In this experiment three lead free alloys
with timely and statistically backed understanding of lead were selected based on project interest at the time the
free wave soldered joints. experiment was executed. Tin lead was also included to
provide a benchmark to the majority of today’s production
In order to achieve this goal, the team designed and lines.
fabricated a test vehicle that aims to understand future 1. SAC 305
assembly requirements and consequently develop new 2. Sn100C
standards and best practices for lead free wave soldering 3. SACx
assembly. This board’s call name is “GTLO”, Get The 4. SnPb
Lead Out! As shown in Figure 1.
Board
It is with this board and component mix that the project The test vehicle used in Phase II was a project designed
derived solutions and specifications to the challenges posed board referred to as the “GTLO” board. The fabrication
in the technology forecast. included the use of Polyclad 370 HR laminate with a 175°C
Tg and a high Td.
The layout of the GTLO required the use of 29 different Header, DDR DIMM, Berg Stik, PCMCIA Header, Metral
components divided amongst through-hole and surface Header, TO-220, SIP DC-DC converter, SPF Cage
mount components. The GTLO board totally populated Assembly, QFP144 0.65mm, SO16, SOT23, 0603, 0805,
consisted of 356 components. 1206.

Daisy Chains
There are 5 daisy chain circuits on each board. Each of the
daisy chains has a number of probe pads built in to allow for
electrical test. The 5 daisy chains were labeled as DIMM 1,
DIMM 2, Metral1, Metral 2, Surface Mount and are
illustrated in Figure

④ 
⑤ ②  ①

Figure 3. A Bottom Side View of the Populated GTLO


Test Vehicle

The board dimensions were 185 mm x 203 mm, with two


thicknesses: 1.6 mm (64 mil) and 2.3 mm (93 mil). The 1.6
mm thick card consisted of 4 layers of 2 oz copper and the
2.3 mm consisted of 6 layers of 2 oz copper.

The board finishes utilized in this test are listed below:


Figure 4. Illustration of the 5 Daisy Chains on the GTLO
1. Cu OSP
board.
2. Alloy Specific HASL
3. NiAu
Equipment
4. Imm Ag
A Vitronics Soltec Delta 6622 wave soldering machine was
5.
used to assemble the boards for Phase II. The wave
For each of the three lead free alloys and tin lead, the
soldering machine was configured with a dual head spray
respective board finish was applied. ie, In the experiments
fluxer which was operated with a pump system and
where SAC 305 alloy was used, the board finish was also
delivered each flux with specifically designed nozzles. The
SAC 305 HASL. The OSP applied was Entek Plus HT.
preheat technology and configuration for the three zones of
preheat consisted of forced convection modules in the first
The board design also included variation in the following
two preheating zones and a calrod module in the last
attributes and is dependent upon component type:
preheating zone. The wave configuration consisted of a
Drill Hole: 1 – 3 levels
chip wave and main wave. The chip wave is designed to
Gap (hole:pin): 1 – 3 levels
deliver a turbulent flow of solder and the main wave is
Annular ring: 1 – 3 levels
designed to deliver a laminar flow of solder. The nitrogen
Pad size: 1 – 3 levels
inerting system works on the blanketing concept and was
Orientation to wave: 1 – 2 levels
operating at the following N2 flow settings of 30,50, and 80
Thermal connection: 1 – 3 levels
l/min.
The boards were soldered in an open pallet.
Parameter settings for each subsystem were controlled as
required by individual runs in the design of experiments.
Components
Further, all systems, including transport, were calibrated to
The components assembled onto the GTLO board are
deliver directly comparable outputs. ie, The flux amount
Electrolytic Capacitor, Heat Sink, Power Inductor, RJ45,
delivered was calibrated by flux type and conveyor speed so through-hole. Data on through-hole penetration was
that a low amount of flux delivered to a board traveling at reported for the following slices; 0%, 30%, 40%, 50%, 60%,
slow or fast speed was identical regardless whether the 70%, 75%, 80%, 90%, 100%.
water based no-clean flux or the alcohol based flux was
utilized. This was accomplished by measuring the mass, Cross Sectioning
volume, and through-hole penetration of flux delivered to Select samples were cross sectioned to perform various
the board at all potential experimental conditions. analyses including hole-fill, barrel integrity, board integrity,
and intermetallic formation. The procedure used to make
All alloys were contained in individual solder pots that were these cross sections has been documented previously.5
switched out as needed to complete the DOE. This was
done in order to eliminate any possible cross contamination Accelerated Thermal Cycling
issues. The thermal cycling chambers were capable of conducting
thermal cycling according to the specification given in the
Design of Experiment table below. IPC 9701 has been used as a guideline in terms
The premise of Phase II was to ascertain the impact of of the Temperature Tolerances at the peak temperatures and
through-hole penetration to joint performance. To achieve the maximum allowable ramp rate between peak
this objective, the process was optimized for each board temperatures. Table 3 lists the required temperatures and
thickness based on visual inspection of through-hole ranges at board level that were recorded during the thermal
penetration and minimal bridging. While the IPC 610D testing.. The criteria for acceptable ramp rates are ≤
Class 3 or 75% hole-fill specification was utilized for 20°C/min for the heating process or ≥ -20°C/min for the
guidance, the goal was to achieve 100% through-hole cooling process.
penetration. Once the quality of the product process was
determined to be optimized all parameters were fixed and all
boards were processed. Criteria Mandated Conditions
(a) -40 to +125°C and (b) 0 to
Cycles Conditions
Profiles +100°C
Characterization of the temperature profile and contact time Low Temperature Dwell
Minimum 10 minutes
was accomplished by using the ECD Mole© profiler and the Temperature Tolerance
+0/-10°C (+0/-5°C)
ECD WaveRider©. In the assembly of the GTLO board, (preferred)
two profiles were developed and utilized. One for the 1.6 High Temperature Dwell
Minimum 10 minutes
mm card and a separate optimized process for the 2.3 mm Temperature Tolerance
+10/-0°C (+5/-0°C)
card. Figure 5 illustrates a typical profile used to quantify (preferred)
topside preheat temperature and peak temperature on the Ramp Rate ≤20°C/min
Skate test vehicle. Table 3. Temperature Cycling Requirements (ref: IPC
9701)

Table 4 details the criteria for chamber setup, monitoring,


electrical calibration, and event detection limits and error
logging.
Test Parameter Mandated Conditions
 Characterization studies using representative sample loads and fixturing
should be conducted prior to testing to ensure meeting the required
Temperature
thermal profile.
(Chamber Characterization)
 Thermocoupled boards should be both at the perimeter and center of
chamber.
 Continuous monitoring of temperature at board level, on at least two
Temperature
boards (at center and perimeter), as well as chamber ambient, throughout
(Chamber Test Monitoring)
test.
Temperature  Boards should be placed with respect to the air stream so that there is no
(Procedure) obstruction to air flow across and around the boards.
1. Prior to testing, the 5 daisy chains on 5 different boards will be
Electrical measured, at each intermediate probe point.
(Zero time Set up) 2. These values are then recorded and averaged to establish a zero time
resistance value for the testing.
Figure 5. Typical Lead Free Wave Profile. Electrical Test Monitoring  Continuous Monitoring or periodic scanning with data logger

 1000 ohm threshold and sustained for 10 consecutive events.


Electrical Failure Definition
Analysis 1. After a failure is noted, the board is removed for probing.

Various forms of analysis were employed in Phase II. The Electrical Failure Logging 2.
3.
The exact location on the daisy chain is recorded.
Board is returned to testing.

reporting in this research is based on visual characterization Test Duration  6000 cycles.

of shorts and skips as well as x-ray analysis of hole-fill.


Table 4. Criteria for ATC Chamber Setup and Event
5 DX X-Ray Analysis Detection.
Hole-fill was determined by using a programmed Agilent
5DX x-ray instrument. The data collection of barrel hole-
fill was based on the acquisition of data for 10 slices of the
RESULTS AND DISCUSSION anomaly and cannot attributed to the materials but most
The execution of Phase II included the fabrication of the test likely to a manufacturing issue.
vehicle, applying the correct finish onto the defined board
thicknesses, procurement of the components, surface mount Further analysis of the SAC305 NiAu assembly returns the
assembly and glue cure, flux procurement, and equipment following results illustrated in Figure 6.
setup. Once this was in place, a total of 501 boards were
assembled per the fixed optimized processes for each board
thickness. The boards were visually inspected on site,
followed by the characterization of through-hole solder
penetration by 5DX. As explained in the Experimental
section, the criteria employed to determine the output
response was hole-fill greater than 75%.

The major input factors and respective levels selected in this


study are;
» Alloy - SACx, SAC305, Sn100C
» Coating - CuOSP, NiAu, HASL
» PCB Thickness - 62 mil, 93 mil
» Component
» Pin number - component determined
» Pin dimension - component determined
Figure 6. Boxplot of Through-Hole Penetration for the
» Pin Configuration - staggered, parallel
SCA305 NiAu Cell.
» Pin Shape - Round, Rectangular/Square
» Pin Pitch – component determined
While the Median for through-hole penetration is 100%, the
» Lead Length – both component determined and controlled
graph illustrates those vias that did not have the 100% fill
» Drill Hole Diameter - lumped into small/normal/large
based on component type.
» Annular Ring - lumped into small(1)/medium(2)/large(3)
» Pad Size – component determined
The impact of board finish is illustrated in Figure 7. The
» Orientation - 0, 90, 180, 270
analysis clearly shows that the HASL finished soldered the
» Thermal Connection Type - none, type 1, type 2
best as compared to CuOSP and NiAu. The resulting
process window for CuOSP and NiAu are smaller.
Through-Hole Penetration Analysis
The results of though-hole penetration were organized
utilizing best manufacturing practices as well as per IPC
610D requirements for Class 3.

Figure 7.
Table 5. List of Through-Hole Penetration for All Alloys,
Board Finish, and PCB Thickness.
The resulting interpretation of the through-hole penetration
analysis can be summarized by a binary system where best
The goal was to first determine the overall through-hole or worst combination of factors are ranked in achieving
penetration for all the combinations. Organizing the raw
100% through-hole fill. In order to do this, the factors were
data into three categories: 100%, greater than or equal to
divided into main and style factors. The main factors
75% and less than 75%, it was possible to characterize the include board finish, board thickness, and component
results of the GTLO assembly. In all cases except one, a
orientation. The style factors include hole size, annular
through-hole penetration of 97.0% was achieved. The last
ring, and thermal connection. The results are illustrated in
cell containing only 87.8% through-hole penetration was an Figure 8.
100
80

%)
60

Failure (%)
故障(
40
20
Figure 8. Probability of Achieving 100% Through-Hole 0
Penetration Based on Board Design Factors.
0 2000 4000 6000
The best main factor of board thickness returned that the サイクル数
Numbers of Cycles

thicker board was better. In general this is counterintuitive Figure 9. Passive Component Failure as Function of ATC
especially since two additional layers of 2 ounce copper for SnPb..
were added. In this case, it can be accounted for by the fact
that the two thicknesses were soldered utilizing two CONCLUSION
different processes in which the soldering process for the This research provides insight into several of the key
thicker board was optimized to a higher degree. questions and challenges observed in today’s lead free wave
soldering process. The iNEMI lead free wave soldering
Overall, this data can be used as a guideline for board team embarked on a multi-tiered project that focuses
design in those cases where the designer has control to specifically on two aspects: Identifying the impact of
implement specific attributes. This upstream “best practice” critical parameters on the development of a reliable, robust
will assist in achieving the best possible quality. lead free wave soldering process and determining the
process that achieves the optimized soldered joint.
Accelerated Thermal Cycling
At the time of this paper, all accelerated thermal cycling of This collaborative effort investigated the relationship of
the 133 GTLO boards completed 6000 cycles as per the board design factors to through-hole penetration and joint
project’s requirement. While most of the PTH solder integrity/performance.
interconnects passed the complete regimen of cycling, there
were some interesting observations made. However, not all Addressed in this study are inspection criteria, failure
of the data has been analyzed at time of publication and will definition and measurement, followed by root cause analysis
be published at a later time. The data below graphically and ultimately optimized process confirmation. The result
illustrates the analysis of the passive component surface of this investigation was to lay the foundation of a broader
mount chain for SnPb and Sn100C alloys. Both exhibit effort to characterize the performance of through-hole solder
quasi normal distribution of failures but over different joints on a test vehicle specifically designed for testing the
timeframes. norms of tin lead wave soldering.
100
Overall, this investigation looks to bring an understanding
80 of how critical wave soldering parameters influence the
%)

various outputs. It also attempts to provide the reader with


60 the information necessary to make educated decisions in
Failure (%)
故障(

selecting board attributes and materials in this ever changing


40 environment. It is critical to understand, identify and
control various process parameters in order to execute a
20
rational implementation strategy for a reliable and robust
0 lead free wave soldering process that results in the highest
0 2000 4000 6000 quality product.
サイクル数
Numbers of Cycles
ACKNOWLEDGEMENTS
The authors and project members would like to gratefully
Figure 9. Passive Component Failure as Function of ATC thank the following people for support during the execution
for Sn100C. of Phase II and its analysis: John Norton, Norm Faucher,
and Bruce Quigley for build support, Ursula Marquez de
Tino for the many cross sections, John Borneman for the
through-hole penetration analysis.
REFERENCES
1. Gleason, J., Reynolds, C. “iNEMI Advanced Lead Free
Assembly and Rework Project”, April 2005.
2. Hilman, D. et.al. “JCAA/JGPP Lead Free Solder
Project” SMTAI, 2005.
3. Holder, H. et. al. “Reliability of Partially-filled SAC305
Through Hole Joints” 2006 APEX Proceedings.
4. Excerpt from the Board Assembly Chapter of the
2007and 2009 iNEMI Roadmaps.
5. Marquez de Tino, U. “Procedure for the Preparation of
Cross Sections” Vitronics Soltec information document.

You might also like