Week 10

Chapter 5
Week 10 – Combinational Logic Circuits

Combinational Logic Circuits
In Sum-of-Products (SOP) form, basic combinational circuits
can be directly implemented with AND-OR combinations if
the necessary complement terms are available.
Product terms
A
AB
B
C CD
D AB + CD + . . . + JK
Sum-of-products
J
JK
K
Product term
An example of an SOP implementation is shown. The SOP
expression is an AND-OR combination of the input
variables and the appropriate complements.
When the output of a SOP form is inverted, the circuit is called an
AND-OR-Invert circuit. The AOI configuration lends itself to
product-of-sums (POS) implementation.
An example of an AOI implementation is shown. The output
expression can be changed to a POS expression by applying
DeMorgan’s theorem twice.
Exclusive-OR Logic
The truth table for an exclusive-OR gate
Inputs Outpuis
t
Notice that the output is HIGH whenever A and
B disagree.
The Boolean expression is X = AB + AB
Exclusive-OR Logic
The circuit can be drawn as Inputs Outpu
t
Exclusive-NOR Logic
Inputs Outpu
The truth table for an exclusive-NOR gate A B t X
0 0 1
is Notice that the output is HIGH whenever 0 1 0
1 0 0
A and B agree. 1 1 1
The Boolean expression is X = AB + AB
The circuit can be drawn as
A Symbols:
X
B
=1
Distinctive shape Rectangular outline

Implementing Combinational Logic
Implementing a SOP expression is done by first forming the AND terms;
then the terms are ORed together.
Show the circuit that will implement the Boolean expression
X = ABC + ABD + BDE. (Assume that the variables and
their complements are available.)
Start by forming the terms using three 3-input AND gates.
Then combine the three terms using a 3-input OR gate.
A
B
C
A X = ABC + ABD + BDE
B
D
B
D
E
Karnaugh Map Implementation
For basic combinational logic circuits, the Karnaugh map can be read
and the circuit drawn as a minimum SOP.
A Karnaugh map is drawn from a truth table. Read the minimum SOP
expression and draw the circuit.
Karnaugh Map Implementation
Example
Problem:
A circuit that controls a given digital system has three inputs: x1, x2, and x3. It
has to recognize three different conditions:
• Condition A is true if x3 is true and either x1 is true or x2 is false

• Condition B is true if x1 is true and either x2 or x3 is false
• Condition C is true if x2 is true and either x1 is true or x3 is false
The control circuit must produce an output of 1 if at least two of the conditions A,
B, and C are true. Design the simplest circuit that can be used for this purpose.
12
Condition A
13
Condition B
14
Condition C
15
The output of the circuit can be expressed as
f = AB + AC + BC
16
f = AB + AC + BC
17
f = AB + AC + BC
18
Finally, we get
19
20
21
• Design a combinational circuit with three inputs, x, y and z, and the three
outputs, A, B, and C. when the binary input is 0, 1, 2, or 3, the binary output
is one greater than the input. When the binary input is 4, 5, 6, or 7, the
binary output is one less than the input.
22
23
24
Exercise
A B C D W X Y Z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
• Design logic circuit that convert a 4-bits binary 0 0 1 0 0 1 0 1

0 0 1 1 0 1 1 0
code to Excess-3 code 0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x
1 1 1 0 x X X X
1 1 1 1 X X x x
25
Pulsed Waveforms
For combinational circuits with pulsed inputs, the output
can be predicted by developing intermediate outputs and
combining the result. For example, the circuit shown
can be analyzed at the outputs of the OR gates:
Pulsed Waveforms
Alternatively, you can develop the truth table for
the circuit and enter 0’s and 1’s on the
waveforms. Then read the output from the table.
Exercise
• Design logic circuit from the follow timing diagram.
28
NAND Logic
The NAND Gate
The NAND gate produces a LOW output when all inputs
are HIGH; otherwise, the output is HIGH. For a 2-input
gate, the truth table is
A X
B
0 0 1
0 1 1 A X
1 0 1 B
1 1 0
The NAND operation is shown with a dot between the

variables and an overbar covering them. Thus, the NAND
operation is written as X = A .B (Alternatively, X = AB.)
30
Universal Gates – NAND
NAND gates are sometimes called universal gates because they
can be used to produce the other basic Boolean functions.
A A A A
B B
Inverter AND gate
A A
A+ A+
B B B B
OR gate NOR gate

A A A A
B B
Inverter AND gate
A A
A+ A+
B B B B
OR gate NOR gate

A A A A
B B
Inverter AND gate
A A
A+ A+
B B B B
OR gate NOR gate

A A A A
B B
Inverter AND gate
A A
A+B A+
B B B
OR gate NOR gate

A A A A
B B
Inverter AND gate
A A
A+ A+B
B B B
OR gate NOR gate

Universal Gates
NOR gates are also universal gates and can form all of the basic gates.
A A A A+B
B
Inverter OR gate
A A
AB AB
B B
AND gate NAND gate

Universal Gates - NOR
A A A A+B
B
Inverter OR gate
A A
A A
B B B B
AND gate NAND gate

Universal Gates
A A A A+B
B
Inverter OR gate
A A
A A
B B B B
AND gate NAND gate

Universal Gates
A A A A+B
B
Inverter OR gate
A A
AB A
B B B
AND gate NAND gate

Universal Gates
A A A A+B
B
Inverter OR gate
A A
A AB
B B B
AND gate NAND gate

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Chapter 5

Week 10 – Combinational Logic Circuits

Distinctive shape Rectangular outline

• Condition A is true if x3 is true and either x1 is true or x2 is false

• Design logic circuit that convert a 4-bits binary 0 0 1 0 0 1 0 1

The NAND operation is shown with a dot between the

OR gate NOR gate

OR gate NOR gate

OR gate NOR gate

OR gate NOR gate

OR gate NOR gate

AND gate NAND gate

AND gate NAND gate

AND gate NAND gate

AND gate NAND gate

AND gate NAND gate

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