ADIC
ADIC
2020
Cognitive
Q.No Questions (20×1=20 Marks)
Level
1. The gate of a JFET is______________biased R
A) Reverse B) Forward
C) Reverse as well as forward D) Potential divider
2. The n channel JFET with voltage divider bias has VG = 3V and Vs = 6V,then VGS
Ap
is ____________.
A) 3V B) 9V
C) -3V D) -9V
3. In a JFET, IDSS is known as_________. U
B) drain to source current with gate
A) drain to source current
shorted
C) drain to source current with gate
D) Source to Drain current.
open
4. The example for Voltage series feedback is_________. R
A) CE Amplifier B) CC Amplifier
C) CS Amplifier D) CD Amplifier
5. Gate to source voltage in self biasing is equal to the________. U
A) IDRs B) -IDRs
C) IDRd D) -IDRd
For given amplifier circuit calculate the output impedance Zo.
6.
Ap
A) 256.2 Ω B) 321.5 Ω
C) 351.7 Ω D) 431.7 Ω
7. Ratio of ac output power to dc input power is called as _______. R
A) Power gain B) Efficiency
C) Modulation D) Potential drop
Ap
A) -6.786 B) -5.43
C) - 8.643 D) -9.256
9. In AC analysis DC voltage is replaced by the_________. U
A) AC voltage B) AC ground
C) DC ground D) Both a and b
10. For the given amplifier circuit, Determine the value of input impedance.
Ap
A) 281 Ω B) 261 Ω
C) 158 Ω D) 121 Ω
A) Class A B) Class B
C) Class C D) Class AB
15. A series fed class A amplifier shown in below fig operates from D.C source &
applied sinusoidal input signal generates peak base circuit 9 mA. Then determine
the quiescent current Icq.
Ap
A) 112.8 mA B) 321.22mA
C) 643.5mA D) 528.26 mA
R
16. In a feedback amplifier if the input signal and the feedback signal are in phase it is
said to be______.
A) Negative feedback
B) Lead feedback
C) Positive feedback D) Lag feedback
17. In the analysis of feedback amplifiers, by shorting the output if the feedback element
U
value becomes zero then it is ___________
A) Current sampling B) Voltage Sampling
C) Both A & B D) Mixed Sampling
18. Determine the voltage gain with feedback for a voltage-series feedback having
Ap
A = –100, R1 = 15 k , Ro = 20 k , and a feedback of β= –0.25.
A) 3.85 B) 7.75
C) -7.75 D) -3.85
19. Multi stage amplifier is used to improve _________ R
A) Voltage B) Current
C) Gain D) Impedance
20. Which of the following class have a theoretical efficiency of 78.5%? R
A) Class B B) Class C
C) Class AB D) Class D
Cognitive
Q.No Questions (20×1=20 Marks)
Level
1. The effective Quality factor of a tuned amplifier is called as _________. R
A) 0.69 RC B) 0.37 RC
C) 0.74 RC D) 1.38 RC
10. A LC oscillator which uses two inductive reactances and capacitive reactance in
R
the feedback now is called as ____________
A) Hartley oscillator B) Colpitts oscillator
C) Wien bridge oscillator D) Feed back oscillator
11. To increase the input resistance in differential amplifier, replace the transistor R
by_________
A) Current mirror B) Current repeater
C) A op-amp D) Darlington pair
12. Name the resistor that is connected in the non-inverting terminal of op-amp which
is in parallel combination of resistor connected in inverting terminal and feedback R
resistor.
A) Offset minimizing resistor B) Offset reducing resistors
C) Output minimizing resistors D) Random minimizing resistor
Design an amplifier with a gain of -10 and input resistance equal to 10 kΩ the
Ap
13. findout the feedback resistance_________
A) 50 k Ω B) 100 k Ω
C) 150 k Ω D) 200 k Ω
14. State the emitter current in a differential amplifier with both transistors biased and
U
matched.
A) IE=IQ B) IE=IQ /2
C) IE=(IQ )2 D) IE=(IQ)2/2
15. Summarize the condition for non-inverting amplifier to act as voltage follower. R
A) Rf = 0, R1 =∞ B) Rf = ∞, R1 = 0
C) Rf = 0, R1 = 0 D) Rf = R1
16. A certain inverting amplifier has a closed-loop voltage gain of 25. The Op-amp has
an open-loop voltage gain of 100,000. If an op-amp with an open-loop voltage gain U
of 200,000 is substituted in the arrangement, the closed-loop gain_________.
A) doubles B) drops to 12.5
C) remains at 25 D) increases slightly
17. Calculate the CMRR of an op-amp with Ad = 5000 and Ac = 100. Ap
A) 50 B) 100
C) 150 D) 200
18. Choose the output voltage of an ideal op amp, if V 1 and V2 are the two input
R
voltages.
A) V0=V1-V2 B) V0=A(V1-V2)
C) V0=A(V1+V2) D) V0=V1V2
19. Give the other one input terminal voltage, if one of the op-amp’s input terminal is
U
at zero potential.
A) 0 B) 10
C) 100 D) 1000
20. The instrumentation amplifier is used to amplify the output of ________. U
A) speaker B) microphone
C) transducer D) transformer
Issue 10.0/01.07.2020
SRI RAMAKRISHNA ENGINEERING COLLEGE
[Educational Service : SNR Sons Charitable Trust]
[Autonomous Institution, Accredited by NAAC with ‘A’ Grade]
[Approved by AICTE and Permanently Affiliated to Anna University, Chennai]
[ISO 9001:2015 Certified and all eligible programmes Accredited by NBA]
VATTAMALAIPALAYAM, N.G.G.O. COLONY POST, COIMBATORE – 641 022.
Question 1
number
Question In a common source JFET amplifier the output voltage is
__________
Option No Option Correct(Y)
Option 1 1800 out of phase with input Y
Option 2 In phase with input
Option 3 900 out of phase with input
Option 4 None of the above
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Question 2
number
Question Junction Field Effect Transistors (JFET) contain how many
diodes____
Option No Option Correct(Y)
Option 1 4
Option 2 3
Option 3 2 Y
Option 4 1
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Question 3
number
Question A JFET is similar in operation to___________
Question 4
number
Question If properly biased JFET acts as _______
Question 5
number
Question The voltage gain of a common source JFET amplifier depends
upon its ______________
Question 6
number
Question IDSS can be defined as__________
Question 7
number
Question A common gate amplifier has __________
Question 8
number
Question The pinch off voltage is the voltage _______
Question 9
number
Question The best location for setting a Q point on dc load line of an
FET Amplifier is at ____________
Option No Option Correct(Y)
Option 1 Saturation point
Option 2 Cutoff point
Option 3 Mid-point y
Option 4 None of these
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Question 10
number
Question Which of the following is a best biasing method for transistor
bias_____________
Option No Option Correct(Y)
Option 1 emitter bias
Option 2 voltage divider bias y
Option 3 fixed bias
Option 4 collector feedback bias
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Question 11
number
Question What is the role of emitter bypass capacitance in the transistor
amplifying circuit____________
Option No Option Correct(Y)
Option 1 To prevent damage of emitter resistance from
variation in voltage
Option 2 To prevent emitter from over voltage
Option 3 To increase gain y
Option 4 To increase load to transistor circuit
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Question 12
number
Question Which of the following is not considered for quiescent
operating point____________
Option No Option Correct(Y)
Option 1 DC collector-emitter voltage
Option 2 DC collector current
Option 3 DC base current
Option 4 DC input voltage y
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Question 13
number
Question The AC power of output signal is obtained by_________
Question 14
number
Question Choose the neutralizing elements used in tuned amplifier
Question 15
number
Question Which of the following statements are correct for biasing
transistor amplifier configurations?
Question 16
number
Question Introducing a resistor in the emitter of a CE amplifier
stabilizes the dc operating point against variations in________
Question 17
number
Question If the emitter resistance in a common emitter voltage amplifier
is not bypassed, it will_______________
Question 18
number
Question The unwanted characteristics of amplifier output apart from
desired output is collectively termed as___________
Question 19
number
Question Which device is used for the amplification of audio signal
before power amplifiers________________
Option No Option Correct(Y)
Option 1 Diode
Option 2 Op-amp
Option 3 Vacuum tubes y
Option 4 SCR
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Question 20
number
Question Power amplifier directly amplifies________________
Question 21
number
Question The power rating of amplifier is 100watts then the transistor
can only operate at_____________
Option No Option Correct(Y)
Option 1 Power higher than 100w
Option 2 Power lower than 100w y
Option 3 Power near to 100w
Option 4 Power lower than 50w
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Question 22
number
Question Which of the following class amplifier has poorest
linearity_____
Option No Option Correct(Y)
Option 1 Class A
Option 2 Class B
Option 3 Class C y
Option 4 Class AB
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Question 23
number
Question Which of the following amplifier is designed to operate in
digital pulses?
Option No Option Correct(Y)
Option 1 Class D y
Option 2 Class C
Option 3 Class AB
Option 4 Class B
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Question 24
number
Question Amplitude distortion is due to________
Question 25
number
Question If output of amplifier exceeds maximum allowable value,
___________ is occurs in output waveform.
Option No Option Correct(Y)
Option 1 Clipping y
Option 2 Clamping
Option 3 Rectifying
Option 4 Rounding
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Question 26
number
Question Give the Expression for input impedance of Current series
feedback Amplifier______________
Option No Option Correct(Y)
Option 1 Ri(1+βGM) y
Option 2 Ri(1+βRM)
Option 3 Ri(1+βAM)
Option 4 Ri(1+ΒAI)
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Question 27
number
Question Negative feedback does not improve _________________
Question 28
number
Question Which among the following is an output provided by
transresistance amplifier?
Question 29
number
Question Determine the gain with feedback for the amplifier with open
loop gain of 300 and feedback factor of 0.1.
Question 30
number
Question The Voltage amplifier has voltage gain 200 at cut off
frequencies. Find the maximum voltage gain.
Question 31
number
Question A decade of frequency change is a_________
Question 32
number
Question Which among the following represents the frequency at which
short circuit CE current gain acquires unit magnitude?
Question 33
number
Question Which of the following components in a transistor circuit is
really responsible for harmonic distortion
Option No Option Correct(Y)
Option 1 Capacitor
Option 2 Resistor
Option 3 Transistor Y
Option 4 Inductor
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Question 34
number
Question Frequency distortion occurs due to level of _________ is
varied with frequency.
Option No Option Correct(Y)
Option 1 Amplitude
Option 2 Amplification y
Option 3 Distortion
Option 4 Output
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Question 35
number
Question The quiescent collector current Ic of a transistor is increased
by changing resistances. As a result________
Question 36
number
Question Identify the condition for differential amplifier to acts as
switch.
Option No Option Correct(Y)
Option 1 4VT<Vd< -4VT y
Option 2 2VT<Vd< -2VT
Option 3 0 <Vd< -4VT
Option 4 0 <Vd< 2VT
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Question 37
number
Question If V1 and V2 are the two input voltages, the output voltage of
ideal op-amp is
Option No Option Correct(Y)
Option 1 V0=V1-V2
Option 2 V0=A(V1-V2) y
Option 3 V0=A(V1+V2)
Option 4 V0=V1V2
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Question 38
number
Question Compute the input offset current from the circuit shown
below:
Question 39
number
Question Which of the following ICs are the most widely used?
Question 40
number
Question Calculate the slew rate of an operational amplifier with output
changed from -4V to +4V over a time interval of 0.5 µs.
Option No Option Correct(Y)
Option 1 16 V/μs
Option 2 8 V/μs
Option 3 32 V/μs y
Option 4 24 V/μs
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Question 41
number
Question Identify the circuit that is not part of operational amplifier
internal circuit.
Option No Option Correct(Y)
Option 1 Clamper y
Option 2 Differential amplifier
Option 3 Level translator
Option 4 Output driver
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Question 42
number
Question The Variation in the operating frequency of op-amp causes
variation in__________.
Option No Option Correct(Y)
Option 1 gain amplitude
Option 2 gain amplitude & its phase angle y
Option 3 phase angle
Option 4 stability
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Question 43
number
Question Choose the standard supply voltage for an ordinary
operational amplifier.
Option No Option Correct(Y)
Option 1 ±5V to ±22V y
Option 2 ±25V to ±22V
Option 3 ±10V to ±15V
Option 4 ±12V to ±15V
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Question 44
number
Question Identify the component in the feedback path connection in an
inverting ideal integrator.
Option No Option Correct(Y)
Option 1 Resistor
Option 2 Inductor
Option 3 Capacitor y
Option 4 Diode
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Question 45
number
Question Choose the output of an integrator for the input rectangular
pulse.
Option No Option Correct(Y)
Option 1 Sine wave
Option 2 Square wave
Option 3 Ramp y
Option 4 Rectangular pulse
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Question Type Basic MCQ
Question 46
number
Question Identify the pulse width of the mono stable multi vibrator.
Question 47
number
Question Choose the formula for frequency of oscillation for RC phase
shift oscillator.
Option No Option Correct(Y)
Option 1 1 Y
2𝜋𝑅𝐶√6
Option 2 1
4𝜋𝑅𝐶√6
Option 3 1
2𝜋𝑅𝐶√3
Option 4 1
4𝜋𝑅𝐶√3
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Question 48
number
Question Determine the frequency of oscillation of wein bridge
oscillator if R1= R2 = 1.592 kΩ, R3 = 1.8 kΩ, Rf= 3.6 kΩ, C1 =
C2 = 0.05 μf.
Option No Option Correct(Y)
Option 1 1 kHz
Option 2 2 kHz Y
Option 3 3 kHz
Option 4 4 kHz
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Question 49
number
Question Identify the type of transistor which is placed in the feedback path of the
logarithmic amplifier.
Option No Option Correct(Y)
Option 1 Common Emitter
Option 2 Common Collector
Option 3 Common Base y
Option 4 Common Drain
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Question 50
number
Question Identify the number of diode which is used in half wave
precision rectifier circuit.
Option No Option Correct(Y)
Option 1 1
Option 2 2 y
Option 3 3
Option 4 4
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Question 51
number
Question A first order low pass butterworth active filter has a cut off
frequency of 10kHz and unity gain at low frequency. Find the
voltage transfer function magnitude in dB at 12 kHz for the
filter.
Option No Option Correct(Y)
Option 1 0.64
Option 2 -4.87
Option 3 -3.87 y
Option 4 -0.64
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Question 52
number
Question If a band pass filter has a lower cut off frequency fL= 250 Hz
and a higher cut off frequency fH = 2500Hz. Find its resonant
frequency.
Option No Option Correct(Y)
Option 1 790.56 Hz y
Option 2 2250 Hz
Option 3 250 Hz
Option 4 2500 Hz
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Question 53
number
Question Cascaded ________ filter and _______ filter acts as band pass
filter.
Option No Option Correct(Y)
Option 1 Low pass, Notch
Option 2 Low pass, High pass y
Option 3 High pass, Notch
Option 4 High pass, Band pass
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Question 54
number
Question Determine the quality factor of narrowband band pass filter
with a resonant frequency of 200 Hz and a bandwidth of 20
Hz.
Option No Option Correct(Y)
Option 1 220
Option 2 180
Option 3 100
Option 4 10 y
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Question 55
number
Question In voltage controlled oscillator at which pin square wave output is
taken?
Option No Option Correct(Y)
Option 1 1
Option 2 5
Option 3 3 y
Option 4 4
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Question 56
number
Question Voltage to frequency conversion factor for voltage controlled oscillator is
Kv = ______.
Option No Option Correct(Y)
Option 1 8𝑓𝑜 y
𝑉𝑐𝑐
Option 2 4𝑓𝑜
𝑉𝑐𝑐
Option 3 2𝑓𝑜
𝑉𝑐𝑐
Option 4 6𝑓𝑜
𝑉𝑐𝑐
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Question 57
number
Question The range of frequencies over which PLL can acquire lock
with an input signal is called as _________range.
Option No Option Correct(Y)
Option 1 Lock
Option 2 Capture y
Option 3 Pull in
Option 4 Pull out
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Question 58
number
Question Determine the change in dc control voltage Vcduring lock if
input signal frequency fs = 20kHz, the free running frequency
is 21kHz and the V/F transfer coefficient of VCO is 4 kHz/V.
Option No Option Correct(Y)
Option 1 4V
Option 2 0.5 V
Option 3 0.25 V y
Option 4 1V
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Question 59
number
Question In PLL IC 565 connected as an FM demodulator has R1 = 10kΩ, C1 = 0.01μf,
C = 0.04μf and supply voltage is +12 V. Determine the lock range.
Option No Option Correct(Y)
Option 1 195 kHz y
Option 2 185 kHz
Option 3 190 kHz
Option 4 100 kHz
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Question 60
number
Question Choose the output voltage Vo formula for the antilogarithmic
amplifier.
Option No Option Correct(Y)
Option 1 VR (10KVi)
Option 2 VR + 10KVi
Option 3 VR - 10KVi
Option 4 VR (10-KVi) y
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Question 61
number
Question In phase locked loop when the loop is locked, the frequency fo
is _______ to an externally applied dc control voltage.
Option No Option Correct(Y)
Option 1 Inversely proportional
Option 2 Directly proportional y
Option 3 Equal
Option 4 Unequal
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Question 62
number
Question Which type of ADC follow the conversion technique of
changing the analog input signal to a linear function of
frequency?
Option No Option Correct(Y)
Option 1 Direct type ADC
Option 2 Integrating type ADC y
Option 3 Both integrating and direct type ADC
Option 4 Successive approximation ADC
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Question 63
number
Question Which A/D converter is considered to be simplest, fastest and
most expensive?
Option No Option Correct(Y)
Option 1 Servo converter
Option 2 Counter type ADC
Option 3 Flash type ADC y
Option 4 All of the mentioned
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Question 64
number
Question ______number of comparator required for flash type A/D
convertor.
Option No Option Correct(Y)
Option 1 Triples for each added bit
Option 2 Reduce by half for each added bit
Option 3 Double for each added bit y
Option 4 Doubles exponentially for each added bit
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Question 65
number
Question What is the analog output for a 4-bit R-2R ladder digital
to analog converter when input is (1000)2, for Vref = 5 V?
Option No Option Correct(Y)
Option 1 2.3333 V
Option 2 2.4444 V
Option 3 2.5556 V
Option 4 2.6667 V y
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Question 66
number
Question How many clock pulses do a successive approximation
converter requires for obtaining a digital output.
Option No Option Correct(Y)
Option 1 12
Option 2 6
Option 3 8
Option 4 None of the above y
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Question 67
number
Question Find out the resolution of 8 bit DAC/ADC?
Question 68
number
Question The time taken for the output to settle within a specified band
of its final value is referred as_________
Option No Option Correct(Y)
Option 1 Conversion time
Option 2 Settling time y
Option 3 Take off time
Option 4 Hold time
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Question 69
number
Question In which application dual slop converter are used.
Question 70
number
Question A dual slope has the following specifications:
16bit counter; Clock rate =4 MHz; Input voltage=12v; Output
voltage =-7v and Capacitor=0.47µF.
If the counters have cycled through 2n counts, determine the
value of resistor in the integrator.
Option No Option Correct(Y)
Option 1 60kΩ y
Option 2 90kΩ
Option 3 120kΩ
Option 4 150kΩ
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Transformer coupling
8 Midrange gain of an amplifier is ___________ with frequency.
2. The Phase shift between input and output for CE amplifier is _____________.
a) 900
b) 1800
c) 00
d) 3600
4. For a certain amplifier f1 = 50Hz and f2 = 500KHz , then the bandwidth of amplifier is
______________.
a) 499.95KHz
b) 500.05KHz
c) 500KHz
d) 50Hz
5. The Voltage amplifier has voltage gain 200 at cut off frequencies. Find the maximum
voltage gain.
a) 280.84
b) 320.14
c) 282.84
d) 280.84
10. Determine the gain with feedback for the amplifier with open loop gain of 300 and feedback
factor of 0.1.
a) 9.13
b) 10.67
c) 9.67
d) 10.13
11. What is the ratio of the input impedance with series feedback to that without feedback?
a) 1 + βA
b) βA
c) β
d) 1
12. Determine the voltage gain with feedback for a voltage-series feedback having A = –100,
R1 = 15 k , Ro = 20 k , and a feedback of β= –0.25.
a) 3.85
b) –3.85
c) –9.09
d) 9.09
20. If the Q factor of the single tuned amplifier is doubled then its bandwidth will be
a) Same
b) half
c) double
d) four times
22. If a tuned circuit has a resonant frequency of 1 MHz and a bandwidth of 20 KHz, its Q
factor is
a) 40
b) 50
c) 60
d) 70
25. The overall bandwidth of two identical voltage amplifiers connected in cascade will
a) Remain the same as that of a single stage.
b) Be worse than that of a single stage.
c) Be better than that of a single stage
d) Be better if stage gain is low and worse if stage gain is high
27. In a feedback amplifier if the input signal and the feedback signal are in phase it is said to
be______.
(a) Positive feedback
(b) Negative feedback
(c) Lead feedback
(d) Lag feedback
28. The Transfer Ratio or Gain of the Transresistance amplifier is given as______
(a) Vo/Vi
(b) Io/Ii
(c) Io/Vi
(d) Vo/Ii
29. The Gain of the amplifier is _______ as an impact of negative feedback in Amplifiers.
(a) Decreases
(b) Increases
(c) Stabilizes
(d) Not Changed
30. In the analysis of feedback amplifiers, by shorting the output if the feedback element value
becomes zero then it is ___________
(a) Current sampling
(b) Voltage sampling
(c) Both a & b
(d) Mixed Sampling
1. small
2. very high
3. very small
4. NEGLIGIBLE
1. gate voltage
2. source voltage
3. drain voltage
4. gate current
1. RC coupling
2. Transformer coupling
3. Direct coupling
4. Impedance coupling
37. The maximum efficiency of resistance loaded class A power amplifier is ……..
1. 5%
2. 50%
3. 30%
4. 25%
38. Range of frequencies between lower critical frequency and upper critical frequency is called
1. Total frequency
2. Sum of frequencies
3. Multiple frequencies
4. Bandwidth
1. Power gain
2. Efficiency
3. Modulation
4. Modification
1. AC voltage
2. AC ground
3. DC ground
4. Both a and b
1. DC operation
2. AC operation
3. Q operation
4. Q point
1. IDRs
2. −IDRs
3. Rs
4. Rc
44. Frequency at which output power drops to one-half of its mid-range value is known as
1. Critical frequency
2. High frequency
3. low frequency
4. Unity-gain frequency
45. Maximum gain occurs for range of frequencies between upper and lower critical
frequencies and is called
1. 2 times change
2. 3 times change
3. 10 times change
4. 100 times change
1. Increases
2. Decreases
3. Remains constant
4. becomes 0
48. Miller's theorem is applicable in a single stage CE hybrid π model in order to deal with
________
a. fα
b. fβ
c. fT
d. f
d. Power bandwidth
(a)78.5%
(b) 25.5%
(c)77.5%
(D) 50%
56. Find the BW of a 3 stage cascaded tuned amplifier if the resonant frequency is 455KHz and the Q of
each stage is 10.
a) 23.19KHz
b) 23.19MHz
c) 23.19Hz
d) 2.19KHz
57. Choose the neutralizing elements used in tuned amplifier.
60. Which of the following statements are correct for biasing transistor amplifier
configurations?
61. Introducing a resistor in the emitter of a CE amplifier stabilizes the dc operating point
against variations in
63. For a base current of 10 μA, what is the value of collector current in common emitter if βdc
= 100
a) 10 μA
b) 100 μA
c) 1 mA
d) 10 mA
Answer: Option C
Explanation: IC = 10 x 100 μA = 1 mA
93. The voltage gain of a common source JFET amplifier depends upon its
a.Transconductance (gm)
b.Amplification factor (μ)
c.External load resistance
d.Both (a) and (c)
98. Junction Field Effect Transistors (JFET) contain how many diodes
a) 4
b) 3
c) 2
d) 1
99. D-MOSFETs are sometimes used in series to construct a cascode high-frequency amplifier
to overcome the loss of
a) low output impedance
b) capacitive reactance
c) high input impedance
d) inductive reactance
100. IDSS can be defined as
a. the minimum possible drain current
b. the maximum possible current with VGS held at –4 V
c. the maximum possible current with VGS held at 0 V
d. the maximum drain current with the source shorted