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    Hourly Chime Fun Gen

    Uploaded by

    Karanpal Singh
    This circuit uses a digital clock's hourly pulse output to generate hourly chimes from a piezo buzzer. It uses two 4-bit counters and a comparator IC to compare the hour count to the elapsed hour count. When the elapsed hour count is less than the hour count, a timer is enabled to sound the buzzer that number of times. This allows the buzzer to chime once at the first hour, twice at the second hour, and so on up to 12 chimes at the 12th hour, then repeating the cycle. The circuit can operate over a wide voltage range and is compatible with TTL and CMOS logic families.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd

    Hourly Chime Fun Gen

    Uploaded by

    Karanpal Singh
    243 views1 page
    This circuit uses a digital clock's hourly pulse output to generate hourly chimes from a piezo buzzer. It uses two 4-bit counters and a comparator IC to compare the hour count to the elapsed hour count. When the elapsed hour count is less than the hour count, a timer is enabled to sound the buzzer that number of times. This allows the buzzer to chime once at the first hour, twice at the second hour, and so on up to 12 chimes at the 12th hour, then repeating the cycle. The circuit can operate over a wide voltage range and is compatible with TTL and CMOS logic families.

    Original Title

    38818256 Hourly Chime Fun Gen

    Copyright

    © Attribution Non-Commercial (BY-NC)

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    This circuit uses a digital clock's hourly pulse output to generate hourly chimes from a piezo buzzer. It uses two 4-bit counters and a comparator IC to compare the hour count to the elapsed hour count. When the elapsed hour count is less than the hour count, a timer is enabled to sound the buzzer that number of times. This allows the buzzer to chime once at the first hour, twice at the second hour, and so on up to 12 chimes at the 12th hour, then repeating the cycle. The circuit can operate over a wide voltage range and is compatible with TTL and CMOS logic families.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    243 views1 page

    Hourly Chime Fun Gen

    Uploaded by

    Karanpal Singh
    This circuit uses a digital clock's hourly pulse output to generate hourly chimes from a piezo buzzer. It uses two 4-bit counters and a comparator IC to compare the hour count to the elapsed hour count. When the elapsed hour count is less than the hour count, a timer is enabled to sound the buzzer that number of times. This allows the buzzer to chime once at the first hour, twice at the second hour, and so on up to 12 chimes at the 12th hour, then repeating the cycle. The circuit can operate over a wide voltage range and is compatible with TTL and CMOS logic families.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 1

    Hourly Chime Function Generator

    Though IC UM3484 performs the hourly chime function, it is not easily available in the market.
    The circuit presented here performs similar function of providing hourly chime, making use of
    the hourly pulse output from your existing digital clock. The number of times the circuit chimes
    hourly equals the time in hours (12-hour clock basis). The circuit can function over a wide
    supply voltage range of 5 to 12V DC and is compatible with TTL and CMOS families. The
    working of the circuit is explained below.
    IC1 (CD4585) is a 4-bit magnitude comparator and IC2 is a dual 4-bit counter. Timer IC3
    (NE555) is configured as an astable flip-flop whose threshold pin 4 is controlled by IC1 output
    pin 12 (A<B). As long as magnitude of 'A' input is less than 'B' input, pin 12 of IC1 will remain
    high and timer IC3 will remain enabled. (Here 'A' and 'B' denote the weightage of the two 4-bit
    binary words A0, A1, A2, A3 and B0, B1, B2, B3 at the input of IC1.) During positive half cycles
    of the timer output, transistor T1 will conduct and piezo buzzer will sound. Thus the number of
    times the buzzer sounds will equal the number of output pulses from timer IC3.

    Assume that initially at '00' hours, both counters of IC2 are reset and as such the 'A' output
    (pins 3 through 6) and 'B' output (pins 11 through 14) are at logic '0' state. Now at '01' hour,
    when the first hourly input pulse, after differentiation by capacitor C2 and resistor R2, is
    applied to clock pin 9 of counter B and master reset pin 7 of counter A, output 'B' is
    incemented from previous count of 0 to 1 whereas counter A output is still 0 (reset condition).

    As a result A < B condition is satisfied and pin12 of IC1 goes to logic high state, enabling timer
    IC3. The output at pin 3 of IC3 goes high for a period determined by combination of resistors
    R4, R5 and capacitor C4, and the piezo buzzer produces a musical chime. Simultaneously count
    of counter A of IC2 increments to 1 since output of IC3 is connected to clock A (pin 1). Thus A <
    B condition is no more satisfied and timer pin 4 (reset) goes low and hence a single chime is
    produced. On the next hourly pulse, counter B of IC2 is further incremented ( to binary
    equivalent of decimal 2) while its counter A is again reset to 0. Pin12 of IC2 and pin 4 of IC3
    again go high as count A=0 while count B=2. Thus timer IC3 will now reset after producing two
    clock cycles (on-off-on-off) and thus the buzzer chimes twice. Thus the number of times the
    clock chimes equals the number of hours elapsed since reset of both counters of IC2. At the
    12th hourly pulse input, counter B count increments to binary equivalent of decimal 12 and
    after generation of 12 cycles by timer IC3, counter A output equals binary equivalent of 12. The
    modulus of second counter is selected as 13 by AND gate formed by diodes D1, D2 and resistor
    R1. Hence after 12th hour the counter again starts counting from 1.

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