Q3. Explain The Open Circuit and Short Circuit Test On A Single Phase

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SUNIL

Department : EE / ME-I/ ME-II Semester : 1st Sem.(1st Year)

Subject: Electrical Technology Date: 25-11-2010

Paper Code: EE-101-F Session : Morning

Max.Marks: 100 Time: 3 Hrs

Note: Attempt five Questions. Question “1” is compulsory, choose at-least one

question from each part.

Q1. Explain the following.

(i) Form factor and peak factor (2)


(ii) Slip (2)
(iii) Active power and reactive power (2)
(iv) Power factor (2)
(v) Efficiency (2)
(vi) Stator and Rotor (2)
(vii) Machine (2)
(viii) Transformer (2)
(ix) Voltage Drop (2)
(x) No-load current (2)
(Part-A)
Q2. Explain On Load behavior of a single phase transformer. Also draw

phasor diagram for

(1) Resistive Load


(2) Inductive Load
(3) Capacitive Load. (20)

Q3. Explain the open circuit and short circuit test on a single phase

transformer. Draw neat and clean diagrams. (20)


OR (Part-D)

Q. Explain the two wattmeter method for the measurement of three Q8. What are the essential requirements of an measuring Instrument ?

phase power. (20) Also explain the construction and working of attraction type

(Part-B) moving iron instrument. (20)

Q4. By applying Nodal method of network analysis, find the current Q9. Explain the construction and working of three phase induction

in 15Ω resistor of the network shown in fig. below (20) motor . Draw neat and clean Diagrams. (20)

OR

Q. Write a short note on any two:

(i) Maximum Power Transfer Theorem. (10)

(ii) Cu-Losses and Iron Losses. (10)


Q5. State and explain Norton’s theorem. Draw neat and clean (iii) Condition for maximum efficiency in Transformer. (10)
(
diagrams. (20)

(Part-C)

Q6. Derive the relationship between voltage and current for a purely

inductive circuit. Also show that the average power consumed

by an inductive circuit is zero. (20)

Q7. A 120 V, 60 W lamp is to be operated on 220 V, 50 Hz supply

mains. Calculate what value of (a) non-inductive resistance (b)

pure inductance would be required in order that lamp is run on

correct voltage, which method is preferable and why? (20)


SUNIL

Department : EE / ECE Semester : 4 th Sem.(2nd Year)

Subject: Analog Electronics Date: -04-2011

Paper Code: EE-202-F Session :

Max.Marks: 100 Time: 3 Hrs

Note: Attempt five Questions. Question “1” is compulsory, choose at-least


one question from each part.

Q1. Explain the following.

(i). What process is opposite of the thermal generation of electron- hole pairs?

(2)
(ii). Explain why the temperature coefficient of resistance of a semiconductor is

negative? (2)

(iii) Define Peak inverse voltage. (2)

(iv) Explain why an ordinary junction transistor is called bipolar. (2)

(v) Explain why a transistor should be biased. (2)

(vi) Why do you need more than one stage of amplifiers in practical circuits? (2)

(vii) What is an op-amp? (2)

(viii) What is meant by frequency response? (2)

(ix) What is feedback in amplifiers? (2)

(x) What is mid band gain? (2)


(Part-A) (b). What is the significant difference between the construction of an

Q2. (a). Sketch circuit for Centre-Tap full wave rectifier. Derive an enhancement type MOSFET and the depletion type MOSFET. (5)
expression for DC output voltage for it. (10)
(b). Why a Bridge type full wave rectifier is preferred over a (c). Draw a small signal equivalent circuit of MOSFET amplifier in
centre tap full-wave rectifier. (10)
common source configuration and derive the expression for voltage
Q3.(a). Draw and explain the V-I Characteristic of P N Junction Diode.
gain. (10)
(10)
Q7. (a). What is a differential amplifier? Derive an expression for the voltage
(b). Explain the difference in conductors, insulators and semiconductors
gain of a differential amplifier. (10)
using the energy-band diagrams. (10)
(b). Define the characteristics of an ideal op-amp. Explain why open loop
(Part-B)
configurations are not used in linear applications. (10)
Q4. (a). What are the requirements of biasing circuit? List and explain the
(Part-D)
factors responsible for Q point shift in BJT amplifier. (10)
Q8.(a). Explain how the negative feedback in an amplifier helps in reducing
(b). Why the “fixed bias” biasing circuit is seldom used? Justify your
the distortion and noise. (10)
answer. (10)
Q5. (a). Sketch the output characteristic of PNP Transistor in CE (b). State the merits and demerits of negative feedback in amplifiers.
(10)
configuration. Label all the variables and indicate Active, Cut-off,
Q9. Write a short note on any two:
and saturation regions. (10)
(i) Voltage Trippler (10)
(b). Draw the circuit diagram of a simple transistor amplifier in CE
(ii) Clipping Circuits (10)
configuration and write down its equation of DC load line. (10)
(iii) Frequency Response of CE Amplifier (10)
(Part-C)

Q6. (a). Sketch and explain the basic construction of an N-Channel type

MOSFET. (5)
(

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