Specify Gain and Phase Margins On All Your Loops: Venable Technical Paper # 2
Specify Gain and Phase Margins On All Your Loops: Venable Technical Paper # 2
Specify Gain and Phase Margins On All Your Loops: Venable Technical Paper # 2
Introduction
When purchasing a power supply, the focus is normally on the performance of the main output. This performance is usually based on ripple, noise, and output voltage deviation and recovery time when subjected to a transient load. Although these parameters are important, they do not tell the whole story. Many power supply buyers have procured equipment that seemed to work, only to find out later that the margins were insufficient to account for manufacturing tolerances, and that not all units worked properly when placed in the field. Specifying acceptable margins and testing for these margins in production can avoid many field failures and the attendant cost and customer dissatisfaction.
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Stability Margins
Power supplies regulate output voltage by sensing the output and feeding a portion of it back to be compared to a constant voltage reference. The difference between the fraction of the actual output voltage and the reference is amplified, and the amplified difference signal is used to control the power-processing portion of the circuit to keep the output voltage constant. Figure 1 shows this process. The output of the power processing circuit, or MODULATOR, is compared to a reference in the AMPLIFIER portion, and the difference is amplified and inverted and fed to the control input of the modulator. The process is the same for the current limit loop; if the supply has active current limiting that regulates the current rather than shutting down. In this case, a voltage proportional to current from a sense resistor or current transformer is compared to a reference voltage representing the maximum allowable current, and the difference is amplified and inverted and fed back to input of the modulator. Most pulse width modulator (PWM) chips have transconductance (high output impedance) error amplifiers so that the outputs of the voltage and current error amplifiers can be connected directly together. The amplifier output, which calls for the lowest duty cycle, dominates. When the output of a circuit is connected back to the input, a potential for oscillation exists. When a signal proceeds around this feedback loop it is amplified or attenuated, and shifted in phase. At low frequency the signal is amplified. As the frequency increases, the loop gain drops, until a frequency is reached where the return signal is exactly the same amplitude as the input error signal. This is known as the unity gain frequency, crossover frequency, or bandwidth. If the phase shift around the loop at this frequency totals 360 (180 from phase shifts and time delays, plus 180 from the inversion), the circuit will oscillate. Figure 2 shows a typical plot of loop gain and phase shift versus frequency. The gain is decreasing with frequency, and crosses unity gain (0 dB) at about 3 kHz. The phase lag at low frequency is mostly from the error amplifier. The total phase lag is about 270, 180 from the inversion and another 90 from the pole at the origin in the amplifier gain. As the phase lag through the modulator portion becomes significant, the total phase shift lags more and more. When the loop gain is 0 dB, the difference between the total phase lag and 360 is the PHASE MARGIN. As the frequency increases, the point is reached where the total phase shift around the loop does total 360 and the gain has dropped below unity. The amount the gain is below 0 dB when the total phase shift is 360 is called GAIN MARGIN. Phase margin and gain margin are the stability margins of the particular feedback loop.
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frequency response analyzer is used to measure the input and output voltages with respect to ground and calculate the ratio of the two voltages in both gain and phase.
Figure 3. Technique for Making Bode Plot Measurements Where Are The Loops?
Everyone knows about the main loop, which in a power supply is typically closed from the output with the heaviest load to the primary side regulator. There may be, and usually are, many other loops in a power supply, each of which has unique gain and phase margins. Common additional loops are on independently regulated outputs other than the main loop. In larger power systems, there is frequently an auxiliary or housekeeping supply, intended to provide internal voltages for the various control and monitoring circuits inside the power system. A popular technique for regulating secondary outputs is by the use of power magamps, really saturable reactors which block a variable portion of the volt-seconds delivered by the power transformer to the output filter. By adjusting the blocking time, the average and thereby the dc value of the output can be controlled. The use of magamps or saturable reactors creates a time delay in the local feedback loop. The delay is because control information is stored in the saturable reactor in the form of a flux reset level, and this information is returned at a later time when the reactor saturates on the next half-cycle. This time delay translates to a phase lag in the feedback loop, which limits the achievable bandwidth of the control loop. In some supplies, the current limit circuit is an active feedback loop. If the current limit is not a "bang-bang" or shutdown type, it has a loop, which must be stabilized. In addition, it should not interfere with the related voltage loop for the particular output being protected. The techniques for stabilizing a current feedback loop are exactly the same as for a voltage loop. The resistor values tend to be lower, necessitating a lower value of insertion resistor, but all principles remain the same, including gain and phase margin guidelines.
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of 1 MHz. Old loop bandwidth guidelines of 10-20 percent of the switching frequency no longer apply at the new higher frequencies. If remote sensing is to be used, a bandwidth of 1-3 kHz for the loop is the maximum realistic range. Higher bandwidths will cause oscillation when the remote sense feature is used, due to additional phase shift through the external circuit (lead inductance and load capacitance) independent of internal topology or operating frequency. If local sense is used, some of the higher- frequency supplies can achieve bandwidths of up to 20 kHz unless the customer adds additional filter capacitance to the output. Additional filter capacitance can dramatically reduce loop bandwidth, since the internal filter capacitor in many new designs is only a few microfarads. It is not unusual for the customer to parallel those few microfarads with a few thousand microfarads externally, reducing the output filter corner frequency, loop gain, and crossover frequency.
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Summary
Many stability and performance problems in the application of power supplies can be avoided by specifying gain and phase margins of the various loops. Test equipment is now available which performs this type of testing quickly and easily. This new equipment makes it feasible to test stability margins at all conditions of line, load, and temperature. In addition, margins can be tested with various external influences simulated, such as remote sensing and/or additional output filter capacitance. Bode plot testing in production quickly identifies "out-of-family" units that do not match production performance, indicating the presence of components which are wrong or damaged. By placing reasonable values for nominal or worst-case stability margins in procurement specifications, the knowledgeable buyer can avoid field failures or application problems when power supplies are mated to using equipment.
References
1.Nyquist, H., "Regeneration Theory," Bell Systems Tech J., vol II, pp. 126-147, 1932. 2.Tuttle, Wayne H., "Why Conditionally Stable Systems do not Oscillate," Proceedings of PCI '85, pp. 384-389. 3.Venable, H. Dean, "Testing Power Sources for Stability," Proceedings of the 1984 Power Sources Conference, pp. S12/1-1:14. 4.Venable, H. Dean, "Integrated Frequency Response Modeling and Measurement System with File Math," Proceedings of the 1985 Power Electronic Design Conference, pp. 195- 202.
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