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RTL8762CMF

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RTL8752CMF

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BLUETOOTH LOW ENERGY SOC
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PRELIMINARY DATASHEET
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(CONFIDENTIAL: Development Partners Only)

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Rev. 0.72
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14 July 2020
Track ID: JATR-8275-15
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Realtek Semiconductor Corp.

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No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com
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 RTL8762CMF/RTL8752CMF
Datasheet

COPYRIGHT
©2018 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced,
transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any
means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER
Realtek provides this document ‘as is’, without warranty of any kind. Realtek may make improvements
and/or changes in this document or in the product described in this document at any time. This document
could include technical inaccuracies or typographical errors.

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TRADEMARKS

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Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are
trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT

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This document is intended for the software engineer’s reference and provides detailed programming

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information.
Though every effort has been made to ensure that this document is current and accurate, more information

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may have become available subsequent to the production of this guide.
ELECTROSTATIC DISCHARGE (ESD) WARNING
This product can be damaged by Electrostatic Discharge (ESD). When handling, care must be taken.
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Damage due to inappropriate handling is not covered by warranty.
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Do not open the protective conductive packaging until you have read the following, and are at an approved
anti-static workstation.
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Use an approved anti-static mat to cover your work surface

? Use a conductive wrist strap attached to a good earth ground
? Always discharge yourself by touching a grounded bare metal surface or approved anti-static mat
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before picking up an ESD-sensitive electronic component

? If working on a prototyping board, use a soldering iron or station that is marked as ESD-safe
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? Always disconnect the microcontroller from the prototyping board when it is being worked on
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REVISION HISTORY
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Revision Release Date Summary

0.7 2018/07/16 Preliminary release.
0.71 2018/11/28 Added RTL8752CMF data.
Corrected minor typing errors.
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0.72 2020/07/14 Modified some information descriptions.

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Table of Contents
1. GENERAL DESCRIPTION ................................................................................................................................................1
1.1. OVERVIEW ......................................................................................................................................................................1
1.2. MCU PLATFORM .............................................................................................................................................................1
1.3. RTL8762CMF/RTL8752CMF MEMORY ARCHITECTURE ..............................................................................................2
2. FEATURES ...........................................................................................................................................................................3
3. APPLICATIONS ..................................................................................................................................................................4

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4. BLOCK DIAGRAMS ..........................................................................................................................................................5
5. PIN ASSIGNMENTS ...........................................................................................................................................................6

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5.1. RTL8762CMF PIN ASSIGNMENTS ..................................................................................................................................6
5.2. PACKAGE IDENTIFICATION ..............................................................................................................................................6
5.3. RTL8752CMF PIN ASSIGNMENTS ..................................................................................................................................7
5.4. PACKAGE IDENTIFICATION ..............................................................................................................................................7

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6. PIN DESCRIPTIONS ..........................................................................................................................................................8

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6.1. RF INTERFACE.................................................................................................................................................................8
6.2. XTAL AND SYSTEM INTERFACE .....................................................................................................................................8
6.3. GENERAL PURPOSE IOS...................................................................................................................................................8

7.
6.4.
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POWER PINS ..................................................................................................................................................................11
BLUETOOTH RADIO ......................................................................................................................................................12
7.1. RF TRANSCEIVER ..........................................................................................................................................................12
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7.2. MODEM .........................................................................................................................................................................12
7.3. TRANSMITTER ...............................................................................................................................................................12
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7.4. FRONT-END ...................................................................................................................................................................12

8. CLOCK MANAGEMENT ................................................................................................................................................13
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8.1. 40MHZ XTAL OSCILLATOR .........................................................................................................................................13

8.2. 32KHZ/32.768 KHZ XTAL OSCILLATOR .......................................................................................................................14
8.3. INTERNAL 32KHZ RC OSCILLATOR ...............................................................................................................................15
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9. POWER MANAGEMENT UNIT (PMU) ........................................................................................................................16

10. PERIPHERAL INTERFACE DESCRIPTIONS .........................................................................................................16
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10.1. PIN MULTIPLEXER .....................................................................................................................................................17

10.2. REAL-T IME COUNTER (RTC) ....................................................................................................................................19
10.3. PWM/HARDWARE TIMER (TIM)...............................................................................................................................20
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10.4. GPIO CONTROL ........................................................................................................................................................21

10.5. HARDWARE KEY SCAN .............................................................................................................................................21
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10.6. IR CONTROLLER ........................................................................................................................................................22

10.7. SPI ............................................................................................................................................................................23
10.8. I2C ............................................................................................................................................................................23
10.9. UART .......................................................................................................................................................................24
10.10. DIRECT MEMORY ACCESS CONTROLLER (DMA) ......................................................................................................25
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10.11. AUXADC .................................................................................................................................................................25

11. ELECTRICAL AND THERMAL CHARACTERISTICS .........................................................................................26
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11.1. TEMPERATURE LIMIT RATINGS .................................................................................................................................26

11.2. POWER SUPPLY DC CHARACTERISTICS .....................................................................................................................26
11.3. INTERNAL LDO CHARACTERISTICS...........................................................................................................................26
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11.4. RTX LDO CHARACTERISTICS ...................................................................................................................................27
11.5. SYNTHESIZER LDO CHARACTERISTICS .....................................................................................................................27
11.6. ESD CHARACTERISTICS ............................................................................................................................................27
11.7. AUXADC CHARACTERISTICS ...................................................................................................................................28
11.8. RADIO CHARACTERISTICS .........................................................................................................................................28
11.9. DIGITAL IO PIN DC CHARACTERISTICS.....................................................................................................................30
11.10. BOOT SEQUENCE .......................................................................................................................................................31
11.11. UART CHARACTERISTICS .........................................................................................................................................32
11.12. I2C TIMING CHARACTERISTICS .................................................................................................................................33
11.13. POWER CONSUMPTION ..............................................................................................................................................34
11.13.1. Low Power Mode ..............................................................................................................................................34

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11.13.2. Active Mode ......................................................................................................................................................34
12. MECHANICAL DIMENSIONS ...................................................................................................................................35

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12.1. PLASTIC QUAD FLAT NO-LEAD PACKAGE 40 LEADS 5X5MM OUTLINE ....................................................................35
12.2. MECHANICAL DIMENSIONS NOTES ...........................................................................................................................35
13. REFLOW PROFILE......................................................................................................................................................36

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14. ORDERING INFORMATION .....................................................................................................................................37

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List of Tables
TABLE 1. RF INTERFACE................................................................................................................................................................8
TABLE 2. XTAL AND SYSTEM INTERFACE ....................................................................................................................................8
TABLE 3. GENERAL PURPOSE IOS..................................................................................................................................................8
TABLE 4. POWER PINS .................................................................................................................................................................11
TABLE 5. 40MHZ XTAL SPECIFICATION.....................................................................................................................................14
TABLE 6. 32KHZ XTAL SPECIFICATION ......................................................................................................................................15
TABLE 7. PERIPHERAL INTERFACE DESCRIPTIONS .......................................................................................................................16
TABLE 8. PIN MULTIPLEXER (PINMUX) .....................................................................................................................................17

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TABLE 9. HARDWARE TIMER (BASE ADDRESS: 0X4000_2000) ...................................................................................................20
TABLE 10. GPIO MAPPING TABLE ................................................................................................................................................21

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TABLE 11. UART BAUDRATE.......................................................................................................................................................24
TABLE 12. TEMPERATURE LIMIT RATINGS ....................................................................................................................................26
TABLE 13. POWER SUPPLY DC CHARACTERISTICS .......................................................................................................................26
TABLE 14. INTERNAL LDO CHARACTERISTICS (ONLY RTL8752CMF) ........................................................................................26

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TABLE 15. SWITCHING REGULATOR CHARACTERISTICS (ONLY RTL8762CMF)...........................................................................26
TABLE 16. RTX LDO CHARACTERISTICS .....................................................................................................................................27

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TABLE 17. SYNTHESIZER LDO CHARACTERISTICS........................................................................................................................27
TABLE 18. ESD CHARACTERISTICS ...............................................................................................................................................27
TABLE 19. AUXADC CHARACTERISTICS .....................................................................................................................................28
TABLE 20. GENERAL RADIO CHARACTERISTICS ...........................................................................................................................28

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TABLE 21. RX PERFORMANCE ......................................................................................................................................................28
TABLE 22. TX PERFORMANCE.......................................................................................................................................................29
TABLE 23. DIGITAL IO PIN DC CHARACTERISTICS .......................................................................................................................30
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TABLE 24. UART TIMING CHARACTERISTICS ...............................................................................................................................32
TABLE 25. I2C TIMING CHARACTERISTICS....................................................................................................................................33
TABLE 26. LOW POWER MODE......................................................................................................................................................34
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TABLE 27. ACTIVE MODE (RTL8762CMF WITH SWITCHING REGULATOR) .................................................................................34

TABLE 28. REFLOW PROFILE .........................................................................................................................................................36
TABLE 29. ORDERING INFORMATION ............................................................................................................................................37
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List of Figures
FIGURE 1. RTL8762CMF/RTL8752CMF MEMORY ARCHITECTURE............................................................................................2
FIGURE 2. BLOCK DIAGRAM ..........................................................................................................................................................5
FIGURE 3. POWER BLOCK DIAGRAM..............................................................................................................................................5
FIGURE 4. RTL8762CMF PIN ASSIGNMENTS ................................................................................................................................6
FIGURE 5. RTL8752CMF PIN ASSIGNMENTS ................................................................................................................................7
FIGURE 6. RF TRANSCEIVER BLOCK DIAGRAM ...........................................................................................................................12
FIGURE 7. 40MHZ CRYSTAL OSCILLATION SCHEMATIC ..............................................................................................................13
FIGURE 8. 32KHZ CRYSTAL OSCILLATOR SCHEMATIC ................................................................................................................14

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FIGURE 9. PINMUX AND GPIO PADS CONTROL PATH ..............................................................................................................18
FIGURE 10. RTC BLOCK DIAGRAM ...............................................................................................................................................19

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FIGURE 11. UART WAVEFORM ....................................................................................................................................................24
FIGURE 12. AUXADC FUNCTIONAL BLOCK .................................................................................................................................25
FIGURE 13. BOOT UP BY INTERNAL POWER ON RESET CIRCUIT...................................................................................................31
FIGURE 14. BOOT UP BY HW_RST_N PIN ...................................................................................................................................31

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FIGURE 15. UART CHARACTERISTICS ..........................................................................................................................................32
FIGURE 16. I2C INTERFACE TIMING DIAGRAM..............................................................................................................................33

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FIGURE 17. PLASTIC QUAD FLAT NO-LEAD PACKAGE 40 LEADS 5X5MM OUTLINE ......................................................................35

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1. General Description
1.1. Overview
The RTL8762CMF/RTL8752CMF is an ultra-low-power system on-chip solution for Bluetooth 5 low
energy applications that combines the excellent performance of a leading RF transceiver with a low-power
ARM Cortex-M4F and rich powerful supporting features and peripherals.
The RTL8762CMF/RTL8752CMF embeds an IR transceiver and hardware key-scan on a single IC, and is
provided in a QFN package.

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1.2. MCU Platform
The embedded ARM Cortex-M4F 32-bit CPU features a 16-bit instruction set with 32-bit extensions

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(Thumb-2® technology) that delivers high-density code with a small memory footprint. By using a

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single-cycle 32-bit multiplier, a 3-stage pipeline, and a Nested Vector Interrupt Controller (NVIC), the
ARMCortex-M4F makes program execution simple and highly efficient.
Serial Wire Debug (SWD) interface provided as part of the Debug Access Port (DAP), in conjunction with

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the Basic Branch Buffer (BBB). This offers a flexible and powerful mechanism for non-intrusive program
code debugging. Developers can easily add breakpoints in the code and perform single-step debugging.
The RTL8762CMF/RTL8752CMF memory architecture includes ROM, 160kByte RAM and 8MByte
or
Flash Address Space.
The 160kByte RAM consists of RAM1 (112kByte Data RAM), RAM2 (8kByte Cache Shared RAM),
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RAM3 (8kByte Cache Shared RAM), and RAM4 (32kByte Buffer RAM). All the RAM regions can be
used to execute code and hold data.
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Flash Address Space is a virtual space that is mapped to external Flash to extend the code space in XIP
(eXecute In Place) mode.
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1.3. RTL8762CMF/RTL8752CMF Memory Architecture

Flash Address Space
(8MByte)
0x00800000

RAM4 (32kByte)

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0x00280000

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RAM3 (8kByte)

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RAM2 (8kByte)

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0x0021C000
RAM1 (112kByte)
0x00200000
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ROM
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0x00000000
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Figure 1. RTL8762CMF/RTL8752CMF Memory Architecture

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2. Features
General n Serial flash controller (One and Dual-bits
mode) with 16kB 4-way cache.
n Ultra-low power consumption with
intelligent PMU n Total 160kB SRAM
n Supports Bluetooth 5 core specification n 4Kbits eFUSE for manufacturer use

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n Supports 2Mbps LE (only RTL8762CMF) n Supports AES128/192/256 encrypt/decrypt
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n LE advertising Extensions(only
RTL8762CMF) n Embedded 4Mbits flash
n LE Long Range (only RTL8762CMF)

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n Bluetooth Transceiver

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n Additional Adv channel n RX sensitivity: -97dBm BLE(min)
n Channel Selection #2 n Max TX power: 8dBm
n High Duty Cycle Non-Connectable Adv n Fa
Fast AGC control to improve receiving
dynamic range
n Integrated MCU to execute Bluetooth
or
protocol stack n Supports Bluetooth Low Energy PHY
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n Supports multiple level Low Energy states Peripheral Interfaces

n Supports LE L2CAP Connection Oriented n 26 (max) Flexible General Purpose IOs

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Channel Support
n Hardware Keyscan
n Supports LE low duty directed advertising
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n Embedded IR transceiver
n Supports LE data length extension feature
n Real-Time Counters (RTC)
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n Supports OTA (Over-the-Air) programming

mechanism for firmware upgrade n Supports generic 4-wire SPI master/slave
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(RTL8762CMF: Max SPI clock is 20MHz,

n Supports GAP, ATT/GATT, SMP, L2CAP RTL8752CMF: Max SPI clock is 10MHz)
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n Generic Applications for GAP Central, n Supports 8 channel Low power comparators
Peripheral, Observer and Broadcaster Roles
n 400ksps, 12bit, 4channel AUXADC
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Platform
n Timers x 8
n ARM Cortex-M4 with floating-point unit
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(RTL8762CMF: Maximum 40MHz, n I2C x 2

RTL8752CMF: Maximum 20MHz)
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Datasheet
n UART x 2 n Supports embedded internal 32K RCOSC to
keep BLE link (in limited condition)
n Supports external 40MHz XTAL without
capacitor (in limited condition) n Embedded Switching Regulator for low
current consumption (only RTL8762CMF)
n Supports external 32.768kHz XTAL without
capacitor (in limited condition) Package

n 40-pin 5x5mm QFN

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3. Applications

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n MESH LED

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4. Block Diagrams
RTL8762C
32kHz RC
VBAT PMU
OSC
VDDIO ARM SPI flash
HVD controller
LDO/ CM4
*Switching
LX regulator
ROM

OCP Bus
VDDCORE

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RAM
VDIGI Modem
RF
RFIO

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Retention tranceiver
VD12_PA RAM LE
VD12_RTX
VD12_SYN
APB APB

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XO 40MHz
XI Crystal OSC

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Log UART

UART x2
keyscan
comparator
Low power
AUXADC

Timers
GPIOs

I2C x2

IR RC
SPI x2
32K_XO
32K_XI
32kHz
Crystal OSC

IO PINMUX
Fa Pm_n
m=0,1..4
n=0,1..7
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Note: Switching regulator is only in RTL8762CMF
Figure 2. Block Diagram
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Figure 3. Power Block Diagram

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5. Pin Assignments
5.1. RTL8762CMF Pin Assignments

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Figure 4. RTL8762CMF Pin Assignments

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5.2. Package Identification

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Green package is indicated by the ‘G’ in GXXXV (Figure 4).

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5.3. RTL8752CMF Pin Assignments

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Figure 5. RTL8752CMF Pin Assignments

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5.4. Package Identification

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Green package is indicated by the ‘G’ in GXXXV (Figure 5).

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6. Pin Descriptions
The following signal type codes are used in the tables. The pin assignment of RTL8762CMF and
RTL8752CMF are identical.

I: Input O: Output

P: Power A: Analog

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6.1. RF Interface

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Table 1. RF Interface
Symbol Type Pin Description

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RFIO A 9 BT RX /BT TX interface

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6.2. XTAL and System Interface
Symbol
32K_XI
Type
A/IO
Pin
37
Description Fa
Table 2. XTAL and System Interface

32k crystal input or external 32k clock input

or
(optional)
Pin share as GPIO when external 32k is not used.
32K_XO A/IO 38 32k crystal output (optional)
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Pin share as GPIO when external 32k is not used.

XI A 12 40MHz crystal input
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XO A 13 40MHz crystal output or external 40MHz clock

input
HW_RST_N I 14 Hardware reset pin; low active
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6.3. General Purpose IOs

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Table 3. General Purpose IOs

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Symbol Type Pin Description

P0_0 IO 26 General purpose IO; refer to Table 8 Pin Multiplexer
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(PINMUX), page 17.

8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
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P0_1 IO 25 General purpose IO; refer to Table 8 Pin Multiplexer

(PINMUX), page 17.
8mA driving capability.
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With wakeup function.

With internal strong/weak pull-up and pull-down.
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Symbol Type Pin Description
P0_2 IO 24 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
P0_3 IO 23 LOG_UART TX.
Power on trap: Pull-up for normal operation
Pull-down to bypass executing program code in flash
(PAD internal pull-up by default).

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P0_4 IO 22 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17..

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8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
P0_5 IO 20 General purpose IO; refer to Table 8 Pin Multiplexer

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(PINMUX), page 17..

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8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
P0_6 IO 19 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17..
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8mA driving capability.
With wakeup function.
or
With internal strong/weak pull-up and pull-down.
P1_0 IO 27 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
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8mA driving capability.

With wakeup function.
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With internal strong/weak pull-up and pull-down.

SWDIO (default).
P1_1 IO 28 General purpose IO; refer to Table 8 Pin Multiplexer
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(PINMUX), page 17.

8mA driving capability.
With wakeup function.
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With internal strong/weak pull-up and pull-down.

SWDCLK (default).
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P2_2 IO 40 General purpose IO; refer to Table 8 Pin Multiplexer

(PINMUX), page 17.
8mA driving capability.
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With wakeup function.

With internal strong/weak pull-up and pull-down.
AUXADC input 2.
P2_3 IO 1 General purpose IO; refer to Table 8 Pin Multiplexer
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(PINMUX), page 17.

8mA driving capability.
With wakeup function.
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With internal strong/weak pull-up and pull-down.

AUXADC input 3.
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Symbol Type Pin Description
P2_4 IO 2 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
AUXADC input 4.
P2_5 IO 3 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.

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With wakeup function.
With internal strong/weak pull-up and pull-down.

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AUXADC input 5.
P2_6 IO 4 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.

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With wakeup function.
With internal strong/weak pull-up and pull-down.

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AUXADC input 6.
P2_7 IO 5 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.

Fa
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
or
AUXADC input 7.
P3_0 IO 36 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
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8mA driving capability.

With wakeup function.
With internal strong/weak pull-up and pull-down.
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HCI_UART_TX (default).
P3_1 IO 35 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
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8mA driving capability.

With wakeup function.
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With internal strong/weak pull-up and pull-down.

HCI_UART_RX (default).
P3_2 IO 34 General purpose IO; refer to Table 8 Pin Multiplexer
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(PINMUX), page 17.

8mA driving capability.
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With wakeup function.

With internal strong/weak pull-up and pull-down.
P3_3 IO 33 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
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8mA driving capability.

With wakeup function.
With internal strong/weak pull-up and pull-down.
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Symbol Type Pin Description
P4_0 IO 18 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
P4_1 IO 17 General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.
With wakeup function.

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With internal strong/weak pull-up and pull-down.
P4_2 IO 16 General purpose IO; refer to Table 8 Pin Multiplexer

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(PINMUX), page 17.
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.

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P4_3 IO 15 General purpose IO; refer to Table 8 Pin Multiplexer

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(PINMUX), page 17.
8mA driving capability.
With wakeup function.
With internal strong/weak pull-up and pull-down.
P5_0 IO 6
Fa
General purpose IO; refer to Table 8 Pin Multiplexer
(PINMUX), page 17.
8mA driving capability.
or
With wakeup function.
With internal strong/weak pull-up and pull-down.
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6.4. Power Pins

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Table 4. Power Pins

Symbol Type Pin Description
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VA18 P 7 ADC reference voltage (decouple)

VD12_PA P 10 Supply 1.2V power for PA
VD12_TRX P 8 Supply 1.2V power for RF transceiver
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VD12_SYN P 11 Supply 1.2V power for synthesizer

VDDIO P 21 Supply 1.8V~3.3V power for digital IO PADs
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VDDCORE P 30 Supply 1.2V power to LDO for digital core

VDIGI P 29 1.1V digital power decouple.
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HVD P 32 Supply 1.8V~3.3V power for Switching regulator input

LX P 31 Switching regulator output
VBAT P 39 Battery voltage input
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7. Bluetooth Radio
7.1. RF Transceiver
The RTL8762CMF/RTL8752CMF includes an embedded GFSK RF transceiver with ultra-low power
consumption and full compliance with the Bluetooth low energy wireless system. The block diagram is
shown in Figure 6.

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Figure 6. RF Transceiver Block Diagram

7.2. Modem
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or
In the transmit path, the modem combines with the RF transmitter to generate a GFSK signal. In the
receiver path, the modem receives a baseband GFSK signal from an analog to digital converter (ADC), and
lF

decodes the bit data via channel filtering, synchronizing, and demodulating.
An RF automatic calibration scheme is implemented in the modem to compensate for transistor
tia

characteristic variations in the CMOS process, and for ambient temperature differences.
en

7.3. Transmitter
The transmitter convert baseband signals to 2.4GHz unlicensed Industrial, Scientific and Medical (ISM)
id

band GFSK modulated signals. The up-converted GFSK signal is amplified by the integrated power
amplifier.
nf
Co

7.4. Front-End
To minimize external BOM requirements, the RTL8762CMF/RTL8752CMF is single-ended RF mode and
ek

TX/RX path sharing the same RFIO pin with an integrated balun. For antenna matching and harmonic
signal reduction, a PI matching network is required in the RF path.
alt
Re

Bluetooth Low Energy SOC 12 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

8. Clock Management
For optimal power consumption and performance, the RTL8762CMF/RTL8752CMF offers high and low
frequency clocks. The high frequency clock is generated by an external 40MHz crystal oscillator (XTAL).
The low frequency clock is generated by a 32.768kHz/32kHz XTAL.
In normal mode the high frequency clock is kept running to provide clock to the CPU, Bluetooth core, and
the peripheral block. In low power mode the high frequency clock is turned off for power saving. The
32.768kHz/32kHz kHz low frequency clock remains on to provide clock to the RTC (Real Time Counter),
BT core, and PMU.

ly
on
8.1. 40MHz XTAL Oscillator
The RTL8762CMF/RTL8752CMF has a built-in 40MHz crystal oscillation circuit to provide a stable,

n
controllable system clock. With the help of the internal built-in capacitor, the clock offset could be
fine-tuned in the mass production process. The maximum internal cap is 20pF typically, and it is suggested

lco
to follow Realtek crystal design specification and QVL, the external capacitor, C1 and C2, could be replaced
by an internal capacitor, reducing the BOM cost, minimizing the PCB dimensions, and adding flexibility
for clock fine tuning.
Fa
or
lF
tia
en
id

Figure 7. 40MHz Crystal Oscillation Schematic

nf

Example:
Co

For a crystal with spec CL=9pF

CL= [ (C1 X C2) / (C1+C2) ] + ( Cint / 2 ) + Cparasitic, the parasitic capacitor Cparasitic could be observed on the
PCB trace and IC SMT soldering pad….etc.
ek

With the rule of thumb, ‘C1 + Cint’ is typical to be 12~15pF, hence the external capacitor C1 and C2 is
alt

possible to be replaced by the internal capacitor Cint, which could be 20pF at the maximum setting to over
the need of external capacitors.
Re

Bluetooth Low Energy SOC 13 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet
Table 5. 40MHz XTAL Specification
Parameter Minimum Typical Maximum
Frequency (MHz) - 40 -
Frequency tolerance (ppm) - - ±10
Frequency stability (ppm) - - ±10
Load capacitance (pF) 7 9 -
Maximum Drive Level 300 - -
(µW)
Equivalent Series - - 50Ω@7pF
Resistance (Ohm) 40Ω@9pF

ly
Insulation Resistance 500 - -
(MOhm)

on
8.2. 32kHz/32.768kHz XTAL Oscillator

n
The RTL8762CMF/RTL8752CMF uses a 32kHz/32.768kHz XTAL oscillator as a sleep clock in low

lco
power mode. The block diagram of the XTAL Oscillator is shown in Figure 8. The 32kHz/32.768kHz
XTAL specification is shown in Table 6, page 15.
There is a fixed 7pF capacitor (Cx) and a trimming capacitor (Cxi/Cxo) with a value from 0pF to 12.8pF in
Fa
the RTL8762CMF/RTL8752CMF. The embedded Cx, C1 and C2 are not required when a Crystal Load
capacitor (CL) of 7pF is selected. The calculated value of Cxi, Cxo, C1, and C2 is shown in the following
equation:
or
(C1 + Cx + Cxi)(C2 + Cx + Cxo)
CL = +
lF

(C1 + 2Cx + Cxi + C2 + Cxo)

If an external 32k crystal is not used, 32k_XI and 32k XO pins can be configured as GPIO pins.
tia
en
id
nf
Co
ek
alt

Figure 8. 32kHz Crystal Oscillator Schematic

Re

Bluetooth Low Energy SOC 14 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet
Table 6. 32kHz XTAL Specification
Parameter Minimum Typical Maximum
Frequency (kHz) - 32.768 -
32
Frequency tolerance - - ±20
(ppm)
Load capacitance (pF) - 7 -
Maximum Drive Level 0.5 - -
(µW)
Equivalent Series - - 90

ly
Resistance (KOhm)
Insulation Resistance 500 - -

on
(MOhm)

n
8.3. Internal 32kHz RC Oscillator

lco
The RTL8762CMF/RTL8752CMF has a built-in internal 32K RCOSC used as a low speed clock source.
With run-time self-calibration algorithm and limited user environment, temperature variation less than 1?C
per second, the BLE link could be maintained via the internal 32K RC Oscillator.
Fa
or
lF
tia
en
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 15 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

9. Power Management Unit (PMU)

The RTL8762CMF/RTL8752CMF is supplied with 3V by a single power source. For more flexibility of
peripheral usage, IO voltage (VDDIO) can be different from VBAT (but VDDIO should be less than or
equal to VBAT). There is an internal LDO regulator to provide power to the digital core circuit and radio
circuit.
The RTL8762CMF defines three PMU power states for various conditions.
Active Mode: All clock and power is turned on. All functions operate in this mode.

ly
Deep LPS Mode: High-speed clock and core domain power is turned off. The CPU stops running. Data can
be retained in retention SRAM.

on
Power Down Mode: Except in an ‘always-on’ power domain, all clock sources and power are turned off.
Power down mode can only be woken by GPIO pins.

n
lco
10. Peripheral Interface Descriptions
The RTL8762CMF/RTL8752CMF series peripheral descriptions are shown in the table below.

0x4000_0000 - 0x4000_0FFF
Fa
Table 7. Peripheral Interface Descriptions
Physical Address IP Function
SYS Control
or
0x4000_1000 - 0x4000_17FF GPIO
0x4000_2000 - 0x4000_2FFF Timer
lF

0x4000_3000 - 0x4000_37FF IR RC
0x4000_4000 - 0x4000_47FF 2-Wire SPI
0x4000_5000 - 0x4000_57FF Key Scan
tia

0x4001_0000 - 0x4001_0FFF AUXADC

0x4001_1000 - 0x4001_11FF UART_1
en

0x4001_2000 - 0x4001_23FF UART_0

0x4001_3000 - 0x4001_33FF SPI_0
id

0x4001_3400 - 0x4001_37FF SPI_1

0x4001_4000 - 0x4001_4FFF AES Engine
nf

0x4001_5000 - 0x4001_53FF I2C_0

0x4001_5400 - 0x4001_57FF I2C_1
Co

0x4002_0000 - 0x4002_0FFF I2S_0

0x4002_1000 - 0x4002_1FFF I2S_1
0x4002_4000-0x4002_43FF UART_2
ek

0x4002_4800-0x4002_4BFF Reserved
alt
Re

Bluetooth Low Energy SOC 16 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.1. Pin Multiplexer

All GPIO pins in the RTL8762CMF/RTL8752CMF are configurable via the built-in pin multiplexer
(PINMUX). Table 8 shows all GPIO pin configurations. Figure 9, page 18 shows the PINMUX and GPIO
PADs control path. In the RTL8762CMF/RTL8752CMF, all pins have an internal pull-up and pull-down
resistor for controlling GPIO_PU and GPIO_PD.
Table 8. Pin Multiplexer (PINMUX)
0 IDEL 25 reserved 50 SPI0_CLK (master only) 75 KEY_COL_17
1 reserved 26 reserved 51 SPI0_MO (master only) 76 KEY_COL_18

ly
2 reserved 27 UART2_TX 52 SPI0_MI (master only) 77 KEY_COL_19

on
SPI2W_DATA (master
3 reserved 28 UART2_RX 53 78 KEY_ROW_0
only)
4 reserved 29 UART1_TX 54 SPI2W_CLK (master only) 79 KEY_ROW_1

n
5 I2C0_CLK 30 UART1_RX 55 SPI2W_CS (master only) 80 KEY_ROW_2

lco
6 I2C0_DAT 31 UART1_CTS 56 reserved 81 KEY_ROW_3
7 I2C1_CLK 32 UART1_RTS 57 reserved 82 KEY_ROW_4
8 I2C1_DAT 33 IRDA_TX 58 KEY_COL_0 83 KEY_ROW_5
9
10
PWM2_P
PWM2_N
34
35
IRDA_RX
UART0_TX
59
60
Fa
KEY_COL_1
KEY_COL_2
84
85
KEY_ROW_6
KEY_ROW_7
or
11 PWM3_P 36 UART0_RX 61 KEY_COL_3 86 KEY_ROW_8
12 PWM3_N 37 UART0_CTS 62 KEY_COL_4 87 KEY_ROW_9
lF

13 PWM0 38 UART0_RTS 63 KEY_COL_5 88 KEY_ROW_10

14 PWM1 39 SPI1_SS_N_0 (master only) 64 KEY_COL_6 89 KEY_ROW_11
tia

15 PWM2 40 SPI1_SS_N_1 (master only) 65 KEY_COL_7 90 DWGPIO

16 PWM3 41 SPI1_SS_N_2 (master only) 66 KEY_COL_8 - -
en

17 PWM4 42 SPI1_CLK (master only) 67 KEY_COL_9 - -

18 PWM5 43 SPI1_MO (master only) 68 KEY_COL_10 - -
id

19 PWM6 44 SPI1_MI (master only) 69 KEY_COL_11 - -

20 PWM7 45 SPI0_SS_N_0 (slave) 70 KEY_COL_12 - -
nf

21 reserved 46 SPI0_CLK (slave) 71 KEY_COL_13 - -

22 reserved 47 SPI0_SO (slave) 72 KEY_COL_14 - -
Co

23 reserved 48 SPI0_SI (slave) 73 KEY_COL_15 - -

24 reserved 49 SPI0_SS_N_0 (master only) 74 KEY_COL_16 - -
ek
alt
Re

Bluetooth Low Energy SOC 17 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

ly
on
n
lco
Fa
Figure 9. PINMUX and GPIO PADs Control Path
or
lF
tia
en
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 18 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.2. Real-Time Counter (RTC)

There are 24-bit counters with four individual comparators. The counter is clocked by an internal 32k
RCOSC/external 32k XTAL with 12-bit pre-scalar. The comparators output can interrupt the CPU and
wake up the chip from DLPS mode. The RTC block diagram is shown below.
Features:
? 12-bits pre-scale counter
? 24-bits read only RTC counter

ly
? Internal 32k RCOSC/external 32k XTAL clock resource
? 4 independent comparators (with interrupt)

on
? 1 tick interrupt
? RTC counter overflow interrupt

n
lco
Fa
or
lF
tia
en
id
nf
Co

Figure 10. RTC Block Diagram

ek
alt
Re

Bluetooth Low Energy SOC 19 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.3. PW M/Hardware Timer (TIM)

The RTL8762CMF/RTL8752CMF supports eight PWM/TIM modules.
Timer/PWM features:
? 8 independent Timers (2 Timers are dedicated for Internal use)
? Independent input clock divider 1/2 1/4, 1/8,1/16, 1/40 (on all Timers)
? 3 mode (free run/user define/PWM)
? 32bits counter

ly
? Complementary PWM output & Dead zone (only Timer2, Timer3)

on
? PWM output state read back (<100kHz)
Table 9. Hardware Timer (Base Address: 0x4000_2000)
Address Range (Base +) Function

n
0x00 to 0x10 Timer 0 Registers

lco
0x14 to 0x24 Timer 1 Registers
0x28 to 0x38 Timer 2 Registers
0x3c to 0x4c Timer 3 Registers
0x50 to 0x60
0x64 to 0x74
0x78 to 0x88
Fa
Timer 4 Registers
Timer 5 Registers
Timer 6 Registers
0x8c to 0x9c Timer 7 Registers
or
0xb0 to 0xcc TimerNLoadCount2 Registers
lF
tia
en
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 20 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.4. GPIO Control

The RTL8762CMF provides a highly flexible GPIO module for developers. There are 32 GPIOs assigned
to IO PADs. The mapping table is shown in Table 10. GPIO function could be assigned to the IO PAD via
the pin mux register.
Features:
? 32 GPIOs
? Input/output function

ly
? 32 Independence interrupts
? 3 interrupt trigger conditions (level/edge/dual-edge)

on
? Hardware interrupt de-bounce
Table 10. GPIO Mapping Table

n
Pin DWGPIO Pin DWGPIO Pin DWGPIO Pin DWGPIO Pin DWGPIO
Name Name Name Name Name

lco
P0_0 GPIO[0] P1_0 GPIO[8] P2_0 GPIO[16] P3_0 GPIO[24] P5_0 GPIO[25]
P0_1 GPIO[1] P1_1 GPIO[9] P2_1 GPIO[17] P3_1 GPIO[25] 32k_XI GPIO[26]
P0_2
P0_3
P0_4
GPIO[2]
GPIO[3]
GPIO[4]
P1_2
P1_3
P1_4
GPIO[10]
GPIO[11]
GPIO[12]
P2_2
P2_3
P2_4
GPIO[18]
GPIO[19]
GPIO[20]
Fa
P3_2
P3_3
P3_4
GPIO[26]
GPIO[27]
GPIO[28]
32k_XO
P4_0
P4_1
GPIO[27]
GPIO[28]
GPIO[29]
or
P0_5 GPIO[5] P1_5 GPIO[13] P2_5 GPIO[21] P3_5 GPIO[29] P4_2 GPIO[30]
P0_6 GPIO[6] P1_6 GPIO[14] P2_6 GPIO[22] P3_6 GPIO[30] P4_3 GPIO[31]
lF

P0_7 GPIO[7] P1_7 GPIO[15] P2_7 GPIO[23] - - - -

tia

10.5. Hardware K ey Scan

en

The RTL8762CMF supports a Configurable 12 rows * 20 columns key matrix with key scan engine. Each
IO PAD could be configured as any row or column pin of Key Scan to reduce complexity of PCB routing.
id

Features:
? Configurable matrix; max matrix (12 row * 20column)
nf

? Configurable matrix scan clock

Co

? Configurable de-bounce time

? Configurable scan interval
? Configurable all-key release detect time
ek

? 26 depth Key FIFO

? Key filter (one key)
alt
Re

Bluetooth Low Energy SOC 21 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.6. IR Controller
The IR module provides a flexible way of transmitting and receiving IR code used in remote controls. It can
send an IR waveform within an IR carrier, and receive an IR waveform within an IR carrier.
IR Transmitter Feature
? Programmable IR carrier (10kHz~60kHz)
? Programmable IR carrier duty
? Programmable IR carrier cycle number

ly
? Hardware output waveform control

on
? TX FIFO Depth: 32
IR Receiver Feature
? Programmable sample clock (max clock 40MHz)

n
? Ability to learn IR waveform directly (carrier frequency = < 60kHz)

lco
? Automatic/manual trigger mode
? Hardware waveform sample (not interfered with by software tasks)
? RX FIFO Depth: 32
Fa
or
lF
tia
en
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 22 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.7. SPI
There are two individual SPI interfaces in the RTL8762CMF/RTL8752CMF. SPI0 supports master and
slave mode. SPI1 supports master mode only.
SPI0 Features
? Master & slave mode
? Supports Clock Mode 0~3 (CPOL, CPHA)
? 4 transmit mode: TX only, RX only, Full-duplex, EEPROM

ly
? 2*n SPI CLK Divider (RTL8762CMF: Max. 20MHz & RTL8752CMF: Max. 10MHz)

on
? Supports 4-32bits SPI data frame ( master)
? Supports 4-16bits SPI data frame (slave)
? 1 Hardware CS (master)

n
? 32bits FIFO; 36 depth (master)

lco
? 16bits FIFO; 64 depth (slave)
? DMA transfer supported
SPI1 Features
? Master mode
? Support Clock Mode 0~3 (CPOL, CPHA)
Fa
or
? 4 transmit mode: TX only, RX only, Full-duplex, EEPROM
? 2*n SPI CLK Divider (Max. 20MHz)
lF

? Supports 4-32bits SPI data frame (master)

? 3 Hardware CS (master)
tia

? 32bits FIFO; 36 depth (master)

? DMA transfer supported
en

10.8. I2C
id

There are two separate I2C interfaces in the RTL8762CMF/RTL8752CMF. Each I2C interface is
comprised of Serial Data Line (SDA) and Serial Clock Line (SCL). Both I2C interfaces can be configured
nf

to master or slave mode.

Features:
Co

? Master/Slave mode
? Supports 7/10 bits I2C address
?
ek

Configurable I2C address (slave mode)

? Standard speed (0-100kHz), Fast speed(100kHz~400kHz)
? TX FIFO 8 bits * 24
alt

? RX FIFO 8bits * 40
? DMA supported
Re

Bluetooth Low Energy SOC 23 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.9. UART
There are three hardware UARTs (UART0, UART1, UART2), UART2 dedicated for log output. The
UARTs have the same hardware features.
The RTL8762CMF/RTL8752CMF provides multiple UART baud-rate configured by register setting. The
common band-rate example is shown in Table 11 below. The UART clock error between two devices
should be less than +-2.5%.
? Supports 7/8 Data Format

ly
? 1/2 bit Stop bit
? Configurable parity bit: odd/even

on
? Programmable baud rate (max. baud rate 4,000,000)
? Hardware flow control
? RX line idle state detect

n
? DMA supported

lco
Fa
or
lF
tia

Figure 11. UART Waveform

en

Table 11. UART BaudRate

BaudRate (bps) Error (%) BaudRate (bps) Error (%)
id

1200 -0.23 460800 0.17

9600 <0.01 500000 <0.01
nf

14400 <0.01 921600 0.18

19200 <0.01 1000000 <0.01
Co

28800 <0.01 1382400 0.17

38400 <0.01 1444400 -0.31
57600 <0.01 1500000 <0.01
ek

76800 0.01 1843200 -0.35

115200 <0.01 2000000 0.02
alt

128000 0.02 2764800 0.14

153600 -0.10 3000000 0.06
Re

230400 0.03 4000000 0.03

Bluetooth Low Energy SOC 24 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

10.10. Direct Memory Access Controller (DMA)

DMA Features
? 6 DMA Channels
? Independent interrupts and control bit for every channel
? 4 transfer mode: Memory to memory, memory to peripheral, peripheral to memory, peripheral to
peripheral
? Max block length 4095

ly
? Multi-block supported (Channel 0 & 2)
? Scatter-gather supported (Channel 1 & 3)

on
? Safe abort/abnormal abort/suspend transfer
? Transferred items counter (single block)

n
? Hardware handshake interface for peripheral

lco
10.11. AUXADC
Fa
The RTL8762CMF/RTL8752CMF provides a built in (maximum 8 channels; the maximum number of
ADC channels depends on the package type) 12bits, 400kbps AUXADC for external analog signal sensing
and internal VBAT voltage monitoring. The functional block is shown in Figure 12.
or
? A 12bits, max 400ksps AUXADC with 8 channel sharing
lF

? Flexible sampling schedule table for multi-channel sampling

? Divided mode: Supports 0~VBAT input range with internal resistor divider
tia

? Internal VBAT voltage sensing

? Supports single-ended mode and differential mode
en
id
nf
Co
ek

Figure 12. AUXADC Functional Block

alt
Re

Bluetooth Low Energy SOC 25 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11. Electrical and Thermal Characteristics

11.1. Temperature Limit Ratings
Table 12. Temperature Limit Ratings
Parameter Minimum Maximum Units
Storage Temperature -55 +125 ?C
Ambient Operating Temperature -40 +105 ?C

ly
11.2. Power Supply DC Characteristics

on
Table 13. Power Supply DC Characteristics
Symbol Parameter Minimum Typical Maximum Units

n
Single power source for
VBAT 1.8 3 3.6 V
whole chip

lco
VDD_CORE
VD12_PA 1.2V Core and RFAFE
1.10 1.2 1.26 V
VD12_RTX Supply Voltage
VD12_SYN
VDIGI
VDD_IONote
Digital core voltage
Power for digital IO PADs
0.99
1.8
Fa 1.1
-
1.21
3.6
-
V
or
HVD Power for switching regulator 1.8 - 3.6 V
Note: VDD_IO≤VBAT
lF

11.3. Internal LDO Characteristics

tia

Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C

en

Table 14. Internal LDO Characteristics (only RTL8752CMF)

Parameter Condition Min Typical Max
Input voltage (V) - 2.7 3 3.3
id

Output voltage (V) - - 1.2 -

Only for RTL8752C
Output current (mA) - - 50
nf

internal use
Co

Table 15. Switching Regulator Characteristics (only RTL8762CMF)

Parameter Condition Min Typical Max
Input voltage (V) - 1.8 3 3.6
Output voltage (V) - - 1.2 -
ek

Only for RTL8762C

Output current (mA) - - 50
internal use
alt

Recommended input capacitor (µF) X5R 4.7 - 10

Recommended output capacitor (µF) X5R - 4.7 -
1. Power inductor
Re

Recommended output inductor ( µH) - 2.2 -

2. +-20%

Bluetooth Low Energy SOC 26 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.4. RTX LDO Characteristics

Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C
Table 16. RTX LDO Characteristics
Parameter Condition Min Typical Max
Input voltage (V) - 1.1 - 1.26
Output voltage (V) - - 1 -
Output voltage accuracy (%) - -5 - 5

ly
Output current (mA) Only for internal use - - 6

Quiescent current (µA) - - 40

on
PSRR At 1kHz tone, vin= 1.2V 30 40 50

n
11.5. Synthesizer LDO Characteristics

lco
Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C
Table 17. Synthesizer LDO Characteristics
Parameter
Input voltage (V)
Output voltage (V)
Condition
-
-
Fa
Min
1.1
-
Typical
-
1
Max
1.26
-
or
Output voltage accuracy (%) - -5 - 5

Output current (mA) Only for internal use - - 10

lF

Quiescent current (µA) - - 40 -

PSRR At 1kHz tone, vin= 1.2V 30 40 50
tia

11.6. ESD Characteristics

en

Table 18. ESD Characteristics

Parameter Condition Minimum Typical Maximum
id

HBM All pins, test method: - - +- 3.5 kV

JESD22
nf

MM All pins, test method: - - +- 200 V

JESD22
Co

CDM All pins, test method: - - +- 500 V

JESD22
ek
alt
Re

Bluetooth Low Energy SOC 27 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.7. AUXADC Characteristics

Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C.
Table 19. AUXADC Characteristics
AUX Mode Conditions Min. Typ. Max. Unit
Bypass mode - 12 - BITS
Resolution
Divided mode (1/3.3) - 12 - BITS
Clock Source From digital - - 400 kHz
After calibration

ly
DC Offset Error - TBD - LSB
(Bypass mode)
After calibration

on
Gain Error - TBD - LSB
(Bypass mode)
Single-ended mode
- +-1.5 - LSB
(Bypass mode)
DNL

n
Differential mode
- +-3 - LSB
(Bypass mode)

lco
Single-ended mode
- +-1 - LSB
(Bypass mode)
INL
Differential mode
+-2 LSB
(Bypass mode)

(Divided mode)
Fa
External channel (ch0 ~ ch5)
0 - VBAT V
or
Input Voltage Range External channel (ch0 ~ ch5)
0 - 1 -
(Bypass mode)
Internal channel 0 (VBAT) 1.8 - 3.63 V
lF

Bypass mode - 10 - MOhm

Input Impedance
Resistor divider mode (1/4) - 500 - kOhm
tia

Bypass mode - 1.9 - pF

Sampling Capacitance
Resistor divider mode (1/4) - 1.9 - pF
en

11.8. Radio Characteristics

id

Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C

nf

Table 20. General Radio Characteristics

Parameter Condition Minimum Typical Maximum
Co

Frequency Range - 2402 - 2480

(MHz)
ek

Table 21. RX Performance

Parameter Condition Minimum Typical Maximum
Sensitivity (dBm) PER ≤30.8% -97 - -
alt

Maximum Input Level

PER ≤ 30.8% - -1 -
(dBm)
Re

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 RTL8762CMF/RTL8752CMF
Datasheet
Parameter Condition Minimum Typical Maximum
C/Ico-channel (dB) 21 - -
C/I+1MHz (dB) 15 - -
C/I-1MHz (dB) 15 - -
C/I+2MHz (dB) -17 - -
C/I C/I-2MHz (dB) -15 - -
C/I+3MHz (dB) -27 - -
C/IImage (dB) -9 - -
C/IImage+1MHz (dB) -15 - -

ly
C/IImage-1MHz (dB) -15 - -
30~2000MHz, Wanted signal level
-30 - -

on
=-67dBm
2003~2399MHz, Wanted signal level
-35 - -
=-67dBm
Blocker Power (dBm)
2484~2997MHz, Wanted signal level

n
-35 - -
=-67dBm

lco
3000MHz~12.75GHz, Wanted signal level
-30 - -
=-67dBm
Max PER Report Integrity Wanted signal: -30dBm - 50% -
Wanted signal (f0): -64dBm
Max Intermodulation level
(dBm)
|f1-f2|=n MHz, n=3, 4, 5…
Note: 1. Does not include spur channel
Fa
Worst intermodulation level @2f1-f2=f0, -50 - -
or
Note: 2. Depends on PCB design and registers setting
lF

Table 22. TX Performance

Parameter Condition Minimum Typical Maximum
tia

Maximum Output Power (dBm) - - - 8

+2MHz - - -20
Adjacent Channel Power Ratio -2MHz - - -20
en

(dBm) >=+3MHz - - -30

<=-3MHz - - -30
id

∆f1avg (kHz) - 250 -

∆f2max (kHz) 185 - -
Modulation Characteristics
nf

∆f2max Pass Rate (%) - 100 -

∆f2avg / ∆f1avg - 0.88 -
Co

Average Fn (kHz) - 12.5 -

Carrier Frequency Offset and Drift Rate (kHz/50µs) - 10 -
Drift Avg Drift (kHz/50µs) - 10 -
Max Drift (kHz/50µs) - 10 -
ek

Output power of second

- - -50(note) -
harmonic(dBm)
alt

Output power of third

- - -50(note) -
harmonic(dBm)
Note: Tested by EVB with RF PI network.
Re

Bluetooth Low Energy SOC 29 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.9. Digital IO Pin DC Characteristics

Table 23. Digital IO Pin DC Characteristics
Parameter Condition Min Typical Max
Input high voltage (V) VDDIO=3.3V 2 3.3 3.6
Input low voltage (V) VDDIO=3.3V - 0 0.9
Output high voltage (V) VDDIO=3.3V 2.97 - 3.3
Output low voltage (V) VDDIO=3.3V 0 - 0.33
Input high voltage (V) VDDIO=2.8V 1.8 2.8 3.1

ly
Input low voltage (V) VDDIO=2.8V - 0 0.8
Output high voltage (V) VDDIO=2.8V 2.5 -

on
Output low voltage (V) VDDIO=2.8V 0 - 0.28
VDDIO=3.3V
- 10/100 -
Strong pull/weak pull
VDDIO=1.8V

n
- 20/200 -
Strong pull/weak pull

lco
VDDIO=3.3V
Pull high and pull low resister (KOhm)
Strong pull/weak pull - 5/50 -
(P2_0~P2_7, P5_0)
VDDIO=1.8V

(P2_0~P2_7, P5_0)
Fa
Strong pull/weak pull - 2.5/25 -

PAD configured as input

or
Input high current (µA) - - 0.1
mode
PAD configured as input
Input low current (µA) - - 0.1
lF

mode
tia
en
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 30 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.10. Boot Sequence

The RTL8762CMF/RTL8752CMF embeds a Power On Reset Circuit (POR), and power on sequence finite
state machine to boot the system. Power on timing is shown in the figures below.

ly
on
n
lco
Fa
Figure 13. Boot Up By Internal Power On Reset Circuit
or

Tvbatrise<540us @VBAT=1.8V
lF

Tvbatrise<1ms @VBAT=3.3V
tia

VBAT, HVD, VDDIO Trst2>200us

en

HW_RST_N
id

Tpor2vddcore
nf

VDDCORE
Tpor2vxtal
Co

40MHz XTAL

Figure 14. Boot Up By HW_RST_N Pin

ek
alt
Re

Bluetooth Low Energy SOC 31 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.11. UART Characteristics

ly
on
n
lco
Fa
or
Figure 15. UART Characteristics
lF

Table 24. UART Timing Characteristics

Parameter Symbol Min Typical Max
tia

Timing between RX Stop bit and RTS go

td_rts - - 0.5
high when RX FIFO is full (symbol time)
Timing between CTS go low and device
en

td_cts - - 25
send first bit (ns)
Timing between CTS go high and TX send
tset_cts 75 - -
stop bit (ns)
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 32 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.12. I2C Timing Characteristics

START STOP

SDA

tr tf tset_DAT

ly
SCL

on
th_STR tlow th_DAT thigh tset_STOP

n
Figure 16. I2C Interface Timing Diagram

lco
Table 25. I2C Timing Characteristics
Parameter Symbol Min Typical Max
SCL clock frequency (kHz)
High period of SCL (ns)
-
thigh
-
600
Fa -
-
400
-
or
Low period of SCL (ns) tlow 1300 - -
Hold time of START (ns) th_STR 600 - -
Hold time of DATA (ns) th_DAT 0 - -
lF

Setup time of STOP (ns) tset_STOP 600 - -

Setup time of DATA (ns) tset_DAT 100 - -
tia

Rise time of SCL and SDA (ns)

tr See note - -
(with 4.7k ohm resistor pulled high)
en

Fall time of SCA and SDA (ns) tf See note - -

Note: Depends on the external bus pull up resistor.
id
nf
Co
ek
alt
Re

Bluetooth Low Energy SOC 33 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

11.13. Power Consumption

11.13.1. Low Power Mode
Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C
Table 26. Low Power Mode
Current
Always on 32k Retention Wakeup
Power Mode CPU Consumption
Registers RCOSC/XTAL SRAM Method
(typical)

ly
Power down ON OFF OFF OFF Wakeup by 450nA
GPIO

on
Deep LPS ON ON Retention OFF Wakeup by 2.5µA
GPIO, timer (with 160K
SRAM in
retention state)

n
lco
11.13.2. Active Mode
Condition: VBAT=3V, VDDIO=3V, ambient temperature: 25?C

Power Mode
Fa
Table 27. Active Mode (RTL8762CMF with Switching Regulator)
Current Consumption
(Typical)
or
Active RX mode 7.3 mA
Active TX mode 7.9 mA
lF

(TX power: 0dBm)

Active TX mode 9.6 mA
(TX power: 4dBm)
tia

Active TX mode 11.3 mA

(TX power: 7.5dBm)
en

Table 7. Active Mode (RTL8752CMF with LDO)

id

Power Mode Current Consumption

(Typical)
nf

Active RX mode 14.6 mA

Active TX mode 15.6 mA
(TX power: 0dBm)
Co

Active TX mode 18.8 mA

(TX power: 4dBm)
Active TX mode 21.8 mA
ek

(TX power: 7.5dBm)

alt
Re

Bluetooth Low Energy SOC 34 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

12. Mechanical Dimensions

12.1. Plastic Quad Flat No-Lead Package 40 Leads 5x5mm
Outline

ly
on
n
lco
Fa
or
lF
tia

Figure 17. Plastic Quad Flat No-Lead Package 40 Leads 5x5mm Outline
en

12.2. Mechanical Dimensions Notes

id

Symbol Dimension in mm Dimension in inch

nf

Min Nom Max Min Nom Max

A 0.80 0.85 0.90 0.031 0.033 0.035
Co

A1 0.00 0.02 0.05 0.000 0.001 0.002

A3 0.20 REF 0.008 REF
b 0.15 0.20 0.25 0.006 0.008 0.010
D/E 5.00 BSC 0.197 BSC
ek

D2/E2 3.45 3.60 3.75 0.136 0.142 0.148

e 0.40 BSC 0.016 BSC
alt

L 0.30 0.40 0.50 0.012 0.016 0.020

Notes:
CONTROLLING DIMENSION: MILLIMETER (mm).
Re

REFERENCE DOCUMENT: JEDEC MO-220.

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 RTL8762CMF/RTL8752CMF
Datasheet

13. Reflow Profile

ly
on
n
lco
Fa
or
Table 28. Reflow Profile
Stage Note Pb-Free Assembly
lF

Average ramp-up rate TL to Tp 3?C/ second max.

Preheat Temperature min (T smin) 150?C
tia

Temperature max (Tsmax) 200?C

Time (tsmin to tsmax) 60 – 120 seconds
Time maintained above Temperature(T L) 217?C
en

Time (tL) 60 – 150 seconds

Peak package body temperature (Tp) See following table.
id

Tp must not exceed the specified classification temp in

the following table.
30 seconds
nf

Time( tp) within 5?C of the specified classification temperature

(Tc)
Ramp-down rate (Tp to T L) 6?C / seconds max.
Co

Time 25?C to peak temperature 8 minutes max.

ek

Package Thickness Volume < 350 mm3 Volume 350 – 2000 mm3 Volume > 2000 mm3
＜1.6 mm 260 +0 /-5?C 260 +0/-5?C 260 +0 /-5?C
1.6 – 2.5 mm 260 +0 /-5?C 250 +0/-5?C 245 +0/-5?C
alt

2.5 mm 250 +0 /-5?C 245 +0/-5?C 245 +0/-5?C

Re

Bluetooth Low Energy SOC 36 Track ID: JATR-8275-15 Rev. 0.71

 RTL8762CMF/RTL8752CMF
Datasheet

14. Ordering Information

Table 29. Ordering Information
Part Number Package Status
RTL8762CMF-CG QFN-40, 5x5mm Outline; ‘Green’ Package MP
RTL8752CMF-CG QFN-40, 5x5mm Outline; ‘Green’ Package MP
Note: See section 5 Pin Assignments, page 6 for package identification.

ly
on
n
lco
Fa
or
lF
tia
en
id
nf
Co
ek

Realtek Semiconductor Corp.

Headquarters
alt

No. 2, Innovation Road II, Hsinchu Science Park,

Hsinchu 300, Taiwan, R.O.C.
Tel: 886-3-5780211 Fax: 886-3-5776047
Re

www.realtek.com
Bluetooth Low Energy SOC 37 Track ID: JATR-8275-15 Rev. 0.71