Ecdnotes Part1
Ecdnotes Part1
Ecdnotes Part1
CIRCUIT DESIGN
Lecture Notes and
Laboratory Exercises
(Draft 0.2.0)
by
Hasnul Hashim
Electronic Principles
Figure 1.1: Bipolar junction transistor symbols, pin and voltage notation.
In Fig. 1.1, the arrows point in the direction of increasing voltage. The first
letter in the subscripted quantity is the pin where the voltage is measured with
respect to the pin indicated in the second subscript letter. For example, VBE is
the voltage at the base of the transistor with respect to the emitter. Two-letter
subscripted quantities will be interpreted as such unless the letters used are the
same, e.g. VCC and VEE . Identical two-letter subscripts will be used for voltage
supplies. Thus, VCC would be a voltage supply to the collector; VEE would be
1
CHAPTER 1. ELECTRONIC PRINCIPLES 2
voltage supplied to the emitter. If the second letter in the subscript is omitted,
the indicated voltage is measured with respect to a ground reference node common
to the whole circuit. There are a few situations where these rules are not observed
and they will be pointed out explicitly in due course.
Voltage
vbe (t)
VBE
vBE (t) = VBE + vbe (t)
t
Figure 1.2: Variable naming convention for mixed ac and dc analog sig-
nals.
The usage of this convention is exemplified in Fig. 1.2. In addition, the voltage
and current source circuit symbols that will be used are shown in Fig. 1.3.
+ +
VS − vs a0 vi − Vbatt
IS is gm vi
In many of the circuits that will be discussed, the npn type shall be used as
representative transistor for the circuit. Often the transistor circuit will also work
CHAPTER 1. ELECTRONIC PRINCIPLES 3
with pnp types provided that terminal voltages and currents necessary for proper
functioning are properly accounted. This may entail checking direction of voltage
drops and terminal currents.
VBC
forward bias
Inverse Saturation
region VBE VBC Mode
active
F R Forward active
F F Saturation
VBE
reverse bias 0 forward bias R F Inverse active
reverse bias
R R Cut off
Forward
Cut off
active
Figure 1.4: BJT modes of operation for npn type where “F” denotes that
the junction is forward-biased whilst “R” indicates reverse bias.
(a) IC vs VBE
saturation
c
IB
βIB b c
IB
b +
+ 0.7 V − βIB
− 0.7 V
e e
(a) Form I (b) Form II
voltage given is typically used but in some circumstances maybe specified differ-
ently, e.g. 0.6 V. These assumptions are acceptable for hand calculations; more
accurate (and complex) models can be obtained by using a computer program like
SPICE which stands for Simulation Program with Integrated Circuit Emphasis.
1.2.4 Biasing
Biasing a transistor typically entails the application of dc voltages across its termi-
nals so that the transistor will be in a desired mode of operation. A biasing circuit
is used to provide a stable dc voltage and current operating point or quiescent (Q)
point. For bias calculations, the simple dc model is usually sufficient.
There are four commonly used biasing circuits, namely
• fixing the base current IB or fixed base bias is better than crude biasing but
still not practical
A crude approach to the biasing of an npn transistor for forward active mode
is shown in Fig. 1.7 where VIN is a variable dc voltage source. The voltage sources
RC 1 kΩ
+ vb (t) + VCC
− VCC − 12V
+ VC VB + vC (t)
VIN − 0.7V − vB (t)
Figure 1.7: Crude biasing arrangement for forward active mode operation
of an npn transistor.
VIN and VCC supply the base current and collector current respectively. In order for
CHAPTER 1. ELECTRONIC PRINCIPLES 6
VC = VCC − IC RC . (1.2)
IE = IB + IC
= IB + βIC
IE = (1 + β)IB . (1.3)
Alternatively
IE = IB + IC
IC
= + IC
β
1+β
IE = IC (1.4)
β
β
IC = IE (1.5)
1+β
If β is large then
IC ≈ IE (1.6)
.
Fig. 1.9 shows biasing by fixing the base current of the transistor. The variable
resistor RB allows in-circuit adjustment of IB to suit the transistor’s characteristics.
From the dc model, it is clear that
VCC − 0.7
IB = (1.7)
RB
from which the collector current can be obtained from IC = βIB . However this
requires knowledge of the value of β. The value of β varies between transistor
models and manufacturers. While a typical value for β maybe 120, it could be 40
or an order larger, say 400. The value of β also varies with temperature and is
also dependent on IC and VCE .
CHAPTER 1. ELECTRONIC PRINCIPLES 7
12
20.0
VC
10
8 IC 15.0
IC , IB (mA)
VC (V)
6
10.0
4
5.0
2 IB
0 0.0
VCC VCC
RC RC
c c
RB RB
βIB
IB IB
VCE VCE
b b +
VBE VBE
− 0.7 V
e e
When the collector characteristics for a given transistor are available, it can
used to design an appropriate operating point and base resistor using the load line
method. Consider a load line superimposed on the IC -VCE characteristic curves
as shown in Fig. 1.10. The load line is a straight line governed in this particular
circuit by the equation:
VCE = VCC − IC RC . (1.8)
VCC
The load line cuts the VCE axis at VCC and the IC axis at RC
as can be verified
from the load line equation. The gradient of the line is determined by RC . Thus,
the line can be manipulated by choosing values for VCC and RC .
The transistor IC -VCE characateristic curves as shown in Fig. 1.10 were derived
CHAPTER 1. ELECTRONIC PRINCIPLES 8
IC
+
− VCE
IB
VCC IB = 80 µA
16 RC
IB = 60 µA
12
IC (mA)
Operating
point IB = 40 µA
8
IC = 8.1 mA
VCE = 4.9 V IB = 20 µA
4
IB = 0 µA VCC
0
0 2 4 6 8 10 12
VCE (V)
(b) IC vs VCE
with the collector-emitter voltage and base current as independent variables which
is depicted as a variable current source at the base and a variable voltage source
at the collector. For various combinations of base current and collector-emitter
voltage the collector current is recorded and the curves in Fig. 1.10 are obtained.
In the active region, the collector current is directly proportional to the base
current1 .
For operation in the active region, several reasonable choices in load lines and
operating points may be available (see Fig. 1.11). Suppose that VCC has been fixed
to 12 V. For load line A, there are three choices (Q1 , Q3 and Q4 ) for operating
points depending on the desired collector current. Operating points Q2 and Q4
1
The collector current is also slightly dependent on VCE but we will ignore this here and
address it later.
CHAPTER 1. ELECTRONIC PRINCIPLES 9
have the same base current. For load line A, the collector resistance is
VCC 12
= 16 × 10−3 =⇒ RC = = 750 Ω
RC 16 × 10−3
whereas for load line B the collector resistance would be doubled since the maxi-
mum collector current is halved.
16
Load line A
12
IC (mA)
Q3 Q1
Q4
Load line B
4
Q2
0
0 2 4 6 8 10 12
VCE (V)
VCC VCC
RC RC
R1 IC
R1 ||R2 a
vo + IB (1 + β)IB
vi R2
R2 R1 +R2 VCC
−
RE RE
b
(a) Auto-biasing (b) dc analysis
1.2.5 DC Analysis
The forward-biased base-emitter voltage (VBE ) and thermal voltage (VT ) are usu-
ally specified. Typically,
IC = βIB (1.11)
IE = (1 + β)IB (1.12)
CHAPTER 1. ELECTRONIC PRINCIPLES 11
VE = VB − VBE (1.13)
R2
I1 = I (1.15)
R1 + R2
– not just for dc calculations.
It is often necessary to deal with the typical biasing network shown in Fig.1.13.
Apply Thevenin’s theorem to convert this network into its equivalent form.
VCC
RT h
R1
+
R2 VT h −
where
R2
VT h = VCC (1.16)
R1 + R2
R1 R2
RT h = (1.17)
R1 + R2
physics of two interacting pn junctions. The Ebers-Moll model for the static (dc)
condition is discussed further.
The diode equation is given by
VD
ID = IS (e nVT − 1) (1.18)
VT = kT /q (1.19)
and where
ID = IE
β
IC = IE
1+β
β
α= (1.20)
1+β
∴ IC = αID (1.21)
For a given transistor, the parameters α and β are usually measured quantities.
A more general model that is valid for any connection of the transistor takes
into account both the base-emitter and base-collector pn junctions. In the Ebers-
Moll model each pn junction is modelled by a diode. The nearness of the two pn
junctions causes current in one diode to control a current source in parallel with the
other diode. The injection version of the Ebers-Moll model utilises two different
α-parameters, namely αF and αR for forward and reverse operations of the emitter
and collector diodes, denoted as DE and DC respectively. This model is shown
in Fig. 1.3.1. An alternative formulation of the Ebers-Moll model from carrier
CHAPTER 1. ELECTRONIC PRINCIPLES 13
IC c
αID
IB
b
ID
IE
e
Figure 1.14: Forward active mode BJT model with diode representing
base-emitter pn junction.
IC c IC c
0
IDC αF IDE IDC IS (eVBE /VT − 1)
b b
IDE αR IDC 0
IDE IS (eVBC /VT − 1)
IE IE
e e
(a) Injection version (b) Transport version
0 IS VBE /VT
IDC = (e − 1) (1.22)
αR
0 IS VBC /VT
IDE = (e − 1) (1.23)
αF
The collector-base current source is controlled by the base-emitter voltage (VBE )
whilst the emitter-base current source is controlled by the base-collector voltage
(VBC ). In the expressions shown in Fig. 1.3.1, note the absence of the adjustment
factor n. When the diode is forward biased, it is assumed that VD = 0.7 V. Hence,
VD /VT >> 1 and the exponential dominates the expression. Conversely, if the
diode is reverse biased, VD /VT is a large negative number and the exponential term
is negligible compared to the unity term (-1). Furthermore, the scaling current
IS of the controlled source is much smaller than the diode current in the parallel
branch.
CHAPTER 1. ELECTRONIC PRINCIPLES 14
For this particular case, the controlled source can be omitted as shown in
Fig. 1.16 where the reverse-biased diode current has been defined as ID = −ICBO .
When the latter is neglected as well (remove the reverse biased diode from the
circuit), then we arrive at the diode-based model as shown in Fig. 1.14 where
IS
ID = α
(eVBE /VT −1). It is often convenient to use a common-emitter configuration
IC c
IS VBE /VT
α (e − 1)
IE
e
of the model. (See Fig. 1.17.) The input voltage is applied between the base and
the emitter, and the output voltage is taken between the collector and the emitter.
(The emitter is “common” to both the input and the output, hence the naming
convention.)
IB IC
b c
IC
IS (eVBE /VT − 1)
β
IE
e
are selected as excitations. (See Appendix ??.) Consider the h-parameters for the
common emitter circuit shown in Fig. 1.18 where the base current and common-
emitter voltage will be excited (independent variables) and the collector current
and base-emitter voltage used as response quantities (dependent variables). The
biasing circuit is not shown but it is taken for granted that the operating point
is set by IB and VCE (independent variables) which in turn determines IC and
VBE (dependent quantities). The h-parameters vary with collector current and
ib ic
hf e = 100
hie = 1 kΩ
1
hoe <
50 kΩ
hre < 10−4
The parameters hf e and hre are ratios; hie is an impedance and hoe is an admit-
tance. The gain parameter hf e could be smaller or larger typically by a factor
of four from the value given above. The input impedance hie could vary by an
order,i.e. a factor of ten.
The four h-parameters are defined by the equations
where
ic
hf e = (1.26)
ib vce =0
ic
hoe = (1.27)
vce ib =0
vbe
hie = (1.28)
ib vce =0
vbe
hre = (1.29)
vce ib =0
ib ic
b c
hie
vbe 1 vce
hf e ib hoe
+
− hre vce
e e
IC
IC2
∆IC (IBQ,ICQ)
IC1
IB1 IB2
IB
∆IB
The parameter is the small-signal current gain at a particular Q (see Fig. 1.20)
that could be obtained from
dIC ∆IC
hf e |(atQ) = ≈ (1.30)
dIB at(IB1 ,IC1 ) ∆IB
IC IC
IB2 > IB1
IC2 IB2
IBQ
∆IC ∆IC
IC1
IB1
VCE VCE
∆VCE = 0 ∆VCE
(a) hf e (b) hoe
IB IB VCE1
∆IB Q
VBE VBE
∆VBE ∆VBE
(c) hie (d) hre
IC IC IC IC
(a) hf e (b) hoe (c) hie (d) hre
VCC
RC
R1
vo
vi R2
RE CE
ib ic
b c
hie
vi RB vbe 1 vce
hf e ib hoe RC vo
+
− hre vce
e e
(b) h-parameter small-signal equivalent circuit
ic = hf e ib − hoe ic Rc
ic (1 + hoe Rc ) = hf e ib
hf e
∴ ic = ib (1.37)
1 + hoe Rc
CHAPTER 1. ELECTRONIC PRINCIPLES 19
hf e
vbe = hie ib − hre Rc ib
1 + hoe Rc
hre hf e Rc
= ib hie −
1 + hoe Rc
hie + (hie hoe − hf e hre )Rc
= ib (1.38)
1 + hoe Rc
Hence the voltage gain can be expressed as
vo vce
=
vi v
be
−hf e 1 + hoe Rc
= Rc
1 + hoe Rc hie + (hie hoe − hf e hre )Rc
−hf e Rc
= (1.39)
hie + (hie hoe − hf e hre )Rc
The input resistance looking into the base of the transistor is given by
vbe
Rinb =
ib
hie + (hie hoe − hf e hre )Rc
= (1.40)
1 + hoe Rc
ib iµ rµ ic
b c
vb rπ gm vb ro vc
e e
The intrinsic parameters of the model are rπ and gm . In addition, the resistance rµ
models the effect of the collector voltage on base current and ro models the effect
of the collector voltage on the collector current in the active mode. The hybrid-π
model is connected to the h-parameters model through a set of defining equations.
Refer to Fig. 1.19 and Fig. 1.25. Firstly note that vb ≡ vbe and vc ≡ vce . For the
hybrid-π model, we have
gives
rπ rµ
hie = = rπ ||rµ (1.48)
rπ + rµ
rπ rπ ||rµ
hre = = (1.49)
rπ + rµ rµ
1
hf e = (rπ ||rµ )(gm + ) (1.50)
rµ
rπ ||rµ 1 1 1
hoe = gm + + + (1.51)
rµ rµ rµ ro
While the hybrid-π model shown in Fig. 1.25 may appear rather complicated,
a simplified version often suffices for hand calculations. From the h-parameters,
the value of hre is very small and can be neglected. Thus, taking hre = 0 means
β βVT
that hie ≡ rπ . (Since rπ = gm
= IC
therefore hie is inversely proportional to
instantaneous collector current.)
The resistance rµ can also be ignored (having infinite resistance) in many simple
situations. In other words, it is assumed that the base is electrically isolated from
CHAPTER 1. ELECTRONIC PRINCIPLES 21
the collector. (For example, typical values of hre = 10−10 and hie = 103 would give
hie 1
rµ = hre
= 1013 Ω.) If it is also assumed that hoe ≈ 0 then ro = hoe
= ∞ and
the output resistance can be removed. With these simplifications, the simplified
hybrid-π model is obtained as shown in Fig. ?? together with the simplified h-
parameters form.
While a careful distinction has been between these two circuit models, param-
eters from the one of them may appear in the other. This should not cause undue
confusion, provided the above assumptions are borne in mind. Furthermore, it is
useful to know (assuming hre = 0) that
hf e
gm = (1.52)
hie
.
ib ic
b c
e e
(a) Simplified hybrid-π
ib ic
b c
vbe 1 vce
hie hf e ib hoe
e e
(b) Simplified h-parameters
ib e
e
c b c
ib hf e b hie i b hf e
b hie
c b c
e
e ib
(a) NPN model (b) PNP model
IC
gm = (1.53)
VT
hf e
gm = (1.54)
hie
where IC is the dc collector current.
The hybrid-π model is related to the h-parameters model by
rπ = hie (1.55)
gm vbe = ib hf e (1.56)
BJT Amplifiers
23
CHAPTER 2. BJT AMPLIFIERS 24
1 kΩ
vb (t) + VCC
− 12V
VB + vC (t)
0.7V − vB (t)
Figure 2.1: Linear BJT amplifier from the crude biasing example.
7
Q
VC (V)
∆VC
6
∆VB
5
dVC
Av =
dVB
4
0.690 0.695 0.700 0.705 0.710
VB (V)
The minus sign means that if the input signal was a sine wave, the output signal
will be a sine wave shifted by 180◦ as shown in Fig. 2.3. Note that the ratio of the
instantaneous values at the operating point, that is the ratio of the dc values, is
not the gain.
VC 6.4
Av 6= = = 9.14
VB 0.7
12
10
8
VC
VC (V)
6 Q
4 Output signal
2 Input
signal
0
VB
0.60 0.65 0.70 0.75 0.80
VB (V)
subject of our investigation. (For the common collector circuit, the resistor RC is
usually omitted.)
VCC VCC
RC RC C
R1 R1 C
vo
vi R2 vi R2
RE CE RE vo
VCC
RC
R1
vo
CB R2
RE vi
iC = IC + ic
vBE = VBE + vbe
vC = VC + vc
iB = IB + ib
Consider small changes about the operating point defined by (IC , VBE , IB , VC ).
Differentiating (2.7) with respect to vBE :
diC IS vBE /VT
= e
dvBE vBE =VBE VT
vBE =VBE
IS VBE /VT
= e
VT
IC
= (2.8)
VT
Let us define the right-hand side expression as a transconductance
IC
gm , (2.9)
VT
which can be obtained from the dc value of the collector current (IC ).
In the small-signal regime about the operating point
∆iC = ic ,
∆vBE = vbe
and
diC ∆iC ic
= =
dvBE ∆vBE vbe
Therefore,
diC ic IC
= = = gm
dvBE vbe VT
and
ic = gm vbe . (2.10)
vC = VCC − iC RC
= VCC − (IC + ic )RC
= (VCC − IC RC ) − ic RC . (2.11)
CHAPTER 2. BJT AMPLIFIERS 28
VC = VCC − IC RC
Using (2.10)
vc = −gm vbe RC . (2.13)
The collector current is related to the base current by ic = βib which means that
ic
ib =
β
gm vbe
ib =
β
β
⇒ vbe = ib (2.14)
gm
where (2.10) has been used. This is an Ohmic expression that relates the base-
emitter voltage to the base current. Hence, the proportionality constant is an ac
input resistance which is defined as
β
rπ = . (2.15)
gm
Taken together, these results allow the construction of a simplified small-signal ac
equivalent circuit (see Fig. 2.5) which will be referred to as the simplified π-model.
b c
vbe rπ gm vbe vce
e e
RS ii ib ic io
b c
vS vi R1 R2 rπ gm vbe RC vo
e e
Ri Rib Roc Ro
Ro = Rc
Av = −100 × 1 = −100
Ai = −100
Powergain = Av × Ai = 104
100
Rib = = 1 kΩ
100
Ro = 1 kΩ
VCC
RC
RE1 vo
vi
ib ic
b c
hie hf e ib
Ri Rib Ro
vi vo RC
RB e
RE1
circuit. For small-signal equivalent circuit analysis, assume that the shunt emitter
capacitance is ideal, i.e. it shorts the emitter resistor, and that hre = 0 and hoe = 0.
The input and output voltages are given by
(The input resistance Rib is high, similar to that of the emitter follower circuit
that will be covered shortly.) The voltage gain is
vo −hf e ib Rc
Av = =
vi ib hie + ib (1 + hf e )RE1
−RC
=
RE1 + hieh+R
fe
E1
RC
≈− (2.23)
RE1
hie +RE1
where in the last line it is assumed that RE1 hf e
usually.
The output resistance Ro of an amplifier (see Fig. 2.8) is defined as an equivalent
Thevenin resistance looking into the output of the amplifier. In general, Ro is not
Vo
the same as the load resistance RL = Io
.
Rs
vs RL vo
Ro
The output resistance can be determined by three different methods (see Fig. 2.9):
1. Tune an external test load resistance at the output, until the resultant output
voltage is half the open-circuit voltage (voc ) whereupon Ro = Rtest .
2. Calculate the open circuit voltage and short circuit current. Ro = voc /isc
Ro Ro
Ro ix
0 vx
(c) Injection
When an external test load (RT ) is placed at the output, it is in parallel with
RC according to the small-signal equivalent circuit. Consequently the voltage gain
equation gives
RC ||RT
vo = − vi (2.26)
RE
Suppose RT is tuned until vo = 21 voc and let the value of RT which satisfies the
voltage condition be RT0 . Substitute these into the above equation:
1 RC ||RT0
voc = − vi
2 RE
RC RC RT0
− vi = − vi
2RE (RC + RT0 )RE
RC + RT0
=2
RT0
RT0 = RC (2.27)
Thus the voltage at the output is approximately the same as the voltage at the
input.
ib ic
b c
rπ gm vbe
RS
vi R1 R2
vS e
Rib RE vo
RB Ro
io ib (1 + β)
Ai = = = 1 + β = (typically100)
ib ib
and the power gain is
Ap = Av × Ai = (typically100)
vo = ib (1 + hf e )RE (2.32)
Therefore
(1 + hf e )RE
vo = vs0 (2.34)
Rs0 + hie + (1 + hf e )RE
where the proportionality constant is typically ≈ 1.
The input resistance is given by
which is somewhat easier to discern from Fig. 2.10. The resistance looking into
the base is
vi ib (hie + (1 + hf e )RE )
Rib = = (2.36)
ib ib
= hie + (1 + hf e )RE (2.37)
CHAPTER 2. BJT AMPLIFIERS 35
ib ic
b c
hie hf e ib
Rs0
vi
vs0 e
Rib RE vo
Ro
By KVL
vs0
ib,sc = (2.39)
Rs0 + hie
Thus
vs0 (1 + hf e )
isc = (2.40)
Rs0 + hie
Therefore the output resistance is
voc
Ro =
isc
vs0 (1+hf e )RE
0
Rs +hie +(1+hf e )RE
= vs0 (1+hf e )
Rs0 +hie
RE (Rs0 + hie )
= (2.41)
Rs0 + hie + (1 + hf e )RE
CHAPTER 2. BJT AMPLIFIERS 36
This expression is in the form of two resistances in parallel and can be rewritten
as
1 1 1 + hf e
= + 0 (2.42)
Ro RE Rs + hie
that is
Rs0 + hie
Ro = RE || (2.43)
1 + hf e
However, RE than the second resistive term and the output resistance can be
taken as
Rs0 + hie
Ro ≈ (2.44)
1 + hf e
Using typical values: hie = 1 k, hf e = 100, RE = 1 k and Rs = 0 gives Ro =
1
1kΩ|| 101 kΩ ≈ 9.7Ω. For an ideal buffer, a high input resistance (Rib high),
unity voltage gain ( vvoi ≈ 1) and low output resistance (Ro small) are desirable
characteristics.
vi = −vbe
vo = −ic Rc = −gm vbe Rc
vo −gmv
be Rc
∴ Av = = = gm Rc
vi −v
be
which is the same as the collector amplifier gain except for a change in sign;
typically 100 × 1 ≈ 100.
Current gain
io −βib βib β
Ai = = = =
−ie −ie (1 + β)ib 1+β
where emitter current flows out of the emitter, a negative sign has been prefixed
100
in the denominator to get correct gain; typically 101
≈ 1.
Power gain
Ap = Av × Ai = 100 × 1 = 100
In order to determine the output resistance, the injection method will be ap-
plied (method 3). Recall that in this method, all independent input voltage sources
are zeroed and a voltage source is applied to the output of the circuit. The common
CHAPTER 2. BJT AMPLIFIERS 37
ib ic io
b c
rπ gm vbe
vbe
RC vo
e ie
vi RE
base amplifier typically has high output resistance. Thus in selecting an appropri-
ate small-signal equivalent circuit for determining output resistance, the intrinsic
output resistance of the BJT cannot be neglected. Therefore, unlike the earlier
1
equivalent circuit, the output resistance hoe
is reinstated as shown in Fig. 2.13.
ib ic
b c ix
1
hie hf e ib hoe
2 Roc Ro
RC vx
e
Rs 1
vs = 0 RE
0
vx = (ib + ic )RE + (ic − hf e ib ) h1oe
0 1 0 hf e
= ic RE + + ib RE − (2.45)
hoe hoe
CHAPTER 2. BJT AMPLIFIERS 38
0
−ib hie − (ib + ic )RE =0
0 0
ib (hie + RE ) = −ic RE
0
RE
ib = i
0 c
(2.46)
hie + RE
0
The second term is clearly RE ||hie . Since
!
0 1 hf e
(RE ||hie ) 1+ (2.49)
hoe 1 + Rhie0
E
!
1 hf e
∴ Roc ≈ 1+ (2.50)
hoe 1 + Rhie0
E
0
where RE = (Rs ||RE ).
Suppose Rs hie ,
1 hf e 1
⇒ Roc = 1+ =
hoe ∞ hoe
0
If RE hie ,
1 hf e 1 + hf e
⇒ Roc = 1+ =
hoe 1+0 hoe
1
Taking typical values of hoe
= 100 kΩ and hf e = 100, bounds the output collector
resistance by
10 k < Roc < (101 × 100 k = 10.1 MΩ)
The upper bound on Roc can be a very high value. The output resistance of the
amplifier is Ro = Roc ||RC .
CHAPTER 2. BJT AMPLIFIERS 39
A high Roc is desirable when the collector load is a resonant circuit such as used
in a tuned amplifier that will be discussed later. (The impedance at resonance of
the tuned circuit will be in parallel with Roc , therefore the latter needs to be much
higher so that the Q will not be affected. ) In practice, the common base amplifier
is used in a cascode configuration such as the one shown in Fig. 2.14 where a
common emitter amplifier draws a common base amplifier thereby screening the
output from the input.
VCC
vo
vi
RS
STAGE 1
STAGE 2
vs vi1 vo1 vi2 vo2
Figure 2.15: N -stage cascaded amplifier with stage 1 and stage 2 shown
explicitly.
VCC
coupling
capacitor
vo
vi
Stage 1 Stage 2
(a) AC interstage coupling
VCC
vi
vo
Stage 1 Stage 2
(b) DC interstage coupling
Figure 2.16: Two stage common emitter amplifier (a) and common emit-
ter buffered by common collector (b) with different interstage coupling
mechanisms.
identical to the npn stage. The voltages in the circuit can be related to the circuit
CHAPTER 2. BJT AMPLIFIERS 41
parameters by
v1 = −gm1 (RC1 ||rπ2 )vi
vo = −gm2 RC2 v1
VCC
RC1 RE2 CE2
Q2
Q1
v1
vi RC2 vo
RE1 CE1
e1 e1 e2 e2
(b) Equivalent circuit
VCC
R1
R3
vi
Cboot
R2 vo
0
RE = R1 ||R2 ||RE (2.51)
0
vi = ib hie + (ii + hf e ib )RE (2.52)
0
vo = (ii + hf e ib )RE (2.53)
By current division
R3
ib = ii (2.54)
R3 + hie
Substituting (2.54) into (2.52)
R3 R3 0
vi = ii hie + ii + ii hf e RE (2.55)
R3 + hie R3 + hie
ii ib ic
b c
hie hf e ib
R3
vi e
Ri
R1 R2 RE vo
which is much smaller than the input resistance with the bootstrap capacitor in
situ.
The bootstrap capacitor provides a feedback path from the emitter to the base
of the transistor via resistor R3 . Miller’s theorem is useful in analysis of circuits
containing feedback impedances. Before presenting the theorem, let us redraw the
bootstrap equivalent circuit as depicted in Fig. 2.21.
First consider the circuit without the feedback resistance R3 . The output
voltage is
0
vo = ib (1 + hf e )RE (2.57)
CHAPTER 2. BJT AMPLIFIERS 44
ib ic
b c
hie hf e ib
R3
vi Ri Rib e
R1 R2 RE vo
R3
ib ic
b c
hie hf e ib
R3
vi Rib e
K
0
RE vo vi vo
Z12
i1 i2
i1 i2
v1 K v2 v1 Z1 K Z2 v2
The application of Miller’s theorem for analysing linear two-port networks hav-
ing a feedback impedance will now be presented. Refer to Fig. 2.22. Miller’s
theorem allows the feedback impedance that connects port 1 and port 2 to be
replaced by a pair of Miller impedances (Z1 and Z2 ) that are connected from port
1 and port 2 terminals to ground respectively. The approach can be validated by
consideration of the currents in the feedback path:
v1 − v2 v1 − v2 v1 v1 v1
i1 = = = (1 − K) = Z12
(2.61)
Z12 v1 Z12 Z12 (1−K)
v2
where K is the open-loop voltage gain, that is K = v1
. Hence, the branch current
i1 can be represented as being shunted by an equivalent Miller impedance which
appears in the denominator of the rightmost expression. Thus,
Z12
Z1 = (2.62)
1−K
Similarly, consideration of the branch current i2 yields
v2 − v1 v2 − v1 v1 v2 1 v2 v2
i1 = = = (K − 1) = Z12
(2.63)
Z12 v1 v2 Z12 K Z12 (K−1)
K
CHAPTER 2. BJT AMPLIFIERS 46
and
Z12 K
Z2 = K−1
= Z12 (2.64)
K
K −1
The Miller equivalent circuit is valid provided that the conditions that existed
in the network when K was determined are not changed. For conveninence, we
may also refer to the Miller impedances as ZM I and ZM O corresponding to Z1 and
Z2 , the input port Miller impedance and the output port Miller impedance. As an
application example of the Miller technique consider the bootstrap emitter follower
once more. (See Fig. 2.23; also note that since we’re dealing with resistances we
use the symbol R instead of the more general symbol Z for impedances.)
R3
K
K
vi RMI RMO vo
vi vo
ib rbb0 Cb 0 c ic
b b0 c
rb0 e Cb 0 e 0 v 0
gm ro
vb0 e be
e e
For circuit analysis at high frequencies the hybrid-π model needs to be mod-
ified to improve accuracy. Two junction capacitances (Cb0 c and Cb0 e ) and a base
spreading resistance rbb0 are added to the model as shown in Fig. 2.24. (The re-
sistance rµ is omitted because the reactance of Cb0 c is usually much smaller.) The
base spreading resistance models the high resistance region between the base con-
tact and the active region of the transistor. An external base node is defined and
labelled as b and a fictitious internal base node is created called b0 . Thus, prior to
the model discussed in this section, it is assumed that rbb0 = 0 and b = b0 . The
resistance rbb0 is typically of the order of 10 Ω to 100 Ω and is not negligible. rb0 e
0 IC
is dependent on collector current since gm = VT
.
hf e hf e
rb0 e = 0
= VT (2.67)
gm IC
With hf e = 100, and IC = 1, 10 and 100 mA, gives rb0 e = 2.6 k, 260Ω and 26Ω
respectively. Clearly, for the last two values rbb0 would have a sizeable impact. The
overall transconductance parameter is given by
hf e hf e
gm = = (2.68)
hie rb0 e + rbb0
1
The total resistance of two resistances, say R1 and R2 , connected in parallel is RR11+R R2
2
.
Suppose R2 is negative; the denominator is reduced and therefore the overall resistance increases,
but would still be positive.
CHAPTER 2. BJT AMPLIFIERS 48
The inclusion of two capacitances originate from capacitance due to the base-
collector pn junction (Cb0 c ) and capacitance due to the base-emitter pn junction
(Cb0 e ) which when forward biased can be capacitively large. At low frequencies the
capacitances can be ignored (open circuit), the two base resistances are in series,
i.e.
rbb0 + rb0 e = rπ = hie (2.70)
Ci = Cb 0 e + CM I
0
= Cb0 e + (1 + gm (RL ||ro ))Cb0 c
Short circuit load ⇒ RL = 0
∴ Ci = Cb0 e + Cb0 c ≈ Cb0 e (2.71)
2
where CM I is the equivalent Miller capacitance for Cb0 c .
Assume that the short circuit current is wholly supplied by the dependent
source, i.e.
0
|isc | = |ic | ≈ |gm vb0 e | (2.72)
0
ic = gm vb0 e
hf e rb0 e
= ib
rb0 e 1 + jωrb0 e Cb0 e
ic ĥf e
, hf e (ω) = (2.74)
ib 1 + jωrb0 e Cb0 e
hf e (ω)
ĥf e
log
scale
1 ω
0
ωB ωT
Figure 2.25: Frequency dependence of the short circuit current gain show-
ing the 3-dB breakpoint frequency ωB and unity gain bandwidth product
fT (or ωT ).
ĥf e
=1
ωT rb0 e Cb0 e
ĥf e
⇒ ωT = (2.77)
rb0 e Cb0 e
Thus
ωT = ĥf e ωB (2.78)
Now
0 ĥf e 0
gm = ⇒ gm rb0 e = ĥf e
rb0 e
g 0 rb0 e g0
⇒ ωT = m = m (2.79)
rb0 e Cb0 e Cb 0 e
CHAPTER 2. BJT AMPLIFIERS 50
0
But gm is a function of collector current IC ,
0 IC
gm =
VT
hence ωT is a function of collector current (see Fig. 2.26). It is usually prudent
fT
IC
to design amplifiers and oscillators well below fT . Moreover, the high frequency
model is valid up to about 0.3fT .
Rs CC
vs vi Ri Ci
Ri 1
= 1
Ri + Rs 1 + jωCC (R i +Rs )
1
= A0
1 − j ωωL
A(ω) 1
∴ = (2.81)
A0 1 − j ffL
where
1
ωL = (2.82)
CC (Ri + Rs )
At high frequencies, ZC = 0 but the impedance of Ci is no longer infinite. Let
Ri
Zi = Ri ||Ci = (2.83)
1 + jωCi Ri
Hence the gain is
vi
A(ω) =
vs
Zi
=
Zi + Rs
Ri /(1 + jωRi Ci )
=
Ri /(1 + jωRi Ci ) + Rs
Ri
=
Ri + Rs + jωRi Rs Ci
Ri 1
=
Ri + Rs 1 + jω RRi R+R
s Ci
s
i
1
= A0
1 + j ωωU
A(ω) 1
∴ = (2.84)
A0 1 + j ffU
where
Ri + Rs 1
ωU = = (2.85)
Ri Rs Ci (Ri ||Rs )Ci
A Bode plot of the frequency response of a wideband amplifier is shown in
Fig. 2.28. The response curve has been normalised by dividing the gain function
CHAPTER 2. BJT AMPLIFIERS 52
midband
0
3 dB
(dB)
−10
A(f )
A0
20 dB/decade
−20 asymptote
20 log10
−30
fL fU
−40
100 101 102 103 104 105 106 107 108
Frequency (Hz)
Figure 2.28: Bode plot of the frequency response of a wideband amplifier
normalised with respect to the gain at midband due to the effects of
source resistance, coupling capacitance and amplifier input impedance.
Rs CC
vs vi Ri Ci gm vi RC Co vo
RC
ZC = (2.89)
1 + jωRC Co
The voltage gain is given by
vo
= −gm ZC
vi
−gm RC
=
1 + jωRC Co
Let Avo , −gm RC
vo Avo
∴ = (2.90)
vi 1 + j ωω3
1
where ω3 = R C Co
Thus, at high frequencies the the gain magnitude drops by a
further 20 dB/decade for a total asymptotic drop rate of 40 dB/decade. The
overall normalised gain magnitude of this common emitter amplifier is shown in
Fig. 2.30.
Consider the frequency response of common emitter amplifier including the
effect due to the emitter bypass capacitance (see Fig. 2.31) on the frequency
response. For the response at low frequencies, CC and CE cannot be ignored.
However, it is assumed that R1 and R2 are sufficiently large so that they can
be neglected in determining the amplifier’s input resistance RIN . Furthermore,
assume that the output coupling capacitance CC2 is negligible at low frequencies.
Let ZE = RE ||CE :
RE
ZE = (2.91)
1 + jωCE RE
The input voltage is given by
1
vi = ib + hie + (1 + hf e )ZE = ib ZIN (2.92)
jωCC
CHAPTER 2. BJT AMPLIFIERS 54
−40
40 dB/decade
−60 asymptote
f1 f3 f2
−80
100 101 102 103 104 105 106 107 108
Frequency (Hz)
RE 1
ZE ≈ = (2.95)
jωRE CE jωCE
Using (2.92),
1
ZIN = + hie + (1 + hf e )ZE
jωCC
1 1 + hf e
= + hie +
jωCC jωCE
1 1 1 + hf e
= hie + + (2.96)
jω CC CE
The second term can be written as an effective capacitance formed by a series
CE
connection of CC and 1+hf e
,
1 1 1 + hf e
= + (2.97)
Cef f CC CE
which in turn is in series with hie resulting in ZIN .
CHAPTER 2. BJT AMPLIFIERS 55
VCC
RC
R1
CC1 CC2
Rs
vo
vs vi
R2 RE CE
CC1 ib ic CC2
b c
Rs hie hf e ib
ZIN vi RB RC vo
vs e
ZE
Cef f ib ic
b c
Rs hie hf e ib
vi RC vo
vs
e
In amplifiers that consist of several cascaded stages, there may be more than one
capacitance that determines the low frequency behaviour. The 3-dB breakpoint
can be examined independently and the overall 3 dB point is given by the highest
frequency. For example, in Fig. 2.32, the frequency breakpoints are f11 due to CC1
and CE1 and f12 due to CC2 and CE2 . The overall 3-dB breakpoint is due to f11
since it is the highest in this example.
CHAPTER 2. BJT AMPLIFIERS 56
Gain
CC2
CC1
3dB
CE1 CE2
f
f12 f11
(a) Cascaded CE amplifier (b) 3-dB breakpoints
Example: Consider the common emitter amplifier shown in Fig. 2.31 with the
following component values
IC = 5 mA
RC = Rext = 2kΩ RE = 1k Rs = 0
CC1 = CC2 = 10µF CE = 1000µF
Cbe = 100 pF Cbc = 3 pF
hf e = 100 rbb0 = 100Ω
0 IC
gm = ≈ 200mS (2.98)
VT
hf e 100
rb0 e = 0
= = 500Ω (2.99)
gm 0.2
At low frequencies, Cb0 e and Cb0 c can be neglected. The ac equivalent circuit
at low frequencies is shown in Fig. 2.33. At midband, the capacitances are short
circuits. The voltage gain can be obtained as follows:
vb0 e rb0 e 500
= = = 0.83
vs rb0 e + rbb0 500 + 110
vo 0
= −gm Rc ||Rext = −0.2(2000||2000) = −200
vb0 e
vo vo vb0 e
= = −200 × 0.83 = −167
vs vb e vs
0
vo
= 44.5 dB
vs
CHAPTER 2. BJT AMPLIFIERS 57
CE
CC1 1+hf e
rbb0 CC2
b b0 c
vs rb0 e 0 v 0
gm
vb 0 e be RC Rext vo
e e
0
CMI = (1 − K)Cb0 c = (1 + gm RL )Cb0 c = 201 × 3 = 603pF
where the CMO approximation is made since K 1. The total input capacitance
is
Ci = Cb0 e + CMI = 100 + 603 = 703pF
CHAPTER 2. BJT AMPLIFIERS 59
rbb0 Cb 0 c
b b0 c
vs rb0 e Cb 0 e 0 v 0
gm RC ||Rext
vb0 e be
e e
(a) Small-signal model
rbb0
b b0 c
vs rb0 e Cb0 e 0 v 0
gm RC ||Rext
vb 0 e CMI be CMO
e e
(b) Miller equivalent
Since f2 < f3 , the 3-dB breakpoint past midband occurs at f2 . Hence, the
amplifier bandwidth is
midband
20 log | vvos | (dB)
44.5
f (Hz)
f12 f11 f2 f3
(log scale)