A Highly Accurate Machine Learning Approach to

Modelling PVT Variation Aware Leakage Power in

FinFET Digital Circuits
Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas
Center for VLSI and Embedded Systems Technology (CVEST)
International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032
[email protected], [email protected], [email protected], [email protected]

Abstract—Due to the advent of deep sub-micron technolo- ing algorithms have proven to be efficient in mocking the
gies, statistical (in addition to temperature and supply voltage) behaviour when trained efficiently. Here, we propose two
variations aware estimation of leakages power has become machine learning techniques namely Polynomial Regression
prominent. Also, estimation of leakage currents at SPICE level
guarantees the most accurate results, however not feasible means and Artificial Neural Network models to appropriate the task
in high complexity ICs. This performs adversely for Monte-Carlo of SPICE, but computationally efficient than SPICE. The time
iterations for statistical analysis. In this paper we introduced complexity reduced by several order compared to SPICE and
an accurate machine learning technique to model statistical and with a reliable error rate of ≤ 1%.
operating variation aware estimation from Artificial Neural Net-
work and regression based Multivariate Polynomial Regression II. P REVIOUS W ORK
which exhibits innately faster computation and attained error
less than 1% for the targeted 16nm FinFET technology node Many techniques were proposed to model the leakage power
although model is black box for any technology. The accuracy of of the circuits. In [5], gate leakage estimation is done using
the proposed technique has been tested over several basic cells pattern independent probabilistic analysis. In [6], VHDL-based
and estimation of the complex circuits have been carried out technique to estimate leakage power of a design considering
utilizing the pre-modelled basic cells.
Index Terms—Machine Learning, Neural Networks, Polyno- the state-dependency of the leakage power is proposed. In [7],
mial Regression, Statistical Variations, Leakage Power, FinFET, pattern dependent steady-state leakage estimation technique
VLSI was proposed that accounts for major leakage components,
namely, gate, band-to-band-tunneling, and sub-threshold leak-
I. I NTRODUCTION
age using Newton Raphson Method. In [8], linear models
Due to relentless scaling of technology nodes beyond 22nm, are used for leakage estimation by taking number of gates
Complementary Metal Oxide Semiconductor (CMOS) circuits and inputs as inputs to the model. In [9], a transistor is
has got disadvantages like high power density and enormous modelled as the sum of current sources (SCS) using compact
leakage power [1] [2]. Many solutions have been proposed current model, which is used to calculate total leakage of logic
to enhance the performance or to replace CMOS devices. circuits. In [10], author explained the implementation of HDL
Fin Field Effect Transistor (FinFET) is one such solution [3]. model, which can calculate the gate tunneling, sub-threshold
FinFET is multi-gate device i.e. incorporates more than one and reverse junction leakages separately with good accuracy.
gate into a single device and thus have better electrostatic Authors in paper [4], designed model based on characterisa-
control over the channel [4]. Even then small variation during tion of voltages at internal nodes and also characterised the
fabrication can largely affect the device performance and ulti- leakage currents for single FET devices, inaddition authors
mately impact not only yield but also performance in circuits. explored the feasibility of statistical leakage estimation under
In addition, temperature and supply voltage variations always process variations. In [11], author proposed abstract models to
exist to make device unreliable due to external conditions. predict leakage and delay behaviours in FinFET digital cells,
SPICE level Monte Carlo analysis is a prevalent way to based on response surface methodology. In the paper [12],
analyze the robustness of circuit by randomly generating the author has developed a adjusted 2D model for 3D structure
parameters according to the distribution model. Although, of FinFET using gate under lap adjustment methodology to
large number of simulations from Monte Carlo analysis is speed up simulation time with compromise in accuracy up to
highly time consuming. SPICE guarantees most accurate re- 20%. In [13], surrogate models are generated based on two
sults and therefore can be used to compare results obtained machine learning models and used to calculate performance
from computationally efficient models. However, the genera- of standard cells. In [14], regression models are trained to
tion of reliable models which ensure high accuracy and high calculate leakages. In most of the above mentioned works the
computational efficiency is a challenging task. accuracy is compromised for time complexity or vice-versa.
One technique is to create a model which approximates the Therefore, we present a methodology which is trouble-free,
circuit behaviour and less time consuming. Machine learn- highly accurate and efficient in computation time.

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 III. S IMULATION S ETUP of process parameters have discussed in Section III. Voltage
In the proposed work, process parameters such as body and temperature are generated randomly between the specified
doping concentration (nbody), source/drain doping concen- range in Table I. Data is spread over a wide range and hence
tration (nsd), conduction band carrier concentration at 300 the outputs also distribute over a wide range. In general learn-
K temperature (nc0subn), physical oxide thickness (toxp), ing algorithms perform better by standardisation of the data
height of fin (hf in), intrinsic carrier concentration at 300K set. Standardisation can be also explained as mean removal
temperature (ni0subn), equivalent gate dielectric thickness and variance scaling. The standard score for a sample x is:
(eot), physical gate length (lg), thickness of fin (tf in) have z = (x − u)/s (1)
been considered referring to targeted High Performance 16nm
FinFET technology with ±10% variations at 3-sigma. In addi- where u is mean and s is standard deviation of the data. z
tion, a wide range (-55◦ C to 125◦ C) of temperature (temp) and represents standardised data.
±5% in supply voltage (VDD ) variations are also considered,
B. Data Organisation
as depicted Table I. All the simulation level characterization
have been carried out in HSPICE using Predictive Technology Data is divided into training and test data sets. This is done
Model-Multi Gate Transistors (PTM-MG) based on BSIM- in the ratio of 80:20 out of generated samples. Which implies a
CMG [15] [16]. part of generated data is used for validating the trained model
A hybrid method of sampling, which includes both Gaussian in terms of accuracy and generalisation factor.
and Latin Hypercube Sampling (LHS) is used inorder to C. Training Algorithms:
get better distribution of training data set. Latin Hypercube
1) Polynomial Regression: Polynomial Regression is a
Sampling technique is another simulation based reliability
form of regression analysis algorithm. Regression analysis
evaluation method. In this method, the domain of each random
is a form of predictive modelling technique which uses the
variable decomposed into interval of same probability. The
relationship between dependent (Y) and independent variables
number of intervals depends on how many samples would be
(X) to find best fit regression equation that can be used for
generated for each variable. One value from each interval is
predictions. If the relation is non-linear, we use polynomial
selected at random with respect to the probability density in the
regression to model Y as an nth degree polynomial equation
interval and to satisfy Latin Hypercube requirements. In this
in X. The nth order polynomial model can be represented as:
paper, we have confined the results reported to 16nm FinFET
cells. However, the model can be extended to further scaled
Y = a0 + a1 X + a2 X 2 + .. + an X n +  (2)
FinFET technology nodes and even to CMOS technology by
appropriately training the model. Y = a0 +a1 X1 +a2 X2 +a11 X12 +a22 X22 +a12 X1 X2 + (3)
TABLE I: Considered Process and Operating values (16nm is the polynomial model with two independent and one de-
FinFET Technology) pendent variable with emphasizing correlation of independent
Sr. Process Device Lower Nominal Higher
variables. Where a0 ,a1 ,a11 ,..,an are regression coefficients
No. parame- deviation deviation and  represents unobserved random error with mean zero.
ter Polynomial regression can fit wide range of curvature. Degree
1 nbody both nFet 0.97e+23 1e+23 1.03e+23 of polynomial is used according to the complexity of function.
and pFet
2 nsd both 2.9e+26 3e+26 3.1e+26 Using of more complex function for about linear or less
3 nc0sub both 2.765e+25 2.86e+25 2.955e+25 degree will leads to Over-fitting. Over-fitted model works very
4 toxp both 1.305e-09 1.35e-09 1.395e-09 accurate for training set but worse for samples out of training
5 hf in both 2.513e-08 2.6e-08 2.687e-08
6 ni0sub both 1.063e+16 1.1e+16 1.137e-16
set.
7 eot both 7.73e-10 8e-10 8.27e-10 2) Artificial Neural Networks: Artificial Neural Networks
8 lg both 19.33e-09 20e-09 20.67e-09 are inspired by the biological structure of neurons and their
9 tf in both 1.16e-08 1.2e-08 1.24e-08 working. ANNs are useful in diverse applications and efficient
10 Vdd both 0.76V 0.8V 0.84V
11 temp both -55 25 125 in accurately determining outputs even in conditions of large
input parameters and high degree of non-linearity. An ANN
consists of number of highly interconnected processing ele-
IV. M ETHODOLOGY ments which process information to state response of external
Two different kinds of machine learning approaches have inputs. Multi-Layer Perceptron (MLP) is the widely used ANN
been developed and compared. Fig.2 depicts the major steps structure [17]. MLP belongs to the feed-forward class of
involved in model development. Neural Networks. It used supervised learning technique called
Back Propagation for training. It has input layer, output layer
A. Data Generation and Pre-processing: and hidden layer which basically transforms inputs to outputs,
Data sets are generated using SPICE by considering in- shown in Fig.1. Each neuron consists of activation function.
puts as process parameters, supply voltage (Vdd ), temperature The purpose of activation function is to introduce non-linearity
(temp) and input signal of the respective circuit. Generation into output of neuron. It generally decides whether to activate

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a neuron or not by calculating weighted sum and adding bias at TABLE II: Architecture of ANN
each neuron. Number of nodes in input and output layers are Parameter Optimised
Architecture Feed forward MLP
Training Algorithm Back propagation
No. of hidden Layers 4
Neurons in each Hidden Layer 15
Activation Function for Hidden Layers logistic
Maximum Epochs 1000000

V. RESULTS AND DISCUSSION

As mentioned earlier, the data set is split into training and
Fig. 1: ANN structure testing sets in the ratio of 80:20 respectively. Test set is used
to validate the data. The comparison of results from model and
according to the number of inputs and outputs respectively.
SPICE for AND3 gate are shown in Table III for ANN and
Number of hidden layers and neurons in each hidden layer
polynomial regression. The values reported are for the sample,
are the parameters to be tuned. Optimised parameters of ANN
in which process parameters are at nominal and temperature
architecture suitable for training standard cells are shown in
,VDD at 80◦ C, 0.8V respectively.
Table II.
TABLE III: Comparison of AND3 Leakage Results between
D. Evaluation:
SPICE and both Models
R2 score is used to determine how well the model fits
Regression Model ANN Model
the data. It evaluates the scatter of data points around fitted Leakages SPICE
Model Error Model Error
regression function. R2 score is also called as determination Leak_000 9.034nW 8.67nW 4.0 9.08nW 0.51
coefficient. In addition, error is also calculated between sample Leak_001 9.63nW 9.05nW 6.0 9.72nW 3.55
Leak_010 9.67nW 9.07nW 6.2 9.72nW 0.52
results from SPICE and Model. R2 score is calculated from Leak_011 20.65nW 21.5nW 3.9 20.54nW 0.53
python library and error is calculated by Eq.(4): Leak_100 9.93nW 9.46nW 4.7 10.01nW 0.80
Leak_101 20.95nW 21.79nW 3.8 20.93nW 0.09
|SP ICEV alue − M odelV alue| Leak_110 21.25nW 22.12nW 3.9 21.41nW 0.93
error = ∗ 100 (4) Leak_111 5.184nW 3.12nW 3.9 5.21nW 0.50
SP ICEvalue
It is observed that artificial neural networks are more
suitable for training leakage power models than polynomial
regression. We observed that polynomial regression is less suit-
able for developing leakage model when trained for all input
pattern together in the respective circuit. However, the model
accuracy is high, if trained with one leakage combination.
The distribution of the data set results from SPICE is
compared with the distribution of outputs from ANN Model
by mean and standard deviation (Std. Div) values, which
depicts the accuracy for Monte Carlo analysis. In Table IV,
comparison of statistical aware leakage power are reported
for standard cells in Nano-Watts. Due to limited place and
to decrease fussiness, results listed only include for maximum
leakage. Although results are tested for other combinations for
all standard cells. It can be seen from Table IV, that mean and
standard distribution from SPICE and ANN Model are almost
equal.
R2 score of each standard Cell is reported for both models in
Table V. We can observe that for ANN, R2 score is between 99
to 100 which specifies that model is best fitted. For polynomial
leakages R2 score is comparatively less which specifies that
model is less fitted for those cells.
A. Modelling of Leakages in Complex Cells
The major advantage of this method is that, the results
Fig. 2: Flowchart for training Model for a Cell obtained by calculating leakages of complex circuits from pre-
characterised and pre-trained basic cell models also has only
infinitesimal error.

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 TABLE IV: Comparison of statistical aware leakage power ficial Neural Networks for the PVT variation aware estima-
Mean (µ) Std. Div. (σ) tion/prediction of the leakage power in VLSI digital circuits.
Standard cell Comb.
SPICE MODEL SPICE MODEL The proposed model works as a black box i.e. independent of
not leak_max 4.92 4.88 2.85 2.86
AND2 leak_max 19.57 19.49 10.42 10.54
technology node, computationally very efficient and exhibit
NAND2 leak_max 10.05 10.04 5.67 5.69 very good accuracy with a negligible error (≤ 1%). For future
NOR2 leak_max 9.84 9.76 5.69 5.55 work, we aim to develop modeling techniques incorporating
XOR2 Leak_max 4.42 2.49 4.41 2.48 the estimation/prediction of other performance figures (e.g.
NAND3 leak_max 15.39 15.36 8.48 8.39
AND3 leak_max 24.9 24.5 12.95 12.86 propagation delays), especially in complex circuits considering
NOR3 leak_max 14.76 14.81 8.55 8.54 all possible factors affecting targeted performances.
AO12 leak_max 24.5 24.4 13.0 12.8
AO22 leak_max 29.6 29.7 15.63 15.70 R EFERENCES
AO31 leak_max 29.8 29.8 15.61 15.50
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