ECE 401L COMMUNICATIONS LABORATORY

LAB 5: Frequency Modulation and Demodulation

1. Objective

Students will construct and test a frequency modulation FM circuit using a monolithic waveform
generator chip (XR-205). Students will design, construct and test an FM discriminator circuit. A
phase locked loop demodulator will also be constructed and tested.

2. Procedure

2.1 FM using the XR-205 monolithic waveform generator

You are to generate a tone modulated FM signal using the XR-205. This is a standard FM
modulation circuit capable of generating moderate modulation indices, with carrier frequencies
up to 4 MHz. As such, multistage frequency/index multiplication is often used prior to
broadcasting FM signals generated with the XR-205, though you will not be doing multiplication
as part of this exercise. Construct your circuit according to the circuit diagram provided in the
schematic labeled “Figure 2. Test Circuit for Split-Supply Operation and AM/FM Modulation.”
Note that switches S1 and S4 are closed and switches S2 and S3 are open (actual switches are not
needed). The capacitor C0 is a timing capacitor and it should be set to 400/f0, where f0 is the
carrier frequency (use C0=1.64nF for f0=244 kHz). The resistor RS impacts the frequency
deviation and should be set to 1k Ohm for our application. Let the capacitor in front of RS be
0.1uF. The other capacitors labeled 0.1 are in fact 0.1uF. Note that crossing wires in the circuit
diagram with no dark dot at the intersection are NOT connected. The TA will provide
potentiometers as needed.

1) With no modulation, adjust your circuit for an “optimally clean” sinusoidal carrier
output at approximately f0=244 kHz. Adjust your carrier amplitude to about 1.5Vpp.
Note that the output is taken between pins 1 and 2 across the 15k Ohm resistor, not
between pins 1 and ground. Also, note that the 5k Ohm variable resistor Rj adjusts
the waveform shape.

2) Apply a sinusoidal message input at the node labeled “FM INPUT” relative to
ground. Using a message frequency of f m = 10 kHz , generate FM signals with
modulation indices of β = 1, 2.4 and 5. To do this, change the amplitude of the
message (which changes the modulation index) and observe the FM signal in the
frequency domain. Determine the number of significant sideband peaks you would
expect for the three values of β using the 1% rule (i.e., find n such that
| J n ( β ) |> .01 ). Then simply adjust the message amplitude until you observe the
correct number of sideband peaks for a given β.

3) Record the modulation signal amplitudes required to give β = 1, 2.4 and 5, and
provide appropriate frequency domain plots.

4) The XR-205 can also be used for AM modulation. Keeping f m = 10 kHz , generate
an AM signal with a modulation index of one and provide time and frequency

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 domain plots. To do so, apply the message input to the node labeled “AMPLITUDE
MODULATION INPUT”.

2.2 FM demodulation using a discriminator circuit

You are now to build a discriminator demodulator circuit as shown in Figure 1. Using
1
f 0 (Hz) = (1)
2π LC
and
1
BW (Hz) = , (2)
2π RC
choose L1 and C1 so that the BPF is centered at f 0 =23.2 kHz and has a bandwidth of
approximately BW=3.34 kHz. You will be using a carrier on the order of 10-20 kHz.
Note that for the BPF to operate as an approximate differentiator circuit in our frequency range,
the low frequency –3dB cutoff must be greater than the carrier frequency. Design your envelope
detector to demodulate a 100 Hz (a time constant of 1 ms may work well in this application). Let
the DC blocking capacitor Cb=0.1uF.

1) Demonstrate your working circuit to the TA. Try using a 4V peak-to-peak FM signal
with a frequency deviation of approximately 5 kHz. First, test the differentiator part
and verify that and AM signal is observed at the output. Adjust the carrier frequency
(approximately 15 kHz) and R1 as needed to get the desired output. Then test and
adjust your envelope detector. Remember that the envelope voltage coming into the
envelope detector must be greater than the turn-on voltage of the diode.

2) Capture the input waveform, the output of the differentiator, and the output of the
envelope detector. These waveforms should illustrate the successful operation of the
various stages of your discriminator.

3) Describe how changing the bandwidth or Q of your BPF will affect your system (you
need not change your circuit here, just qualitatively discuss the effect varying Q will
have on your output).

Figure 1: FM discriminator circuit.

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University of Dayton, Fall 2003
2.3 FM demodulation using a phase locked loop (PLL)

Next, you are to demonstrate FM demodulation using the LM565 PLL chip described in Page 6-
72 of the attached datasheets. Construct the circuit shown in Figure 1 of Page 6-75 in the
attached datasheets. Power the chip with +/- 10V. The required design formulas are given at the
top left of Page 6-75. For these calculations use f0=10 kHz, R1 approximately 4000 Ohms, and
Vcc=10V. Note that C2 is part of an internal single pole filter with a bandwidth of
BW = 1/(2π C2 3600) . We want a bandwidth of 3 times the message frequency (here we use a
message frequency of 100 Hz) so that the FM output is passed.

Use a signal generator to produce a 1V peak-to-peak FM signal with a carrier frequency of 10

kHz and a sinusoidal message at 100 Hz. Set the frequency deviation to about 1 kHz and adjust
as needed to get the desired output of the PLL.

1) Observe the VCO signal at pin 4 of the LM565. Capture a waveform.

2) Observe the demodulated output at pin 7. Vary the message frequency for maximum
output. Capture the waveform. Note that your demodulated output at this point will
likely be very noisy. A LPF can be used to clean up the signal in practice.

3) Now, starting with your PLL demodulator locked on the carrier, vary the carrier
frequency and determine the maximum and minimum values over which your PLL
circuit will remain locked. This is known as the lock-in range. Compare your result to
that predicted by the formula on page 6-75 in the Signetics handout, using your
design parameters for C1, R1 and C2.

4) Starting with your PLL demodulator initially out of lock (i.e., the carrier frequency
set too high and/or too low) vary the carrier frequency and determine the maximum
and minimum values at which your PLL circuit will lock on to (i.e., “capture”) the
FM signal. This is known as the capture-range. Again compare this to the value
predicted by the formula provided on page 6-75 in the Signetics handout, using your
circuit design parameters.

2.4 Spectra of wideband FM signals

Finally, you are to verify the results of Stremler Example 6.3.1, p. 308 (See attached sheet). Using
your signal generator, generate an FM signal with a triangle wave message and observe your
result in both the time and frequency domains. Use any convenient carrier and message
frequencies, though the carrier should be much larger than the modulation frequency. Start off
with a small modulation index and observe the line spectrum that results. Now increase the
modulation index (i.e., here do this by increasing the amplitude of the triangle wave message) and
observe the resulting spectrum. As the modulating index gets larger, your observed spectrum
should approach that given in Figure 6.8 (Stremler). Does it? Capture a few spectra for the
report.

3. Lab Write-up

Create a Word document organized according the numbered procedure sections. Provide screen
captures with detailed descriptions and answers to the questions posed in the lab next to the
appropriate procedure section. Bonus: What is the history of the number zero?

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