STB33N60DM2 STMicroelectronics
STB33N60DM2 STMicroelectronics
STB33N60DM2 STMicroelectronics
STW33N60DM2
N-channel 600 V, 0.110 Ω typ., 24 A MDmesh™ DM2
Power MOSFET in D²PAK, TO-220 and TO-247 packages
Datasheet - production data
Features
Order code VDS @ TJmax. RDS(on) max. ID
STB33N60DM2 650 V 0.130 Ω 24 A
STP33N60DM2 650 V 0.130 Ω 24 A
STW33N60DM2 650 V 0.130 Ω 24 A
Applications
Switching applications
Description
These high voltage N-channel Power MOSFETs
are part of the MDmesh™ DM2 fast recovery
diode series. They offer very low recovery charge
(Qrr) and time (trr) combined with low RDS(on),
rendering them suitable for the most demanding
high efficiency converters and ideal for bridge
topologies and ZVS phase-shift converters.
Table 1: Device summary
Order code Marking Package Packing
STB33N60DM2 33N60DM2 D²PAK Tape and reel
STP33N60DM2 33N60DM2 TO-220 Tube
STW33N60DM2 33N60DM2 TO-247 Tube
Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 9
4 Package information ..................................................................... 10
4.1 D²PAK package information ............................................................ 10
4.2 D²PAK packing information ............................................................. 13
4.3 TO-220 type A package information................................................ 15
4.4 TO-247 package information ........................................................... 17
5 Revision history ............................................................................ 19
1 Electrical ratings
Table 2: Absolute maximum ratings
Symbol Parameter Value Unit
VGS Gate-source voltage ±25 V
Drain current (continuous) at Tcase = 25 °C 24
ID A
Drain current (continuous) at Tcase = 100 °C 15.5
IDM(1) Drain current (pulsed) 96 A
PTOT Total dissipation at Tcase = 25 °C 190 W
dv/dt(2) Peak diode recovery voltage slope 50
V/ns
dv/dt(3) MOSFET dv/dt ruggedness 50
Tstg Storage temperature
-55 to 150 °C
Tj Operating junction temperature
Notes:
(1) Pulse width is limited by safe operating area.
(2) ISD ≤ 24 A, di/dt=900 A/μs; VDS peak < V(BR)DSS, VDD = 400 V.
(3) VDS ≤ 480 V.
Notes:
(1)When mounted on 1 inch² FR-4, 2 Oz copper board.
2 Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 5: Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
Drain-source breakdown
V(BR)DSS VGS = 0 V, ID = 1 mA 600 V
voltage
VGS = 0 V, VDS = 600 V 1
Zero gate voltage drain
IDSS VGS = 0 V, VDS = 600 V, µA
current 100
Tcase = 125 °C
IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V
Static drain-source on-
RDS(on) VGS = 10 V, ID = 12 A 0.110 0.130 Ω
resistance
Table 6: Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 1870 -
Coss Output capacitance VDS = 100 V, f = 1 MHz, - 87 -
pF
Reverse transfer VGS = 0 V
Crss - 2 -
capacitance
Equivalent output
Coss eq.(1) VDD = 480 V, VGS = 0 V - 157 - pF
capacitance
RG Intrinsic gate resistance f = 1 MHz, ID= 0 A - 4.5 - Ω
Qg Total gate charge VDD = 480 V, ID = 24 A, - 43 -
VGS = 10 V (see Figure 19:
Qgs Gate-source charge - 9.8 -
"Test circuit for gate charge nC
behavior" and Figure 23:
Qgd Gate-drain charge - 21 -
"Switching time waveform")
Notes:
(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Notes:
(1) Pulse width is limited by safe operating area.
(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
δ=0.5
0.2
0.1
10 -1 0.05
0.02
Zth= K*Rthj-c
δ= tp/Ƭ
0.01
Single pulse tp
Ƭ
10 -2
10 -5 10 -4
10 -3
10 -2
10 -1 t P (s)
Figure 4: Safe operating area for TO-220 Figure 5: Thermal impedance for TO-220
K
δ=0.5
0.2
0.1
10 -1 0.05
0.02
Zth= K*Rthj-c
δ= tp/Ƭ
0.01
Single pulse tp
Ƭ
-2
10
10 -5 10 -4 10 -3 10 -2 10 -1 t P (s)
Figure 6: Safe operating area for TO-247 Figure 7: Thermal impedance for TO-247
3 Test circuits
Figure 18: Test circuit for resistive load Figure 19: Test circuit for gate charge
switching times behavior
Figure 22: Unclamped inductive waveform Figure 23: Switching time waveform
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
0079457_A_rev22
5 Revision history
Table 14: Document revision history
Date Revision Changes
16-Oct-2014 1 First release.
Document status promoted from preliminary to production data.
Updated title and features in cover page.
Updated Table 2: "Absolute maximum ratings", Table 4: "Avalanche
02-Nov-2015 2
characteristics", Table 5: "Static", Table 6: "Dynamic", Table 7:
"Switching times" and Table 8: "Source-drain diode".
Added Section 2.1 Electrical characteristics (curves).
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