Elektor (Nonlinear - Ir) 1976-04 - Text
Elektor (Nonlinear - Ir) 1976-04 - Text
Elektor (Nonlinear - Ir) 1976-04 - Text
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contents elektor april 1976 - 403
elektor april 1 976 — 407
sei.eKTnr
CMOS
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complementary -metal-oxide-semi-
conductor (CMOS) with the nanosecond
capability of emitter-coupled-logic on
afterburner = the same board. Power supply require-
ments vary, too, drive capabilities are
L0CM0S never the same, and so on.
And now LOCMOS has arrived ....
This article takes a look at the Before we look at the latest develop-
ments in greater depth, let’s define
latest developments in logic
precisely what we mean by the terms
circuit technology and explains we use.
the advantages of LOCMOS.
Two basic technologies
Today's problems in logic design In semiconductor technology, the
Not long ago, the designer had a rela- transistor, that tiny chip of crystalline
material which amplifies or switches
tively simple choice between available
logic families to determine what speeds
now a 25-year-old
electrical current, is
were available, and at what cost in invention that began the solid-state
revolution. Although still widely used as
power. In the last two or three years
many new logic families have appeared, a discrete component , it is giving way to
with overlapping specifications, making the integrated circuit in which many
it much harder to decide which family
transistors, as well as diodes and other
comes closest to satisfying a given set of circuit elements are batch-fabricated on
requirements. a single silicon chip in a series of photo-
In the past, for high speed applications lithographic and diffusion steps.
the choice was emitter-coupled logic There are two fundamental processes
(ECL) with gate propagation delays of for fabricating ICs. These are:
one to three nanoseconds; the power • bipolar
dissipation was about 30 mW per gate. • metal-oxide-semiconductor (MOS).
For industrial control systems and for
peripherals of small computers, standard Bipolar processes
7400 transistor-transistor logic (TTL) Currently the most popular, the bipolar
was the best; 10 ns delays were tolerable process is one of two fundamental
and 10 mW per gate power dissipation processes for making integrated circuits.
presented no problems. There was a A bipolar IC is made up of layers of
great deal of flexibility and both small-
silicon with differing electrical charac-
and medium-scale ICs were readily avail- teristics. Current flows between the
able.
For low power, where speed was not
important, the designer normally chose
74L, a low-power family that dissipated
around one milliwatt per gate but could
seldom be pushed faster than about Figure 1 . Cross-sectional view of a MOS field-
30 ns. With the knowledge that 74H was effect transistor.
always there, for faster designs that
would tolerate more power the designer Figure 2. Schematic symbols for MOS tran-
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layers when a voltage is applied to the
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junction or boundary between the
layers.
Metal-oxide-semiconductor (MOS)
processes
The second fundamental process for
fabricating ICs is metal-oxide semi-
• PMOS
The oldest MOS circuit technology
uses a channel of P-type material,
where the flow of current is made up
of positive changes. PMOS now
accounts for most MOS volume. Be-
cause the action in a MOS circuit is
near the surface, contamination that
would be minor in a bipolar device
caused serious problems in the early
days of MOS.
• NMOS
N -channel MOS, where the flow of
current is made up of negative
charges, is just now moving into pro-
duction. It is two to three times
1
selektor
elektor april 1976 — 409
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Figure
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5 ... 11. LOCMOS manufacturing
faster than PMOS circuits, but manu- Unlike bipolar devices in which per-
facturing is harder to control than formance depends on the interaction
PMOS. These problems have now of two types of charge carriers, holes
been overcome. and electrons, field-effect transistors
are unipolar devices, i.e., operation is
• Complementary MOS (CMOS) basically a function of only one type of
In monolithic ICs using bipolar tran- charge carrier, holes in P-channel devices
it has not been possible to
sistors, Flip-Flop and electrons in N-channel devices.
numerous advantages of
exploit the Toggle Fre- Early models of field-effect transistors
complementary-symmetry circuits used a reverse-biased semiconductor
because conflicting technological fac- junction for the control electrode. In
tors currently mitigate against the MOS field-effect transistors, a metal
fabrication of optimized NPN and control gate is separated from the semi-
PNP bipolar transistors on the same conductor channel by an insulating
substrate. However, the complemen- oxide layer. One of the major features
tary-symmetry circuit advantages can of the metal-oxide-semiconductor
be harnessed in ICs by integrating structure is that the very high input
compatible P-channel and N-channel comparatively immune to variations in resistance of MOS transistors (unlike
enhancement-type MOS field-effect temperature. that of junction-gate-type field-effect
transistors on a monolithic substrate transistors) is not affected by the
to create an IC that is as fast as an Basic principles of MOSFETs polarity of the bias on the control (gate)
NMOS circuit but consumes very electrode. In addition, the leakage
little power. The basic building block of CMOS currents associated with the insulated
CMOS circuits, in configurations which logic circuits is the complementary control electrode are relatively unaf-
encompass both logic and memory, are pair MOS inverter consisting of a pair fected by changes in ambient tempera-
excellently suited to use in digital cir- of N-channel and P-channel enhance- ture. Because of their unique properties,
cuit applications and are characterized ment mode, insulated gate field-effect MOS field-effect transistors are
by their micropower quiescent oper- transistors (FETs) utilizing metal gate particularly well suited for use in digital
ation, moderately fast propagation electrodes. switching applications, as well as in
delay, excellent noise immunity, large Field-effect transistors combine the linear voltage amplifiers and voltage-
fanout capability, and operation from a inherent advantages of solid-state controlled attenuators.
single power supply over a wide voltage devices (small size, low power con- The operation of field-effect devices can
range (see Table I). The characteristics sumption, and mechanical ruggedness) be explained in terms of a charge-
of CMOS logic and memory circuits are with a very high input impedance. control concept. The metal control
i
electrode, which is called a gate, acts bias voltage is applied to the gate of an therefore the stand-by power is practi-
like a plate of a capacitor. A
charge N-channel enhancement transistor, cally zero. Other advantages of CMOS
placed on the gate induces an equal but electrons are drawn into the channel circuits compared with ordinary MOS
opposite charge in the semiconductor region beneath the gate. If sufficient circuits are the immunity to fluctu-
layer, or channel, located beneath the voltage is applied, this channel region tions in the supply voltage or in the in-
gate. The charge induced in the channel changes from P-type to N-type and put voltage. The sensitivity to input
can then be used to control the conduc- provides a conduction path between the voltage fluctuations is low because the
tion between two ohmic contacts, N-type source and the N-type drain input voltage at which the circuit
called the source and the drain, made to regions. (In a P-channel enhancement changes over from one logic state to the
opposite ends of the channel. transistor, the application of negative other is equal to about half the supply
The MOS type of field-effect transistor bias voltagedraws holes into the region voltage, while the actual transition takes
uses a metal gate electrode separated below the gate so that this channel place over a very small range of input
from the semiconductor material by an region changes from N-type to P-type voltage. It is also easy to make a CMOS
insulator. Like the P-N junction, this and again provides a source-to-drain circuit compatible with other logic
insulated-gate electrode can deplete conduction path.) circuits such as TTL.
the source-to-drain channel of active
carriers when suitable bias voltages are The CMOS inverter Standard CMOS
applied. However, the insulated-gate The CMOS inverter, shown in figure 3 All these advantages would make CMOS
electrode can also increase the conduc- works like this. With a positive supply transistors very suitable for use in
tivity of the channel (enhancement) voltage Vdd, if a positive voltage Vi is integrated circuits, were it not for the
without increasing steady-state input applied to the input (logic state *1’), fact thatwith the same tolerances the
current or reducing power gain. then the N-channel transistor becomes packing density is smaller than for
The two basic types of MOS field-effect conducting while the P-channel transis- ordinary MOS transistors.
transistors are the depletion type and tor does not conduct. The output volt- Protective guard bands surround separ-
the enhancement type. All CMOS cir- age is then zero (logic state ‘0’). If the ate MOS devices, tunnels, wells, and
cuits are of the enhancement type. In input voltage is now made zero (‘0’), diodes or combinations of MOS devices
this type, the gate must be forward- the P-channel transistor becomes which are interconnected through com-
biased to produce active carriers and conducting and the N-channel transistor mon diffused regions for the purpose of
permit conduction through the channel. is switched off. The output voltage is preventing leakage. All P-channel
No useful channel conductivity exists at now Vqd (‘1’). The two MOS transis- devices, tunnels, and diodes must be
either zero or reverse gate bias. tors therefore behave as switches, and surrounded by a continuous N guard
Because MOS transistors can be made to the current in the circuit is determined band which also serves as a tunnel to
conduction (N-
utilize either electron
by the very small leakage current of the help conduct current from the external
channel) or hole conduction (P-channel), switched-off MOS transistor. The cur- supply voltage Vdd across the N-type
two distinct enhancement-type MOS rent has a larger value only momentarily, substrate to every P-channel device tied
field-effect transistors are possible. during switching when both transistors to the external supply. Similar heavily
An N-channel enhancement-type MOS are on for a short period. doped P* guard bands surround all N-
transistor (reversal of N-type and P-type channel devices, tunnels, and diodes to
I
regions would produce a P-channel Advantages of CMOS circuits help conduct current from the external
enhancement-type transistor) is nor- The advantage of a CMOS circuit is that ground supply Vss across the P-well to
l
mally non-conducting until a sufficient the channel resistance values can be every N-channel device tied to ground.
voltage of the correct polarity is applied small and hence the switching speeds Contact to the N-type substrate may be
!
to the gate electrode. When a positive high, and the quiescent current and made through the N guard band and
.
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returned to the Vdd
the P-well substrate may be made
pad; contact to
speeds at increased but still moderate bined with a special technique for
maximum of the concentration profile
is located about 1 .5 pm beneath the
power consumption. In fact, CMOS has applying P-type wells. This process
surface. This approach prevents para-
a lower propagation delay -power product can be controlled in such a way that
sitic N-type channels from forming
than any other logic family. By oper- LSI circuits can be made.
ating just below TTL speeds, medium- In the LOCOS technique, a silicon
along the LOCOS oxide. With this
and large-scale integrated CMOS pack- substrate coated with a layer of
is
method there is no need to use guard
ages can perform the same logic func- silicon nitride,which is used as a mask bands.
tions as TTL
but with the added in a later oxidation of the silicon when After the P-diffusion the rest of the
advantages of lower power-supply re- a silicon-dioxide layer is formed at the nitride is removed, and a thin oxide
quirements, high noise immunity, and places where the nitride has been layer is formed thermally. A poly-
lower costs. removed. Most of this ‘LOCOS’ oxide crystalline layer of silicon is then
However, being composed of comp- sinks into the silicon and gives good applied. Next the poly crystalline
lementary structures, CMOS circuits separation between regions of different layer is doped with phosphorus to make
require an additional device per gate in- doping. It takes up far less space than it an N-type conductor, and a pattern is
put over other MOS structures as well the conventional isolation diffusion. etched in it for the electrodes and a part
as an additional isolation region. Conse- We shall now describe the process used of the interconnection pattern (figure 7);
quently, they are only about a third as making CMOS circuits by the
for the doping is necessary to give a low
dense as other MOS devices, even LOCOS technique — the ‘LOCMOS series resistance to the conductors and
though they are smaller than most technology'. The starting material is a hence a high switching speed.
412 — elektor april 1976 selektor
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The next step in the process is to to go low through the on resistance of
produce P-type sources and drains by the device. If both inputs are high, both
boron diffusion at previously etched N-channel devices go on, in effect
openings in the oxide layer (figure 8). halving the on resistance and making the
The gates and the LOCOS oxide serve output impedance (and hence propa-
as self-aligning masks. Since these elec- gation delay) a function of input
trodes are small the stray capacitances variables. Similarly, the P-channel
are small,which also helps to give a devices are switched on by low signals;
high switching speed. i.e., when both inputs are low, conduc-
After the boron diffusion a thin oxide tion from the supply voltage, Vdd> to
is again formed on these regions. The the output will occur.
N-type sources and drains are next Now, since the P-channel devices are in
produced in a similar treatment, with series, their chip area must be enlarged
a phosphorus diffusion (figure 9). so that their on resistance will decrease
A silicon-dioxide layer is then deposited and hold the high impedance of the out-
pyrolitically, and openings are etched in put within specification. And, as the
this to allow contact between the number of gate inputs increases, even
electrodes and the interconnection larger P-channel devices are required,
pattern (figure 10). causing severe variations of the output
Finally, a layer of aluminium is applied impedance with input patterns to VsS-
by vacuum evaporation and the inter- For example, in unbuffered CMOS, the
connection pattern is formed in this by two-input NAND gate as shown in fig-
etching (figure 1 1 ). ure 1 6 interchanges parallel and serial
transistor gating to achieve the dual
Improved packing density with logic function. The change in output
LOCMOS resistance moves to the P-channel tran-
sistors connected to Vdd, while the
Conventional metal gate CMOS is shown
N and P guard
in figure 12. Here, the
N-channel devices, being serially con-
bands surround the P- and N-channels nected, must be increased in size.
respectively. Needless to say. this sensitivity of
In figure 13, silicon gate CMOS in- propagation delay to input pattern can
creases the performance due to gate cause all sorts of mysterious system
self-alignment and reduced capacitance, problems — for example errors may
,
but the required guard bands limit the occur only with certain data patterns.
savings in area. Older designs, therefore, have several
disadvantages:
The result is a highly improved packing
density and a higher internal speed. An • Since logic transistors are also
output
additional advantage of silicon gate devices, theymust be large enough to
processes is the inherent facility of supply output drive current.
having two isolated layers (polysilicon
20 full
• Output impedance (and hence
and aluminium) for interconnection. It LOCMOS propagation delay) is a function of
6
can be seen that the LOCMOS process input logic conditions (speed is
,
is a very attractive one for large-scale / pattern sensitive).
integration. • Output transition time is a function
LOCMOS technology combines a silicon t, of input transition time.
gate with local oxidation to reduce the • Noise immunity is not as good as
s
chip area, as shown in figure 14, silicon theoretically possible.
CM OS
dioxide replacing the guard bands.
Because the LOCOS grows into the bulk
L
of the silicon, the contact holes can i 0.1 «si
LOCMOS uses low impedance
overlap the LOCOS without fear that
0 buffers
there will be a short circuit to the
To minimize any pattern sensitivity of
underlying substrate. This reduces the
02 04 06 08 1 propagation delay and to standardize
necessary diffusion area, thereby reduc-
delay and output drive, the new oxide-
ing the drain capacitance. The self- mo-» time Ivtl
isolated design concept adds an output
alignment of the diffusions also makes
buffer stage to the gate configuration
any special clearances between the bl- Figure 18. Typical transfer characteristics of
(figure 7). This technique actually re-
1
almost independent of input rise time. and it also improves noise immunity
diffusions superfluous.
because the increased voltage gain
Figure 20. LOCMOS output rise time is results in nearly ideal transfer character-
Disadvantages of older gate almost independent of input fall time. istics. The high voltage gain of greater
designs than 10,000 also provides significant
Figure 1 5 illustrates a conventional, Figure 21 Comparison of transfer character-
.
pulse shaping, since output transitions
istics of TTL and LOCMOS.
unbuffered two-input NOR gate. One N- are independent of input rise and fall
channel transistor, connected to the
supply voltage, Vss, will conduct when Buffering provides the following
either input is high, causing the output advantages:
k
. :
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• standardized low impedance outputs
• propagation delay is less dependent Table II
Propagation delay
LOCMOS d.c. fanout is almost unlim-
ited. Fanout is therefore limited by
propagation delay effects.
Propagation delay depends on load
capacitance; it is strongly influenced by
supply voltage; and it is affected by
ambient temperature, but less so than
TTL. Power supply requirements The transient power dissipation effects
To determine the propagation delay LOCMOS is specified over an operating of internal capacitance and current
• Start from basic data sheet numbers. Vdd range of 3 to 15 V. This intro- spiking may be lumped and are given in
• Derate for capacitance load over duces cost saving possibilities unavail- data sheets. Figure 22 shows the power
15 P F. able with other logic forms. LOCMOS dissipation per gate against input fre-
• Derate for minimum power supply can operate from batteries, unregulated quency for different supply voltages.
voltage including regulation and power supplies, and available non-logic The effects of additional load capaci-
ripple effects. tance, beyond that shown in the data
power supplies. The minimum Vdd is
• Derate for maximum ambient tem- 3 V, or higher as required for noise sheets may be calculated by:
perature. immunity or propagation delay. The
load power = CL(VDD) 2 f.
maximum Vqd is 1 5 V, or lower as
Noise immunity determined by power dissipation. Both where Cl = external load capacitance
The immunity of
superior noise minimum and maximum values of Vdd and f = frequency of operation.
LOCMOS comes from its almost perfect depend on the interface to other logic The total power, therefore, will be:
transfer characteristic, as shown in fig- forms.
ure 2 1
total power = Idd •
Vqd + internal
Good transient dissipation
noise immunity is typically 45% Power dissipation
of the supply voltage. Noise immunity (from data sheet) +
The total power dissipation may be CL(VDD)'f.
is expressed by :
determined from:
VNL = VlLmax Vol max total power = quiescent power +
Interface to TTL
VNH = VOHmin Vih min transient power
Two constraints must be satisfied when
LOCMOS has higher noise immunity AC power is made up of 3 components interfacing to another family.
than any other logic family. One 1 . Charging and discharging of internal 1 Input voltage levels to LOCMOS
.
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For standard TTL driving LOCMOS,
27-Channel ultrasonic
• Vih(MIN) for LOCMOS must be
3.5 V
• v OH(MIN) for standard TTL is 3.5 V remote control unit
typical at vcc = 5 V.
Therefore standard TTL will typically Motorola have just announced a CMOS
driveLOCMOS directly. 27-channel ultrasonic transmitter and a
For CMOS driving TTL, all LOCMOS companion NMOS receiver which
outputs drive 400 pA at 0.4 V over the together form a complete remote
full temperature range. control system for television and other
All inputs are protected against static applications. The system is used in
discharge, as shown in figure 23. conjunction with a 22-button keyboard
Due to the resistor being in series with to give a viewer remote control of all
the input protection diodes, an input the user-variable functions of a tele-
signalfrom a low impedance source can vision receiver.
be applied in the absence of supply volt- When used in conjunction with a tele-
age without damaging the diodes. vision receiver, the ICs allow remote
Summary of LOCMOS selection ofup to 12 channels, three
60-step analogue channels, automatic
Advantages of CMOS
• very low power switch-on when channel is selected,
• wide supply voltage range automatic muting of sound during
• high noise immunity. channel change and switch-on, two
auxiliary outputs, dual switching
LOCMOS offers in addition:
Philips’
• LOCOS techniques - reproducible outputs (PAL or SECAM) and a strobe
high performance output for use with on-screen displays.
• buffered, standardised outputs sim- Used with a 22-button keyboard, an
external amplifier and transducer
plify design
• best noise immunity together with a battery and about a
• decreased sensitivity to capacitive dozen discrete components, the CMOS
loading MCI 4422 transmitter forms a complete
• ultrasonic transmitter for the remote
a gate packing density twice as great
as conventional CMOS control of television receivers. When
• higher speeds none of the push-buttons is actually
pressed, the IC automatically reverts to
Standard range a shut-down state in which power
consumption is reduced to such a low
The Philips standard range of LOCMOS
was unnecessary to provide an
level it
devices already consists of some
on/off switch.
60 types. Motorola are also starting
production, with 5 types available so The MCI 4422 generates up to five
Figure 22. Variation of power dissipation for output frequencies which are
far.
a typical gate with input frequency for dif- transmitted in an output sequence
N. V. Philips Gloeilampenfabrieken ferent supply voltages. which lasts for four time periods.
Elcoma Division During the final slot or period, one
P.O. Box 523, Eindhoven - the Nether- Figure 23. All inputs are protected against
of two frequencies may or may not be
lands. static discharge.
transmitted.
A non-integral variable frequency
divideris used to derive the output
Motorola Ltd.
Semiconductor Products Division.
York House
Empire Way
Wembley, Middlesex.
microprofessor elektor april 1976 — 415
That's life.
micropnofessor with the things. They are available in or two - certainly if the present-day
Valves or tubes are distinctly passe' - quantity and diversity, they are rela- blizzard of data sheets is anything to
except where they are used for control- tively cheap, and they will do the job go by.
ing the flow of fluids or gasses. Schools for him - if only he knew what job that We are waiting for the person who can
and technical colleges have switched was. show us how to use the things properly:
over to transistors. A brave step, but by There’s plenty of hardware, but very the microprofessor.
now the price of TTL ICs has dropped little software. Or, to put it differently: And we are waiting - with a mixture of
to an all-time low (a 7400 costs the we are being presented with a solution, fearand anticipation - to see what new
same as a BC107), COSMOS prices are and now we have got to start looking technology lies in store for us next year.
still falling rapidly, and both TTL and for a problem.
COSMOS may well be laid by the heels Of course, we have some idea of what
in the near future by one ormore of the kind of problem to look for, because
other new technologies (Low Power we know that a microprocessor can be
Schottky TTL, LOCMOS, I 2 L, etc ). programmed to perform quite complex
And now: over the horizon looms the functions.
microprocessor .... In the more ‘domestic-consumer-
Nearly all self-respecting manufacturers oriented’ field one could consider an on-
of semiconductors have designed a sys- board controller for fuel-injection, anti-
tem, improved it, and are now trying to skid braking etc. in cars; electronic
force it down the throat of the poor games; musical instruments; a program
consumer. selector cum commercials rejector for
System prices have dropped within the radio and TV.
last year from over £ 150 to nearer However, none of these ideas seems to
£ 20 (one manufacturer is offering the come anywhere near the true capabili-
MPU itself at £ 5-10,000 up), and they ties of the system, although everyone
will probably go down even further in feels that some really worth-while
the near future. applications must exist.
This would be very nice, if only the A (welcome!) avalanche of applications
prospective buyer knew what to do is to be expected within the next year radio-tv-electronic 1975, Nr. 11).
Remote control is becoming the done
The preamplifier and control I
thing.
amplifier described in this article
For toy cars, television sets, model I
controls) can be used as a small link can be wireless (i.e. without wires) I
ure 2).
In conventional circuits (figure 1), the
input selector switch is usually at the
input to the control amplifier (B). In
that case, one of the inputs that it can
select is a disc preamplifier (A) that
raises the output level of a magnetic
cartridge to that of the other input i
supply arrangements for the control Figure 1. Block diagram of a conventional supply common. This means that five-
preamplifier / control amplifier system. The
amplifier are complicated enough — it core screened cable would be required.
preamplifier is only used for magnetic car- However, four-core screened cable is
would be even more inconvenient if a
buffer stage had to be included between more readily obtainable — it is used for
the volume and tone controls. The the connection from a tape recorder to
Figure 2. Block diagram of the Preco. All
solution chosen is to use a low-value inputs arefed via attenuators to the pre- a main amplifier system — so some way
volume control potentiometer, suitable amplifier amplifier (B) is
(A); the control must be found for eliminating one more
for direct connection to the tone con- connected to the preamplifier via four-core of the connections. The solution chosen
trol circuit, and put the buffer stage at screened cable. is to use a ‘phantom’ power supply.
the input side of the volume control. To put it simply - a more detailed
The buffer stage can now be combined description will follow later — the col-
with the preamplifier and powered in lector resistors and output coupling
the normal way. A further advantage capacitors of the final stage of the con-
of this system is that the long cable is trol amplifier are mounted on the pre-
now driven from a low-impedance amplifier board. This means, in effect,
source. that the positive supply and the output
However, the system is now beginning of the control amplifier can both run
to depart quite drastically from standard down the same core; a separate connec-
practice. Referring back to the block tion for the positive supply is no longer
diagram, figure 2: the fact that the required.
buffer stage and preamplifier have been The description of the system given so
combined (A) means that all input far may give the impression lhal the
signals must be fed to this combination. circuits are quite complex and sophisti-
The input selector switch must precede cated - which should in turn mean that
the preamplifier, so the latter must be
capable of coping with both high and
low level signals. To do this, it will need
additional switching inside the feedback
loop. This complication can be turned
into a further advantage: the circuit
can be optimally matched to any normal
input source, by selection of fixed
resistors and/or equalisation networks.
In this way, an extremely good signal-
to-noise ratio and a very large overload
margin can be achieved.
The next point to be considered is the
actual link to the remote control
unit (B). Since the complete control
amplifier is to be included in this hand-
held unit, one would normally require
two screened cores for the input, two
screened cores for the output, and two
wires for supply positive and common.
If a little care is taken in the design,
the screen of the cable can be used for
2
418 — elektor april 1976
3b
the system is either critical or expensive Preamplifier Figure 3. Circuit diagram of the Preco (one
or both. In actual fact, only six transis- channel shown). The preamplifier (figure 3a)
is described in this article; the control ampli-
tors are used per channel for the com- The basic design requirements for the
fier (figure 3b) will be discussed in part 2.
plete system (preamplifier and control preamplifier have been outlined above.
amplifier), see figure 3. To recap briefly: all input signals are
When so few components are used for to be fed to this unit, and it is to be
a fairly complicated system, it is to be matched to the input sources by using
expected that several compromises are fixed attenuators at the input and
incorporated in the circuit. Performance further switching in the feedback loop;
will normally suffer. In actual fact, the furthermore, it must have a low-im-
specifications of this system are so good pedance output to drive the long cable
(table 1) that it is definitely a good and the tone control circuits.
choice even for those who are not The amplifier used will need something
looking for remote control facilities: more than two transistors! The require-
there is no reason why both units should ments are: plenty of open-loop gain,
not be mounted in one box for use as a even when looking into a low-impedance
conventional system. load, and the ability to supply enough
elektor april 1976 — 419
current into that load. A fairly heavy- fier matched to any given signal source
is gain. C4 gives a further roll-off.
duty output stage is required. by means of the input attenuator and A high-sensitivity ‘flat’ input (e.g. micro-
Figure 3a shows the circuit. R1 to R5 a switch in the feedback loop. It is now phone) is obtained by omitting the
are the input attenuators, followed by time to study exactly how this is done. input attenuator and increasing the
the input selector switch (Sla). This In position 1 of the input selector switch, closed-loop gain. As an example, con-
will be discussed in detail further on. only the basic feedback network is in sider the situation with the input
The input transistor (Tl) is a PNP type, circuit. This consists of two sections: selector switch in position 2. R3 is
and it is set at a fairly low collector R1 1 R12, R13, C4 and C5 on the one
,
replaced by a wire link, and R4 could
current (100 pA). In this way, excessive hand, and R10 with C3 on the other. be, say, 3k3 for a low input impedance.
Basic star-delta transformation of the Simultaneously, R14 will be switched
low-frequency (y) noise is avoided and
first section shows that this is equivalent into circuit via Sib. If a value of 3k3
to a 130 k resistor between the emitters is chosen for R14, the gain will be set
an extremely high signal-to-noise ratio
is attainable. of Tl and T3, loaded at T3 emitter by by the simulated 1 30 k resistor and the
The voltage across R7 and R9 is the an extra 42 k resistor to supply com- simulated 42 k parallel with R10 and
base-emitter voltage of Tl, i.e. approxi- mon. The influence of the capacitors is R14 - i.e. approximately 2k9. The gain
mately 550 mV. Since the current neglected for the moment. Neglecting becomes approximately 45, giving a
through these resistors is practically C3, R10 (68 k) is connected in parallel sensitivity of 4 ... 5 mV.
identical to the current flowing through with the simulated 42 k resistor, giving Very low values for R14 (below about
R8, the total voltage drop across R9, 330 fl) will provide very high sensi-
a total resistance of 68 k/42 k »» 26 k.
R7 and R8 is also fixed: approximately This means that the basic gain is approxi- tivities - and audible noise. A better
3 V. The collector current of this tran- mately 6. solution in this case would be to use a
sistor is set by the value chosen for R20, This basic gain is sufficient to prevent microphone transformer.
since the voltage drop across this resistor common-mode overloading of the first Position 3 of the input selector switch
must also be approximately 550 mV. transistor: the nominal input sensitivity is for use with magnetic cartridges.
The value given (R20 = 5k6) sets the is approximately 30 ... 40 mV. High R5 is used to set the correct input im-
collector current at 1 00 pA. This current level input sources are switched via pedance. The feedback network now
flows through the DC feedback path suitable input attenuators; the values includes R15, R16, C6, C7 and C8.
(R1 1 and R12) and gives a voltage drop shown (R1 = 100 k, R2 = 10 k) will These components give two of the equal-
across these resistors of approximately give a sensitivity of approximately isation time constants; the third is
8.5 V. This means that the DC voltage 400 mV. Capacitor C2, in conjunction determined by this network in conjunc-
at the output (emitter of T3) is fixed at with R7 and R9, provides an HF bypass tion with Rll, R12, R13.
approximately 3 + 8.5 = 11.5 V. This and a step roll-off in the open-loop R15 sets the sensitivity of this input;
setting is relatively independent of the value given (270 fl) gives a nominal
supply voltage variations. input sensitivity of 5 mV, suitable for
The ‘heavy-duty’ output stage consists most ‘high-output’ cartridges. A lower
of transistors T2, T3 and T4. T2 and T3 value for R15 (down to 68 S2) gives a
can be considered as one ‘super-transis- higher sensitivity (to 1.25 mV), and a
tor’ and T4 is a gyrator-choke which higher value (up to 470 S2) gives a lower
supplies the DC collector current, so sensitivity (to 9 mV).
ic rhythm
generator
In the Summer Circuits Issue The rhythm generator of an electronic very limited. With a basic time element
(July/August 1975) a brief percussion unit is that section of the of one quaver the bar could be divided
unit which generates control pulses to into 8 elements, with a semiquaver
description was given of the trigger the various instrument sound 1 6 elements, with a demisemiquaver
SGS IC rhythm generators type generators, in predetermined sequences 32 elements. The smaller the basic time
M252 and M253. This article deals appropriate to the preselected rhythm. element, the more subtle are the
with the applications of these IC's It does not, of itself, generate the rhythms that can be produced.
instrument sounds, so a complete per- The total number of time elements in a
in greater detail, including their
cussion unit must contain a rhythm bar depends on the number of elements
connection to simple instrument
generator plus instrument generators to per beat, and the number of beats per
generator circuits suggested in the produce the required noises. bar. Thus in 4/4 time, with 8 elements
SGS application notes, and also The rhythm generator must be capable per beat there would be 32 per bar, but
interfacing with the 'Minidrum' of producing pulses at various points in in 3/4 time there would be only 24.
described in Elektor Nos. 2 and 3. the bar, to trigger the tone generators in The counter in the rhythm generator
the appropriate sequence. It follows, must be capable of being programmed
A more sophisticated rhythm therefore, that the rhythm generator to count up to the appropriate number
generator, constructed from must contain a clock pulse generator that the time signature demands before
standard logic IC's, is planned for and counter capable of dividing the bar resetting to commence the next bar.
a future issue. down into basic time elements. Each The division of a bar in 4/4 time into
beat in the bar will consist of a whole time elements is shown in figure 1.
number of these basic time elements. Table 1 gives 3 examples of rhythms
Obviously, the more time elements being divided up into basic time el-
there are to each beat then the more ements.
complex are the rhythms that can be The basic block diagram of a rhythm
produced. For example, in a rhythm generator is given in figure 2. It consists
with a 4/4 time signature there are four of a counter, count logic and a read
beats to the bar. If the beat was divided only memory. The count logic is pro-
into only one basic time element one grammed by the rhythm selection input
crotchet in length, then the rhythm code, and determines the number that
instruments could be triggered at only the counter reaches before resetting to
four points in the bar, and the number zero. The ROM is addressed by the
of rhythm patterns available would be rhythm selection input code and the
output of the counter. Thus as the
counter counts through its sequence the
contents of all the addresses through
which it counts are read out in se-
quence. If the content of a particular
address is a logic ‘1’ then when the
counter reaches that address a ‘1’ will
appear on the appropriate instrument
output line, and the instrument will be
triggered at that point in the rhythm
sequence. The positive-going edge of the
output from the memory determines
the instant at which the instrument is
triggered. If two successive outputs of
the memory were ‘1’ (i.e. the instru-
ment was triggered twice in quick suc-
cession) then normally the output
would initially go to ‘1’ and stay there
for two time elements, so the second
triggering edge would not occur and the
instrument would be triggered only
1
422 — elektor april 1976 ic rhythm generator
once (see second waveform in figure 3). width of the reset pulse is dependent on selected. The number of the rhythm
To avoid this the output of the memory the mark -space ratio of the clock signal. selected is fed into the rhythm select
is reset to zero after the instrument has The output of the first divider is used to inputs in binary, is decoded and used to
been triggered, and should the next clock a further 5 stage counter (divider) control the multiplexer that routes the
output from the memory be ‘1’ there consisting of master slave flip-flops. This appropriate group to the output logic
will be a second positive-going edge to can count up to the maximum of 32 re- and drivers.
re-trigger the instrument (see third quired to divide a bar of 4/4 time into The counter reset logic is controlled by
waveform of figure 3). 32 elements. The outputs of the divider a rhythm detector, so that where the
are decoded and used to address the rhythm is in 3/4 time (or 6/8) the
IC Rhythm Generators ROM, which in this case is simply a counter is 24 clock pulses.
reset after
Figure 4 shows the internal block dia- matrix. The inputs (rows) of the matrix For rhythms in 4/4 or 2/4 time the
gram of the M252 rhythm IC, the pin are connected to the 32 outputs of the counter isallowed to achieve its
configuration of which is given in fig- decoder, while the outputs (columns) maximum count of 32.
ure 5. Pulses from the clock pulse are arranged in 1 5 groups of 8 outputs Pin 7 of the IC is a combined input/
generator are fed into a phase generator each. The 15 groups correspond to the output connection. As an input it func-
that produces two out -of -phase, non- 15 rhythms that the IC will produce, tions as an external reset to return the
overlapping pulse trains, which are re- and the 8 outputs correspond to the counter to zero from any point in the
quired to control the following divider 8 instrument outputs that the IC can bar. As an output it provides a down-
stage. This divider produces the reset drive. Which of these 15 groups is beat signal to indicate the first on-beat
pulses that reset the memory outputs actually connected to the instrument in the bar. The input and output func-
back to zero after each readout. The outputs is dependent on the rhythm tions may be isolated by means of a
rhythm generator elektor april 1976 — 423
Table II
diode in the external reset line. In the storage matrix of the M253 has a ca-
case of time signatures other than 3/4 or pacity of 32 x 8 x 12 = 3072 bits, as
4/4, the downbeat output can be used opposed to the 32 x 8 x 15 = 3840 bits
to trigger a monostable, the output of of the M252. The M253 is capable of
which then provides the actual down- producing only 12 basic rhythms, as
Table IV
Table III
2
DATA INPUTS t
r Rise time 100
t a Decay time 2 100
V|h Input 1 -level v ss -is vss /is
EXT. RESET
1 at 50% of the maximum amplitude.
2
Vin Input 1 V SS -1-5 between 10% and 90% of the maximum
-level v ss < amplitude.
V|i_ Input 0-level VQG Vss -4.1 <
DATA OUTPUTS
Rq
output Vss -1 V <Vo 250 500 Table V
impedance <Vss
Vqh Output 1 -level “ 1 mA V SS -0-5 Absolute Limit Values
l|_
vss
ILO Output leakage Vj = V|H 10 UK
v o = Vss-iov Vqq Supply voltage 3 -20 V . . +0.3 V
T = +25°C Vj Input voltage 3 -20 V +0.3 V
amb. . .
3 related to voltage
Vss
1 .
programming in straight binary using
4 single pole on-off switches. This is
the simplest method in terms of
circuitry, but the codes for each
rhythm must be remembered or
noted down.
2. diode-matrix encoder from l'-bf-15
to binary (figure 8). The rhythm is
selected by a single pole 16-way
switch (can be rotary or 15-way
dependent latch pushbutton bank).
This is encoded into binary by the
diode matrix. Using a rotary switch
the 1 6th position would not be
connected, so all inputs would be
held high by the 100 k resistors and
no rhythm would be selected. Using
a 15-way pushbutton bank, the same
would be achieved with no push-
button depressed.
The diodes used are type 1N914
(1N4148). Any other type with
reverse breakdown voltage greater
but it is important that the value of below Vss. >t is equally important that than 20 V and reverse leakage cur-
VgG with respect to Vss does not lie it should never become more positive rent less than 1 //A at 18V would
outside the range specified in table 5. than Vss, even by a small amount, as also be suitable.
otherwise the surrounding negative areas 3. l-of-15 encoder using logic IC’s
For example, if Vss >s +20 V then Vgg
on the chip will be discharged and the (figure 9).This is the circuit of a
must not be below 0 V. If Vss is 0 V decoder using TTL logic IC’s. With
circuit will not function reliably. Should
then Vgg mu st not be below —20 V. no switches depressed the inputs of
the voltage exceed Vss by more than
Where the rhythm IC is to be combined 300 mV then the IC will almost cer- allthe 8-input NAND-gates are high,
with other logic circuits requiring a tainly suffer permanent damage the outputs are low, so the outputs
positive supply voltage it is common of the are high and no
inverters
Clock Generator
Figure 12 shows the circuit of a clock
generator and downbeat indicator using
I
TTL IC’s and discrete components. An
IC type 7400 can be used for the four
2-input NAND-gates. The frequency of
|
the clock generator can be adjusted be-
tween about 3 and 30 Hz by means of
the 25 k potentiometer. The downbeat
indicator is a monostable consisting of a
NAND-gate and transistor, and a second
transistor that drives the indicator lamp
or LED. The downbeat indicator lamp
lights for about 350 ms on the first beat
of each bar. The reset switch grounds
[
the inputs of two NAND-gates, which
inhibits the clock output and puts a ‘1’
on the clock and reset inputs. The TTL
IC’s receive their supply voltage from
Vcc ( + 5 V) and ground (0 V).
A second approach to the design of a
clock generator and downbeat indicator
is shown in figure 13. Here the clock
generator for
instruments, using a CMOS-gate
i
as
element instead of
by means of a 5 -bit binary input instead A third possibility is to use two custom enclosed in dotted boxes are portions
of the four-bit input required for one programmed IC’s to increase the maxi- of figures 24, 25 and 26. The 741 op
IC. The most significant bit is used to mum number of time elements per bar amp is the instrument output amplifier
select one 1C or the other by controlling to 64 as shown in figures 20 and 2 1 In
,
. of figure 24 (IC3), while the two
the external reset input, and the other these two circuits the first half of the NAND-gates form part of the clock
four bits select the rhythms in the bar is played by the first IC, the second generator and reset circuit in figures 25
normal way. For the M253’s rhythm IC being inhibited by the Q output of and 26 (N4 and N5).
selection is simply a question of pro- the flip-flop, which holds the external The rhythm generator is usually con-
viding a programming switch with reset input high. The downbeat output trolled by series connected contacts on
of the first IC then clocks the flip-flop the pedalboard of the organ, and the
24 positions instead of 12.
elektor april 1976 — 429
ic rhythm generator
sounds only C2, C3 and C5 need to be The amplitude of the maraccas sound
varied to alter the frequency of oscil- builds up relatively slowly and then
lation. The values of these components decays. The reason for this is that C16
for the different instruments are given is charged up fairly slowly via D5 and
in the parts list. PI varies the damping R23, so T4 turns on gradually. When
of the oscillator and hence the rate at the control pulse ends Cl 6 discharges
which the instrument sound decays. through R24 into the base of T4, and
The outputs of the instrument gener- T4 gradually turns off as the voltage on
ators are fed out through mixing re- Cl 6 falls.
sistors (R8) to the output amplifier IC3
The snaredrum makes use of both an
in figure 24 (point B). The values of R8
instrument oscillator and a noise signal.
are different for the various instruments The snaredrum control pulse is fed to
to obtain the correct relative amplitude the base of T1 via C25, and is also fed
for each instrument. to the oscillator via D2. The same
The white noise for the second class of oscillator is also used for the high
instruments is derived from the reverse- bongos, so D2 provides isolation to
biased base-emitter junction of an NPN prevent the high bongo control signal
transistor (T2 in figure 24). This junc- from triggering the snaredrum noise
tion exhibits avalanche breakdown (like frequencies, so the gain of this stage circuit.When the control pulse turns on
a zener diode) at between 5 and 9 volts increases with frequency, which means Tl, C6 is charged via D3 and R10;T3 is
in most cases, and, like a zener diode, it that the high frequency components of then turned on by the voltage on C6,
generates noise. the noise signal are amplified more than allowing the noise signal on C7 to be
The manner in which the noise signal is the low frequencies. When the control amplified by T3. The collector re-
switched depends on the particular pulse finishes, the voltage on C14 sistor R13, LI and C9 form a filter to
rhythm generator
26,32
220 £2
3k9
2M2
22 k UuUiUiii
10k
220 k
100 k
LED LED
DUS DUS
CD401 CD401
M252AA M253AA
Miscellaneous:
Single Single
pole pole
normally normally
open open
(SPST) (SPST)
Single -
pole
normally
(SPST)
- Single
pole,
change-
(SPDT)
Single Single
pole. pole,
(SPOT) (SPDT)
. .
Hie output amplitude can be controlled rhythms selected by inputs 7-13 of the manual TAP and the trigger inputs of
by P6, and P5 functions as a treble cut M253, while the woodblocks would be the instruments.
control to modify the tone of the switched in for the remaining rhythms.
instruments. This is a question of personal taste, Construction of complete
The lower section of figure 24 is the however. percussion section
power supply for the percussion section. The p.c. board layouts for the rhythm
It makes use of an IC voltage regulator
Alternating Bass
generator section of the percussion unit
and two simple series stabilizers, and A found on the M253 but not
facility
are given in figures 31 (M252) and 32
requires little explanation. on the is the output BA (pin 3)
M252 (M253). The instrument section board
for control of the alternating bass of an
layout is given in figure 30. Although
Clock generator and rhythm IC electronic organ. A circuit for this
the CMOS gates for the instrument
Figure 25 shows the circuit of the clock purpose is shown in figure 27. The
oscillators are mounted on this board
generator and downbeat indicator as organ bass note and a note a fifth higher
the frequency-determining components
used with the M252, while figure 26 are fed into the circuit. Whenever a
are mounted on small ‘daughter-boards’
shows a similar circuit for the M253, the BD control pulse appears, but no BA
(see figure 29 and photograph A) so
only difference between the two being control pulse then the fundamental is
that they can easily be changed for ex-
the rhythm selection switching. The allowed through to the output. When
perimentation with different instrument
clock generator and downbeat mono- both the BD and BA control pulses
sounds. The connection points A to E
stable in these circuits make use of occur simultaneously then the fifth is
on the daughter-boards correspond to
CMOS NAND-gates. PI adjusts the allowed through to the output. The
similar connection points on the
clock frequency. result is alternating fundamentals and
mother-board. Similarly, the instrument
The stop switch SI is arranged so that fifths on each beat of the bass drum.
outputs of the rhythm section board
the first beat of the bar occurs immedi- line up exactly with the corresponding
ately the switch is opened. If the switch Interfacing with minidrum inputs on the mother-board, so these
J is closed than the reset input is held Although the foregoing circuits may be two boards may be mounted side-by-
high by N4 and the output of the clock assembled as a complete automatic per- side and joined by short links.
I (N5) is also high. When the stop switch cussion section, some readers may wish As a final note, a
special 16-position
is released the reset condition is re- to interface the rhythm section of this switch with
binary coded outputs is
moved and the clock generator immedi- system with the ‘Minidrum’ described in available for rhythm
selection using the
ately gives a negative-going pulse, Elektor Nos. 2 and 3, rather than using M252. This is not, so far as we are
starting therhythm sequence the instruments described here. This can aware, available in the U.K. but it may
The downbeat indicator consists of a easily be done as the rhythm section is be obtained from a German firm -
monostable (N2 and N3) to lengthen on a separate p.c. board from the Komp, Ing-Buro H.G. Hullen, 4019
the short downbeat pulse available from instruments. Mannheim, Heinrich-Spath-Str. 12-14.
the downbeat output of the 1C so that it Interfacing with the minidrum is ac-
K
can be seen, together with a driver stage complished using the circuit of fig-
(N1 and Tl) to switch the LED 1 ure 28. A simple diode OR
gate permits
S14 is provided to give a choice between either manual or automatic operation. References:
snaredrum and woodblocks. Normally One such circuit is required for each ‘Minidrum ’ Elektor 2, p. 208, and
the snaredrum would be used for Minidrum instrument. The gates are Elektor 3, p. 428; SGS application notes
rhythms 1-9 of the M252, and those connected between the outputs of the for M252 andM253.
elektor april 1976 Polaroid tir
Polaroid
timer
As owners of Polaroid cameras will temperatures below 13“C the exposure
The development of Polaroid films
know, Polaroid film is temperature sen- control must be turned two marks 1
towards ‘lighten’ and the ‘cold-clip’ pro- time for colour prints and indicates
vided with the camera must be used. At the required setting of the exposure
control, and if the cold-clip is re-
quired.
Operation of the timer is quite simple.
The basic timer is a 555 in the mono-
stable mode. With S2 in the colour pos-
ition it provides a 60 second interval.
Temperature control is provided by a
NTC thermistor which forms part of a
bridge circuit. The bridge is balanced by
PI at 21°C. Any increase or decrease in
temperature will cause an imbalance
which amplified by op-amp ICla. The
is
L
; : n
Parts list
Resistors:
R1,R6,R15 = 10 k
R2 = 100 k
R3 = 15 k
R4 = 6k8
R5-18k
R7,R8,R9,R1 1 = 680 12
R10 = 4k7
R 1 2 - 820 J2 (or 270 12. see text)
R13 « 1k2 (or 1k5, see text)
R14 = 1 k
PI - 12 k (fixed) or 22 k (preset), see
text
P2 = 470 k (preset)
P3 1 M (preset)
Capacitors:
Cl = 100/i/10V
C2 = 100
Semiconductors:
IC1 = LM324
IC2 = 555
D1 . D4 = LED
. .
construction is concerned - the choice 1. The complete ciri lit diagram of the - cool the NTC to 10° C (50°F);
will depend on how much of a perfec- - P2 until the correct develop-
adjust
tionist the constructor is! ment time is achieved: 90 seconds
First the values of R12 and R13 must Figure 2. The p.c. board and component
for film type 87 or 45 seconds for
layout (EPS 9379).
be chosen. These depend on the type of film type 107.
monochrome film chosen The advantage of method B is that it
- for type 87, R12 is 820 £2 and R13 compensates for any tolerance in the
islk2; nominal value of the NTC (this is why
- for type 107, R1 2 is 270 Q. and R13 PI was added in the first place!). How-
is lk5. ever, a brief calculation shows that a
Adjustment now proceeds as follows: 10% error in NTC value will give ap-
First set the correct development time proximately 18% error in the develop-
for colour: ment times, which is within the latitude
- set S2 in position ‘colour’; allowed by the film. Even 20% spread in
- adjust P3 so that the development NTC value gives ‘only’ 36% spread in
time is 60 seconds. the times, corresponding to an error of
Now set the monochrome timing. For some 2°C (4°F) in the temperature
this there are two possibilities, an easy measurement. A final word on the
way (A) that should be accurate enough construction: the NTC must be at ambi-
for all normal use, and a more difficult Temperature is important: The temperature ent temperature, of course, so it should
procedure (B) for the perfectionist. We of the film and the film holder at the time of not be mounted inside the (closed) box.
idvise procedure ‘A’ , . . . processing has an important effect on the The power supply can be very simple:
A: the easy way: picture, although the film may be exposed the circuit draws relatively little current,
- use a fixed 12 k resistor instead of successfully at any temperature. When the
and any supply voltage from 9 to 15 V
temperature is below 70° F (21 °C), process
PI; can be used - without need to readjust
- temporarily, replace the NTC by a for longer than the standard time, as indi-
cated in the chart, below. Processing below
the trimmers. M
fixed 18 k resistor;
35° F (2°C) is not recommended.
- set S2 position ‘monochrome’;
in
- adjust P2 to give a development time
of 90 seconds (for film type 87) or
45 seconds (for film type 107);
- replace the NTC resistor. TIME (sec.)
I: forperfectionists only: TEMP. Type Type
- heat the NTC to 21°C (70°F); C. F.
87 107
24° 75°
- set S2 in position ‘monochrome’ and 30 15
21° 70°
adjust PI until the correct develop- 45 22.5
18° 65°
ment time is achieved (45 seconds 60 30
10° 50° 90 45
for film type 87 or 22.5 seconds for
7° 45° 120 60
film type 107), the output ofICIa
|
|
should be almost exactly half the
supply voltage - the NTC bridge is in
o
[
balance
ditional components required are a
part of this article dealt
Fixed Voltage Regulators transformer, fuse, bridge rectifier and
The f irst
are intended to
reservoir capacitor. To reduce output
These regulators IC’s
with universal, variable voltage supply capability
provide a stabilised noise and ripple, and to eliminate any
regulators, and in particular the the minimum of external tantalum
with tendency to r.f. instability
723. The second part discusses components. Consequently there are no capacitors Ca and Ce may also be
the three-pin, fixed voltage 1C connections for frequency compen- included. Having chosen the appropri-
regulators. These were first sation, current limit or voltage adjust- ate IC for the intended
application,
ment, all these functions being per- calculation of the other component
introduced as 'on-card' stabilizing
formed on the chip. The number of pins values is relatively simple using a
little
for TTL circuits, and thus the first required therefore reduced to three,
is arithmetic and guesstimation.
generation of these IC's were 5 V input, output and common.
regulators. Now whole families of The regulators operate on the principles
three-pin regulator IC's have been already outlined in the discussion of the Component Values
introduced with a wide choice of 723. They almost invariably incorporate As an example let us consider the case
foldback current limiting. The newer of an audio preamplifier requiring a V]
preset output voltages. This article
types also incorporate thermal shut- power supply of +24 V at 60 mA. From
deals with applications of these down, which turns off the output tran- Table I the LM 78L24 appears to be
regulators, and also with ways of sistor if the chip temperature
becomes suitable, as this will provide +24 V at up
+16S°C). The most to 100 mA. The TO-5 package is
the
extending their voltage and excessive (usually
recent types have so-called “safe area most suitable as this can easily be fitted
current capability.
limiting’,which prevents ihe output with a cooling clip. The pinout of this
stage from going outside its safe
power given in figure 9 (1). It is
device is
dissipation. worth noting at this point that manufac-
The range of devices available is now turers have not agreed on a pin connec- s
and the output voltages
quite large, tion standard for the use of packages into
commonly from +5 to
available range
:
voltage regulator applications, as can be i
+24 and -5 to -24 volts at currents seen from the different pin connections a
from 100 mA to 3 A. Tables 1 and II to the TO-5.TO-3 and TO-220
packages n
give some idea of the range of types in figure 9, so beware!
available, although they are necessarily Referring to Table I it can be seen that _
incomplete and will probably be out of the input voltage range of the IC
lies
date by the time this article is in print, between 27.5 and 38 V. The choice of
place
since new developments are taking an input voltage too close to the lower [
limit should be avoided, as a drop
continuously. in the
three-pin regulators is sim- across the IC, and hence the power dissi-
The use of
and the two circuits for pation. will be high. A reasonable
plicity itself,
positive negative regulators are
and compromise is to choose the mean of
part 2 given in figures 1 and 2. The only ad-
the two voltages, which in this
case is .
elektor april 1976 - 437
across R2.
Now V 2 = )R 2 where I q is the
(I
q + I,
But Ii
equation:
+ (iq +
iqK 2
In the circuit of figure 4, for example, a in figure 5. This makes use of an op amp quiescent current of the IC used. Hence,
particular specimen of the TBA 62 5 connected as a voltage follower. The in figure 5 the minimum output voltage
was used which had a quiescent current output voltage of a follower is, of is shown as 7 V. The maximum input
of 10 mA. Thus to give 10 mA through course, equal to the input voltage, so voltage, and hence the maximum out-
Hi, R1 is 500 J2, so 470 was chosen the voltage at the slider of P 1 is the same put voltage, is limited by the supply
as the nearest preferred value. With PI as the voltage at the ground pin of the voltage which may safely be applied to
set at minimum
the output voltage is regulator. This voltage is 5 V below the the op amp, in this case 36 V.
the nominal 5 V
output of the IC. With output voltage of the regulator, so the Although the examples given in figures
|P at maximum 20 mA flows
resistance voltage at the slider of PI is also 5 V 3, 4 and 5 used 5 V regulator IC’s, there
1
through it so 5 V
is dropped across P 1 below the output voltage. With PI at is no reason why other types should not
|The total output voltage is thus +10 V, minimum the output voltage of the op be used.
so the adjustment range is from +5 to amp is zero, so the stabilised output
+ 10 V. voltage is simply the nominal output
Using this circuit the foldback current voltage of the regulator. With PI at Increased output current
limiting is still operative, as the graph in maximum 5 V is dropped across R2. The output current capability of fixed
figure 4 shows. The foldback character- The maximum output voltage is thus: voltage regulators can be increased by
istic is shown for normal 5 V operation the use of external power transistors,
of the IC (R2 = 0), and for R2 = 200 S2. though the principle of operation is'
It can be seen that at the higher output different from that used with the uni-
voltage the current folds back to a R1 isincluded to sink a portion of the versal type of regulator. Figure 6 gives
slightly lower value. The maximum out- quiescent current from the ground pin an example of how this is achieved. At
put current of around 130 mA is unaf- of the regulator, since the source or sink low output currents the total output
fected, although 10 mA of this is, of current of the 741 is 10 mA maximum. current flows through the 3 f2 resistor
course, lost through R 1 Note that to achieve zero volts at the and through the regulator IC (neglec-
Another method of increasing the out- ground pin of the regulator the op amp ting quiescent current). When the
put voltage of fixed voltage regulators, must be able to sink the total quiescent current reaches about 200 mA
the volt-
which does not require knowledge of current of the regulator IC. This may not age drop across the resistor is about
the quiescent current of the IC is shown always be the case, depending on the 0.6 V, so the external power transistor
integrated voltage regulators
440 — elektor apr
Practical Suggestions
When using IC voltage regulators there
arc a few constructional points that
must be noted.
1. All conductors carrying substantial
currents (input, output, earth return)
must be as thick and as short as poss-
board tracks).
ible (this applies to p.c.
2. Earth loops must be avoided.
3. All common (ground) connections 5. Adequate cooling must be provided.
must be taken to the reservoir capaci- Finally, figure 9 gives pinouts of the
more common packages used for IC volt-
Principle of operation
Figure 2 shows a simplified internal
circuit of the UAA input 170. The
circuitry consists of a of high- series
gain differential input
amplifiers. One
of each of these is commoned and con-
nected to the input terminal via an
emitter-follower buffer stage Tl. The to full-scaleis divided into 1 6 steps. Figure 1. Showing the difference between 3
other input of each differential amplifier To avoid the necessity for 16 output single point and thermometer type indication tl
is connected to a point in a potential pins the 16 LED’s in the display are not
Figure 2. Simplified internal circuit of th
divider chain consisting of equal re- driven individually but are arranged in
UAA170, showing the input circuitry aroF
sistors R, which is fed from a reference a 4 x 4 matrix controlled by row and
voltage applied to T2. The differential column outputs A to D and E to H.
output drive circuitry. f
amplifiers thus operate as analogue volt- By enabling the appropriate row and
age comparators. Whenever the input column output one LED at a time can
voltage exceeds the reference voltage be lit. This is controlled by logic circuits P
on a particular comparator the output represented by the box in the centre of b
of the comparator will change state. the diagram. The logic circuitry is not
T
The UAA 170 contains 16 such com- shown in detail as it is rather compli-
parators, so the input range from zero cated, and anyway it has little bearing
in i
on the input and output parameters of full-scale reading of the meter. For input Figure 3. Practical circuit of a LED voltmeter
ion the IC. voltages in excess of the voltage at this using one UAA170 IC.
Brightness Control
The output current delivered to the
LED display, and hence the brightness,
can be altered by a brightness control
connected between pins 14 and 16 of
the IC. This may take the form of an
LDR or phototransistor to adjust the
display brightness to suit ambient
lighting conditions, or it may be a
manual control such as a potentiometer.
A fixed resistor between pin 15 and
ground adjusts the control character- For correct operation of the display Figure 5a. Board layout for figure 3, withf foe
istics of the brightness control. all four LED’s connected to one of the provision for automatic or manual brightness^
control and fixed or variable input andj.
pins 2, 3, 4 or 5 should have the same
reference voltage attenuators (EPS 9392-3)^
electrical characteristics. f0
Practical Applications
If the UAA 180 with its thermometer- LED 1 rs
The complete circuit of a LED voltmeter Figure 5b. p.c. board layout for display
type scale is used then the LED’s should of figure 3 (EPS 9392-41.
isgiven in figure 3. This has phototran-
also be chosen for similar brightness,
sistor brightness control and, with the
as otherwise the appearance of the Figure 6. p.c. board and component layoutwo?
component values shown is intended for for a '270° meter' suitable for use with a rev* he
display will be degraded.
an input voltage range of 3 - 18 V. counter circi it (EPS 9392-1). woi
Various alternative possibilities are
shown accompanying the main figure, Extension to30 LED's
b) and c) show brightness control using For applications requiring greater resol-
LDR and manual brightness control with ution than can be provided by 1 6 LED’s
Note that the UAAI70 and the
a potentiometer respectively, d) and e) the circuit may be extended using two UAA 180 are not pin-compatible!
shown in figure 4. Both IC’s The circuits andp.c. boards given
show a voltage divider for the
fixed IC’s as
here are only suitable for the
reference voltage and an adjustable one receive the same input voltage at pin 11,
using presets respectively, f) shows a but the reference voltages are arranged UAA 170.
fixed input attenuator, while g) shows so that the first IC operates over the
a preset input attenuator. input voltage range of say 0 - V/2, and
©GO
2D ao
O-io 50 -o
BO
RPM IDO
i,h the second IC over the range V/2 - V, first IC extinguishes. This is ac- FM tuning scale (see Elektor 9 page 134)
“'where V is the full-scale input voltage, complished by having the reference volt- and a scale in a 270° arc, intended
'rrlt is necessary to omit the last LED age on pin 12 of the second IC lower specifically for use as part of
J a car rev
from the display of the first IC and the than the voltage on pin 13 of the first counter. (Note that this circuit is not a
lay
first LED from the display of the IC. complete rev counter! It is merely a
second IC, otherwise for voltages below The voltage difference between these replacement for the original analogue
V/2 the first LED of the second IC two points can be adjusted by PI. pointer instrument - Ed).
jutwould always be lit, and for voltages should
PI be adjusted so that D18 The printed
revabove V/2 the last LED of the first IC circuit boards and compo-
begins to light as DI5 extinguishes.
nent layouts for the linear scale meter
would always be lit. For this reason There should be no blind-spot where
are given in figures 5a and 5b. The IC
ly 30 LED’s may be used, not 32. both LED’s are extinguished, nor should
means that D16 and D17 should and its associated passive components
is two or more LED’s be fully lit at the
be part of the although they
are mounted on a separate board from
t scale, same time.
the LED display. The output terminals
[must be included in the circuit.
of this board match up with the input
So that the omission of these two LED’s Practical construction terminals on the display board, so the
[does not cause a ‘blind spot’ in the The construction employed depends display board may be mounted on the
[middle of the display it is necessary to upon the intended application of the main board at right angles to it, or the
arrange that the second LED of the LED meter. Two board layouts are given two may be linked by ribbon cable.
— second IC lights as the 15th LED of the here, a linear scale suitable for use as an Provision is made on the main board
.,
need
Most
mun:
[force
[the 1
stylus balance elektor april 1976 - 447
nis
1 :
the Edwin. This means that the designer must pay reproduction at subjectively-realistic I
The Edwin amplifier enjoys great attention not only to the readily audible levels, in a domestic listening room.
This is the great objection to using in- formance NPN and PNP overall behav-i
however a power-amplifier of ternally ‘compensated’ op-amps, such as iour. When Vr is made zero, in other!
exceedingly high quality. the 741! words when Tl and T2 have no
|
The obvious following design On the other hand, an RMS total distor- ‘quiescent’ or ‘standing’ current, it can
of 0.1% is quite inaudible - pro-
j
target was a power amplifier tion be seen from figure 3 that the load- 1
vided only that it consists of low-order current will be zero throughout a range _
that would perform as well as
harmonics, without any trace of ‘cross- of drive-voltages on each side of the
the Equa — but was as uncritical over spikes’. (Why do valve amplifiers actual axis-crossing. This ‘dead zone’ is I
£
to build as the Edwin. sound so clean?) the cause of crossover distortion.
*
The first part of this two-part The attempt to achieve optimal sound The culprits are the NPN and PNP de-
article presents the theoretical quality does not have to mean the use vices themselves, or rather their collec- 1 F
of large numbers of components. A tor-current/base-emitter-voltage charac-
background to the Equin p
handful of ‘stategically’ placed ‘extra’ teristics. At high current levels these a
amplifier, the second part will
parts in an otherwise standard design curves can be made as linear as one
1
ti
cover the practical aspects. will often do the job better (and would wish, by using current-dependent I
r
cheaper) than a radically new circuit. negative feedback obtained with emitter-
®
The standard design can indeed often resistors. At low current levels however
already be improved by slight readjust- these characteristics are sharply curved.
ment of component values, after one The reason is that the ‘transconductance’
has taken a hard look at ‘what affects of Tl and T2 collapses at low current |
Figure 1.The Equin circuit diagram. The px.- I Biasing T1 and T2, by means of voltage much care and trouble will the con-
board layout and the supply arrangements
Vr, will greatly improve matters. At structor take to set it?
willfollow in pert 2. the axis-crossing of the drive signal there - The ideal value is in fact that for
will now be a steady current (the ‘quiesc- which the ultimate ‘slope’ of the
Figure 2. The principle of 'usual' class B out-
ent’ current) in both devices — so that NPN curve lies in the same line as
put stages. T1 and T2 are 'compound' NPN
and PNP transistors, built up as pairs or they both still have significant trans- the PNP ultimate slope; the slope of
triples (or as single transistors). conductance. In the ideal case the over- each stage-half at crossover is then
lap of the NPN and PNP characteristics half the ultimate value. Irregularities
Figure 3. The characteristics of the figure 2 will be so arranged that the load-current in the curved part of the character-
circuit. The 'quiescent' current Ir serves to follows the drive voltage linearly through isticscan prevent this state of affairs
'linearise' the crossover-region. the zero-axis-crossing (the ‘crossover’). being maintained right through the
The extent to which this can be crossover region.
achieved depends on several points: — Complete regularity means that the
— Assuming that the ideal value of curves should be each other’s mirror
quiescent current does exist, how image. This is the meaning of the
450 — elektor april 1976
«S“I" I eqi
term ‘complementary symmetry’. If Assuming that such a compensation a, b, and g show NPN
c (identical to a)
a certain device within TT is NPN, could be made dependable - would behaviour; d, and h behave as PNP.
e, f
then the corresponding device inside it be fast enough? Would the heating The combinations a-d, b-e and g-h show
‘T2’ should be PNP, vice versa. due to a loud passage of music not true ‘complementary symmetry’.
This would imply that the power de- cause the immediately following The combination a-e is the well-known
vices within T1 arid T2 also must be
\
apply ‘quasi-complementary’ arrange- lated one must furthermore take current is poor, but the input
relatively ,
ments, where the two power devices care that Vr does not depend to impedance (base to emitter) near cross-
have the same polarity (NPN). This any extent on the instantaneous DC over varies smoothly.
will work provided precautions are voltage on the power line. In the cir- The ‘tail’ in the characteristics of the I
taken to eliminate the inevitable cuit of figure 1 the bias-voltage Vr ‘compound’ pairs b and e is short. These
asymmetry in the near-crossover ( of figure 2) is obtained by means pairs have a good stability of quiescent
parts of the overall transfer charac- of the components T4, PI, R12, R13 current, but the input impedance shows '
Fig
This can be done well.
teristic. and RI4. Variations in supply volt- discontinuities in the crossover region. «ic
- The next point is that the value of age cause a varying drop across R14 Adding ‘Baxandall diodes’ to both b
the quiescent current may not drift that can be made to compensate for and e will give them darlington-like ,orl
with temperature. If the base-emitter the error in the base-emitter voltage cor
characteristics, but it will eliminate
junction of a steamed-up power de- of T4 due to those same supply the ‘hot’ junction — giving improved
vice gets its oar between the ‘base’ variations. The bias voltage is there- quiescent current stability together T2
and ‘emitter’ of T1 or T2, it will be fore held relatively constant. with the smooth impedance-curve. See
necessary to regulate Vr by about g and h in figure 4. This arrangement Fig
-2 mV/°C, to hold the quiescent Output stage circuits
was used in the Equa-amplifier. am
current steady. That can be quite a Figure 4 shows several possible combi- The objection to the figure 4 pairs is
party: NTC resistors, sensing-diodes nations of devices for making up T1 and that they all have a fairly low current F '9
on the heat sink - plus the guess- T2 of figure 2. These two-transistor gain. This means that they require con- Th<
work about the actual junction groups (driver plus power -transistor) are sho
siderable amounts of drive-current. The
temperature, when all one has to go to be found in very many designs. The obvious solution is to build up and TV F
by is the (considerably lower) heat- resistor R is typically 50 ... 100 ohm; T2’ as triples. Of the various possible
R2
sink temperature. Re is usually 0.2 . . . 0.5 ohm. The pairs configurations the so-called ‘Quad- i
^
elektor april 1976 -451
triples’ are the best known (see figure 5). pedance). The alternative is current-
The quiescent current stability of the drive.
Quad triples is extremely good; the With voltage-drive the output current is
2N3055’s cannot get their oars into that related to the drive voltage by the ‘slope’
part of the circuit! The Ig Vjje (transconductance) of the 1
l Vbe
and the
characteristics have a short tail characteristic (figure 3). With current
current gain is high. The misbehaviour drive 1 l is related to the drive current
of the input impedances near crossover by the current gain of the compound
is smoothed by the 1 00-ohm resistors. transistors T1 and T2. However, the
The symmetry of the complete Quad current gain is frequency-dependent to a
output stage is however not quite what greater extent than the slope, mainly
it could be. The voltage drop across the because the latter can be improved by
1 k£2 resistor in the NPN triple is un- local feedback.
equal to (in fact about half) that occur- Current drive could in principle be
ring in the PNP triple. This means un- equally successful if there was a con-
equal currents in the pre-drivers’ and venient way of applying suitable local
mismatched ‘crossover tails’. feedback. It would however be hard to
This asymmetry has been practically beat the convenience of the ‘voltage-
eliminated in the Equin circuit by the drive feedback’ obtained with the
figure 6 expedient of moving one emitter resistors of figures 4, 5 or 6.
resistor ‘end’. The voltages across R17 Another aspect is that a voltage-driven
Figure 4. Well-known two-transistor configur- and R21 are now equal, so that TS and stage does not require (at least in prin-
ation for T1 and T2. The vertical pairs I a
T8 are symmetrically biassed. ciple) the use of current-gain-matched
with d, b with e, etc) can be combined to
The optimal value of quiescent current pairs. (A wild mismatch will not of
form an output stage with more-or-less
for this output stage is low, so that it course be any help. .) .
complementary symmetry.
has interesting possibilities for very -high- In most practical designs the drive is
Figure 5. The ‘Quad-tripies' used for T1 and power designs (‘horsepower amplifiers’). neither purely ‘voltage’ nor purely
T2 in the 303 amplifier. (Quad themselves have meantime come ‘current’. Look at the circuit of figure 7.
up with a quite different approach to If Cl and C2 are sufficiently ‘thick-
Figure 6. Modified triples used in the Equin high-power design, see Quadi-compli- ended’ there is a link between the junc-
Transient intermodulation
distortion
Along with ‘crossover’, ‘TIM’ can be
blamed for the ‘gravelly’ quality of
sound from many transistorised power
amplifiers. TIM actually ‘sounds’ very
much like crossover distortion; it oc-
curs however at moderate to high drive
levels and high frequencies instead of
on low-level signals.
The effect is caused by the application
of an input signal that ‘slews’ too fast
for the feedback system to ‘keep up
with’.
The drive voltage to the input stage is
Figure 9. Transient Interm odulation Distor-
the difference between the input signal momen-
tion (TIM). The low-level sinewave is
and the feedback signal from the out- tarily suppressed during transient-induced
put. Due to the high open-loop gain,
cause DC shifts that take time to correctlca
this difference is usually very small.
themselves. The bursts of 100% distor-fcj
However, if the feedback is too slow
tion, ‘holes in the music’, are the TIM.fci.
(due to compensation needed to
lag
A numerical example: suppose thejii;
stabilise heavy feedback, for example),
amplifier has an open-loop gain ofj&;
this difference signal may be momen-
elektor april 1976 - 453
time occuring in the input signal. The extensions in this issue — with one age stabilisers actually supply approxi-
Equin amplifier, with its good voltage printed circuit board for all the mately 4.8 volts. The consequence may
drive, manages an open-loop bandwidth be that practically the entire field
additional circuits. However, some
of 10 kHz without stability problems remains white. The circuit of figure B
readers seem to be having
(using ‘slow’ 2N3055’s!). If the ampli- shows how this can be remedied by
fier is to handle full-drive inputs at up problems with the basic game, so raising the voltage.
to, say, 20 kHz (and not be embarrassed some further suggestions for Some readers have encountered prob-
by nadvertent ultrasonic drive) one or trouble-shooting seem called for. lems involving vertical distortion of the
two extra precautions are desirable. In the next issue we will publish picture. This can be caused by poorly
These are to provide an RC rolloff at adjusted horizontal synchronisation, so
the remaining extensions and the
the input (R4/C4 - well into the a word of advice will not be out of
ltrasonic range), and to give T1 printed circuit board. place: first of all read the adjustment
plenty of elbow-room (low R7). instructions given in the original article.
Carefully check all wiring and other
Final remarks connections, then set all pre-set poten-
The output stage drives the loud- tiometers to mid position and carry out
speaker via the electrolytic CIO. Direct the alignment procedure as described.
'
coupling would have introduced a com- If the problem persists, the modifi-
plication with the offset voltage. This cations described at the end of the
offset is critical to really control,
whereas DC in the load can upset the
part 2 article ‘TV tennis extensions, part 1’ can
be carried out (‘TV tennis hints’).
stage-balance, leading to ‘crossover’ Readers are also referred to the points
(particularly with this circuit’s low already mentioned in the ‘Missing Link’,
quiescent current). R25 ensures that January 1976, p. 148.
CIO is charged when no load is connec- If even these points are not sufficient to
resonance between Cll and the wiring is advisable to run completely separ-
mductance - to prevent the amplifier ate wires from the supply electrolytic
going into business for itself somewhere (in the power supply shown in the
m Band I. original article, thisis C3) to each of
The resistor R 1 5 separates the negative these ICs. The simplest way to do
supply rail from the input ‘earth’, the this is to unsolder the positive supply
heavy currents taking the ‘path of The additional circuits will extend the pins (pin 14, in each case), bend the
least resistance’. The two signal-earths scope of the original TV tennis game, pins up from the board and solder
id
in a stereo amplifier may be linked, but they will also put a heavier load on the wires on to them in mid-air. The
he C3 and C7 cause the degree of AC feed- the power supply. This may mean that a positive supply ends of the de-
ay tack to differ from the DC value. These new power supply will be required, or coupling capacitors (C8, Cx and Cx)
*ct capacitors have been given an unusually that the existing unit will have to be re- are also unsoldered from the board
or- Jjgh value, so that the amplifier DC designed. The current consumption, and connected via 1 £2 resistors to
M- biasing arrangements will not wander with all extensions added, will be pin 14 of the corresponding ICs.
he due to momentary asymmetry in low- approximately 600 mA. (Note that IC10 is the one between
of trequency input signals. H The power supply originally rec- IC7 and IC8; on the original board
, . . 1
The choke is then mounted between a dent in the vertical boundaries that preset can be used instead
the original hole for pin 7 and pin 7 moves up and down with the ball, for
itself. instance. To prevent this, two 1 kS2
Digital master oscillator
after the conversion to mains sync resistors can be added in series with
has been carried out (Elektor 1 1 the inputs of N9 (pins 2 and 3 of In the circuit for the MOS
master oscil- I
modification has
elektor april 1976 — 455
uihat's iiiabt?
— The most 'interesting' figures on The assumption is correct, up to a point
- the point at which the loudspeaker
heat production causes the maximum
the specification list of an audio allowable temperature rise in the
becomes the factor limiting a further ‘motor’ (i.e. the moving coil). A
power amplifier are those relating
increase in the ‘undistorted’ sound measurement with a steady sinewave as
to the rated output power. This pressure. loudspeaker drive will encounter the
articlereviews the various kinds Whichever factor sets the limit, there latter limit first, so that some kind of
watt that one can meet in a
of comes a setting of the gain control at ‘tone burst’ seems to be required. The
specification. Since the purpose which the reproduction is no longer duty-cycle of this tone burst needed to
‘undistorted’. Some listeners immedi- bring the limits together would have to
of using the amplifier is to
ately detect this as a ‘rough edge’ to the be determined for each type of loud-
reproduce music at a 'correct' loud music passages, others actually like speaker tested and quoted in the specifi-
,,
>evel, it will also be necessary to the effect - and happily turn the ‘fi’ up cations — assuming that this is meaning-
£2 consider the efficiency of the ‘hi’er. ful to the customer working out the
loudspeakers that are to be driven. When the systemreally saturates (so permissible amplifier rating!
that there quite unmistakable severe
is Manufacturers would clearly prefer a
distortion) the usual reaction is to standardised procedure that would
assume that the power amplifier is enable dissimilar units to be compared
il- ‘clipping’. That may well be - but it by prospective users. Presently used test
nd ‘ain’t necessarily so’. The discovery is signals are therefore obtained by
invariably made too late, after an invest- ‘frequency-weighting’ a wideband noise
ment in new parts or in a new ready-built signal until its spectral power-density
amplifier of higher rating has failed to (both ‘instantaneous peak’ and ‘con-
noticeably increase the available tinuous’) corresponds to that of ‘typi-
‘racket’. What has happened is that cal’ music (whatever that may be). This
more watts have become available for solves the maximum-power problem
heating up the speaker’s drive-coil (and nicely - but not the distortion-measure-
possibly tearing the cone loose from its ment one.
moorings). This can easily mean a If the customer is going to use a power
further considerable investment - and amplifier capable of overheating (or
this time without a trade-in! mechanically overdriving) any of the
b is rather too easy to manipulate with It is one of the physical facts of life that loudspeakers in the system, he will
the ‘watts’ in the power-amplifier a high quality loudspeaker of reasonable simply have to refrain from doing silly
ipecification to produce an inflated dimensions inevitably has an efficiency things with the volume and tone con-
The idea is to sell a relatively
-ating. - i.e. the ratio of acoustic watts de- trols. Damage rarely occurs before
n ow-power job to the unwary - at a livered to electrical watts consumed - severely-distorted reproduction has
3).ugh-power price - on the premise that in the order of ... 5%. The balance is
1 given fair warning . . .
applied during recording and trans- The ‘continuous’ and the ‘music’ power
mission. When the music signal is driving
ratings of an amplifier give information
the amplifier momentarily just to its that is relevant to the unit’s ability to
peak output (i.e. genuinely undistorted deliver an undistorted audio signal.
full-drive), one may assume that the
All other power ratings, such as ‘square-
average power delivered will be well Figure 3. A typical unregulated power supply wave power’, ‘peak music power’,
below the amplifier’s continuous rating. circuit, in this casewith symmetrical positive ‘±2 dB power’ etc., reflect more upon
Let us not complicate matters by trying and negative output rails. The resistance
the abilities of the advertisement copy-
to account for the effect of current shown as R is in fact due to the copper
writer.
limiters in the output stage. The simple resistance of the transformer windings and the
series resistances of the rectifier diodes. At a The amplifier’s power rating is by no
situation is that the amplifier’s peak means the only parameter - or even the
given load demand, a larger value for the
power capability is determined by the most important one - relevant to the
reservoir elactrolytics will enable a longer
momentarily available supply voltage. 'burst' to be met power — but the enjoyment of undistorted music repro-
at full
There will come a point (see figure 1) recovery time will then also be greater. duction. H
at which the ‘on’ transistor ‘bangs its
head’ against the supply the wave-
rail -
form being flattened (‘clipped’) by the
inability to go higher.
'v-
1. Programming language.
So easily learned that it makes your transition
to MPU's that much easier.
2. Unlike competitive ranges, the M6800 family
iscapable of further development while still
maintaining upward compatibility.
Example: The M6900 series is now being
defined to meet defined customers
requirements.
3. Veryefficient programme code.
Wide instruction repertoire, including seven
addressing modes.
4. Sub-function devices already available.
5. Single power rail. 5 volt.
6. Interfaces easily with TTL and CMOS.
7. Second sourced by AMI across Europe.
Here's the M6800 family today: —
MC6800 Microprocessor.
MC6820 Peripheral Interface Adapter.
MCM6810 Static RAM.
MCM6830 ROM.
MC6850 Asynchronous Communications
Interface Adapter.
MC6860 Low Speed Modem.
Alternative N-Channel Si Gate RAMs for
large systems: —
MCM68102 IK x 1 Static 16-pin.
MCM6814' 4K x 1 Dynamic 16-pin.
MCM6815 4K x 1 Dynamic 22-pin.
MOTOROLA
Semiconductors
Motorola Ltd. Semiconductor Products Division
York House. Empire Way. Wembley. Tel: 01-902 8836.