Eef 262 HW4 2023

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EEF 262E HW#4

Due: 12 May 2023 @22 o’clock – No late homework will be accepted.

1) Draw the small-signal diagrams and find the voltage gain, input resistance, and the output
resistance of the following circuits. Assume:
a. For 𝑄1 : 𝑉𝐴 = ∞; For 𝑄2 : 𝑉𝐴 < ∞.
b. For 𝑄1 : 𝑉𝐴 = ∞; For 𝑄2 , 𝑄3 : 𝑉𝐴 < ∞.
c. For 𝑄1 : 𝑉𝐴 = ∞; For 𝑄3 : 𝑉𝐴 < ∞.
d. For 𝑄1 : 𝑉𝐴 < ∞.
e. and f. For 𝑄1 , 𝑄2 : 𝑉𝐴 < ∞.

(a) (b) (c)

(d) (e) (f)


2) Using your favorite SPICE simulator (LTSPICE, PSPICE, etc.), answer the following questions.
Choose 𝐶1 10 F. For 𝑄1 , you can employ the transistor 2N2222. For LTSPICE, you can use the
following tutorial: http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice.htm.
a. Using the .op command, simulate the DC bias conditions and print out the results.
b. Using the .ac command, simulate the voltage gain of the amplifier from 10 Hz to 1 GHz.
You can apply an AC signal of 1 mV at the input.
3) Find the voltage gain of the circuit below center. Assume that all transistors are in
saturation, 𝜆 ≠ 0 for 𝑀2 , 𝜆 = 0 for 𝑀1 .
4) Determine the voltage gain and the output resistance of the circuit below right. Assume that all
transistors are in saturation, and 𝜆 ≠ 0.

Question 3 Question 4
5) Calculate the input resistance and the voltage gain of the circuit below left. Assume that all
transistors are in saturation, and 𝜆 ≠ 0.

Question 5 Question 6
6) Consider the circuit shown above right. Here, you will use the following NMOS and PMOS
models. You can import them into LTSpice or your favorite SPICE simulator. One helpful link
regarding LTSpice is provided below. Sizes are in micrometers.
Models: http://ptm.asu.edu/modelcard/180nm_bulk.txt
Incorporation of the models into LTSPICE: http://www.linear.com/solutions/1083
a. Determine W2 such that an input DC level of 0.75 V yields an output DC level of 1 V.
What is the low-frequency voltage gain under these conditions? Use AC analysis in
SPICE to view the gain vs. frequency response of the amplifier.
b. What is the change in the gain if the width and length of NMOS and PMOS devices varies
by ± 10% individually? Which one is the most sensitive?
c. Establish a simulation setup to simulate the output resistance of the amplifier. What is
the simulated value of the output resistance?

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