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Dlca NOTES

This document provides an overview of computer architecture and organization topics, including: 1. The difference between computer architecture (visible attributes) and organization (implementation). 2. The structure and function of a computer's components in a von Neumann architecture, including the CPU, memory hierarchy, and registers. 3. Performance issues caused by the von Neumann bottleneck and solutions like memory hierarchy and caching to improve speed.

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0% found this document useful (0 votes)
67 views5 pages

Dlca NOTES

This document provides an overview of computer architecture and organization topics, including: 1. The difference between computer architecture (visible attributes) and organization (implementation). 2. The structure and function of a computer's components in a von Neumann architecture, including the CPU, memory hierarchy, and registers. 3. Performance issues caused by the von Neumann bottleneck and solutions like memory hierarchy and caching to improve speed.

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Fatima Haroon
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DLCA MID TERM NOTES:

COMP ARCHITECTURE COMP ORGANIZATION


The attributes visible to the Deals with how these attributes are
programmer. implemented
Instructions etc…. Hardware components, control signals
What you can see How it works or implemented.

ORGANIZATIONAL DECISION:

 How often the multiply instruction is used. (Frequency of usage)


 Which method is faster.
 Their cost
 Size of a dedicated multiply unit.

STRUCTURE FUNCTION
the way in which components Function is what each part does
relate to each other within the structure.

Computer functions are:

 Data processing
 Data storage
 Input
 Output
 Communication
 Control

STRUCTURE:

1. TOP LEVEL:
 CPU: The computer's control center for data processing.
 Main memory: Temporarily stores data for execution.
 I/O: Manages data transfer between the computer and external devices.
 System interconnection: communication between CPU, memory, and I/O, often through a
system bus.

2. THE CPU

 Control unit: Controls the operation of Computer (supervisor)


 ALU: Performs the computer’s data processing functions.
 Registers: Provides storage internal to the CPU.
 CPU interconnection: communication btw control unit, ALU, and registers.
Instruction set:

 Like the language the computer's brain (CPU) speaks,


 It's made of 1s and 0s, also known as machine language.
 It has instructions for managing data inside the CPU.

For example:

 JUMP: It tells the CPU to go to a specific place in memory.


 ADD: Instructs the CPU to add two numbers.
 LOAD: Orders the CPU to fetch data from memory.

Single-Tasking Operating System

 An operating system that allows a single user to perform only one task at a
 Functions like printing a document etc can be performed only one at a time.
 Examples include MS-DOS etc.
 Disadvantage was Underutilization of resources

Time sharing / Multitasking

 Executing more than one program concurrently.


 OS directs processor to spend a predetermined amount of time executing the instructions for
each program, one at a time.
 Time sharing is implemented to achieve interactivity

Pipelining

 Mechanism to achieve the effect of multiprocessing on a Single-processor machine.

VON NEUMANN ARCHITECTURE

This design architecture describes an electronic digital computer with:

• Input
• Control
• ALU
• Registers
• Memory
• Output
Stored-program concept:

 Concept to store both instructions and data in one place, making things simpler.
 Early computers needed switches and cables to work, but today's computers use one memory
for everything.

CLOCK CYCLE:

 A single electronic pulse of a CPU.


 Processor speeds are often measured in megahertz or gigahertz.
 The frequency of a processor is also known as the processor's clock speed.
 A computer processor or CPU speed is determined by the clock cycle

PERFORMANCE MISMATCH ISSUE

 Theoretically, a processor is capable of executing one micro-instruction in one clock cycle.


 But due to slow memory devices and buses CPU cannot achieve its full execution efficiency
 Also called Processor-Memory Performance Gap or Von- Neumann Bottleneck.

von Neumann bottleneck

 The von Neumann bottleneck slows down data transfer between the CPU and memory, limiting
processing speed.
 In recent years, while processor speeds have risen, memory improvements have focused on
storing more data in less space, causing processors to wait for data from memory
 Making a faster processor often result in more idle time due to the transfer rate bottleneck.

Solution:

To solve performance mismatch issue, organize memory system into a hierarchy

MEMORY HIERARCHY

Moving from Disk to Registers

• Memory becomes smaller and expensive


• Memory becomes faster and volatile (Memory access time decreases)

• Memory Access Time:

 Time consumed to read/ write operation on a certain memory.


 Time to get information from the computer's memory
FUNCTIONS:

 Hard Disk: Used for permanent storage due to its non-volatile nature.
 RAM: Executable memory for running software, also known as Primary or Main Memory.
 Cache Memory: Speeds up processing by storing recent/frequent instructions and data for quick
access.
 Register(s): These are very fast small memories inside theCPU. These are of two types

TYPES OF REGISTERS:

 Dedicated Registers: For the exclusive use of CU and cannot be accessed by the user
 General Purpose Registers: These are used by programmers for storing data, addresses and
transitional& final results.

What does the CPU do?

 Fetch: The computer gets the instruction from memory.


 Decode: It figures out what the instruction means.
 Execute: The computer does the instruction
 Store: stores the result.

Fetch Cycle:

 The computer loads the instruction's code into IR and its location into MAR.
 The instruction can come from the IBR or memory, passing through MBR, IBR, IR, and MAR.

Decode Cycle:

 Once the opcode is in the IR. Control unit interprets the opcode.

Execution Cycle:

 Computer's control unit tells ALU what to do, like move data or do a calculation, by sending the
right signals.

IAS - INSTRUCTION SET:

IAS instruction set contains 21 instructions. Can be grouped into the following categories:

 Data Transfer Instructions: move data between memory and ALU registers.
 Arithmetic: operations performed by the ALU.
 Unconditional Branch: These instructions make the computer jump to a different part of the
program without considering any conditions.
 Conditional Branch: These instructions make the computer decide whether to jump to a
different part of the program based on specific conditions.
 Address Modify Instructions: let the computer calculate new addresses using the ALU and put
them into instructions stored in memory, making it very flexible.
IAS REGISTERS

 Memory Buffer Register: Holds data to be stored in or received from memory.


 Memory Address Register: Specifies the memory address for data read or written to the MBR.
 Instruction Register: Stores the 8-bit opcode being executed.
 Instruction Buffer Register: Temporarily holds the right-hand instruction from a memory word.
 Program Counter: Contains the address of the next instruction to fetch from memory.
 Accumulator and Multiplier Quotient: Temporarily store operands and results of ALU
operations.

PROGRAMMING IN HARDWARE PROGRAMMING IN SOFTWARE


Also called as hardwired system Also called as general purpose hardware
Components configure for only one Components perform various functions
computation depending on control signals.
They are inflexible They are flexible

PROGRAMMING:

A FIVE-STEP PROCEDURE:

1. Clarify the programming needs


2. Design the program
3. Code the program
4. Test the program
5. Document and maintain the program

5 GENERATIONS OF PROGRAMMING LANGUAGE:

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