MSB Educational Institute -

Haidery
Class XI – Computer
Science

SLO-3
Architecture of CPU

1
By: Alefya
3.1 COMPONENTS OF CENTRAL
PROCESSING UNIT (CPU)
3.1.1 WHAT IS THE ROLE
OF CPU IN COMPUTER
SYSTEM;
 3.1.1 WHAT IS THE ROLE OF CPU IN COMPUTER
SYSTEM;
ROLE OF CPU IN COMPUTER SYSTEM
The central processing unit (CPU) of a computer is a
piece of hardware that carries out the instructions of a
computer program. It performs the basic arithmetical,
logical, and input/output operations of a computer
system. The CPU is like the brains of the computer -
every instruction, no matter how simple, must go
through the CPU.
The CPU is sometimes also referred to as the central
processor unit, or processor for short.
3.1.2 DESCRIBE FUNCTIONS OF
COMPONENTS OF CPU,

I.E. ARITHMETIC AND LOGIC UNIT,

CONTROL UNIT, REGISTERS, CACHE,
INTERNAL BUSES (DATA BUS,
ADDRESS BUS AND CONTROL BUS)
WITH THE HELP OF BLOCK DIAGRAM;
 ARITHMETIC LOGIC UNIT

An arithmetic logic unit (ALU) is a major

component of the central processing unit of a
computer system. It does all processes related to
arithmetic and logic operations that need to be
done on instruction words. In some
microprocessor architectures, the ALU is divided
 ARITHMETIC LOGIC UNIT
The Arithmetic Logic Unit (ALU) is a part of
the CPU that handles all math and logic
operations. It has two main functions:
• Arithmetic Operations: The ALU performs
basic math tasks like addition, subtraction, and
sometimes multiplication or division.
• Logical Operations: It also makes decisions
based on logic, such as comparing numbers
(greater than, less than, or equal to) and using
operations like AND, OR, and NOT.
 ARITHMETIC LOGIC UNIT
How it Works:
• The ALU receives data from the CPU's registers.
• The Control Unit tells the ALU what operation to perform
(like adding numbers or comparing values).
• The ALU processes the data and sends the result back to the
CPU, which stores or uses it.
• For example, if the CPU needs to add 5 and 3:
• The ALU gets these numbers from the registers.
• It performs the addition and sends the result (8) back to the
CPU.
• In short, the ALU is responsible for doing calculations and
making logical decisions, helping the CPU process
 CONTROL UNIT (CU):
• The CU manages the execution of instructions by
directing the operation of the ALU, memory, and
input/output devices. It fetches instructions from
memory, decodes them, and signals the necessary
operations to be performed.
• How it works? It controls the entire data flow
between various components. The CU coordinates
between the ALU, registers, cache, and buses to
ensure smooth data transfer and execution of
REGISTERS:
• Registers are small, fast storage locations within the
CPU that temporarily hold data, instructions, and
addresses.
• Common types include the accumulator(AC) (stores
intermediate results), instruction register (IR)(holds the
current instruction), Data register(DR), program
counter (PC)(tracks the next instruction's memory
address) and Memory Address register (MAR)

How it works? Registers are shown as small storage

units directly linked to the ALU and control unit. They
hold data that the CPU is currently processing or needs
immediately.
CACHE:
• Function: Cache is a small, high-speed
memory located close to the CPU that stores
frequently accessed data and instructions. It
reduces the time taken to access data from
the main memory (RAM), improving the CPU’s
efficiency.
• How it works? The cache is depicted
between the CPU and the main memory. It
acts as a buffer, storing recently or frequently
 INTERNAL BUSES:
• Buses are pathways that allow data to travel between the
CPU and other components. There are three types of buses:
• Data Bus: Transfers actual data between the CPU, memory,
and peripherals.
• Address Bus: Carries the address of the data or instruction
that the CPU wants to access from memory.
• Control Bus: Sends control signals from the control unit to
coordinate various activities within the CPU (e.g., read/write
operations).
• How does it work? These buses interconnect the different
components (registers, ALU, CU, cache, and memory). The
data bus is shown carrying data, the address bus carries the
 FUNCTIONS OF CPU - SUMMARY
Component Function
Arithmetic Logic Performs arithmetic and logical
Unit (ALU) operations
Directs operations and manages
Control Unit (CU)
instruction execution
Temporarily stores data and
Registers
instructions for quick access
Provides fast access to frequently used
Cache
data
Transfers data between CPU
Data Bus
components
Address Bus Carries addresses for data retrieval
Sends control
https://www.youtube.com/watch?v=IEYFlGLAhyo signals to coordinate
https://www.youtube.com/watch?v=b-B0fzlmrSc
Control Bus
DIFFERENCE BETWEEN REGISTERS AND
CACHE MEMORY
Registers Cache Memory
Smaller in size, typically Larger in size, usually holding
ranging from tens of bytes kilobytes or megabytes of data

Located outside the CPU,

Located within the CPU, close
between the processor and
to the processing units
main memory

Faster access time than main

Very fast access time, memory, measured in
measured in nanoseconds nanoseconds but slower than
registers

Stores frequently accessed

Stores data, instructions, and
data and intructions from main
processor status information
memory

Accessed when data is not

Directly accessed by the available in registers or when
3.1.3 describe the functions of following
registers and their types, i.e.
a. general purpose register (Accumulator (AC)
and Data Register (DR), Base Register (BR),
Counter Register (CR))
b. special purpose register (Instruction Register
(IR), Memory Address Register (MAR),
Program Counter (PC), Memory Buffer
Register (MBR));
 A. GENERAL PURPOSE REGISTERS
General-purpose registers are used to store temporary data and intermediate results during program execution. They are versatile and
can be used in a variety of instructions and operations.

• Accumulator (AC):
• The accumulator is mainly used for arithmetic and logic operations. It holds one operand and often stores the result of the
operation.
• Example: In operations like addition, the sum is typically stored in the AC register.
• Data Register (DR):
• It temporarily holds the data that is being transferred to or from memory or other devices. It acts as a buffer between the CPU
and memory or I/O devices.
• Example: During a memory read, data is loaded into the DR before it’s used by the CPU.
• Base Register (BR):
• The base register holds the base address of a memory segment. It is often used in indexed or base-offset addressing modes to
compute the effective address.
• Example: If a program is using base addressing, the BR will store the starting address of the segment.
• Counter Register (CR):
• The counter register is used for loop counting or to keep track of iteration in a repetitive operation. It often holds values for the
loop counter.
• Example: In a loop, the CR will decrease with each iteration until the loop is complete.
 B. SPECIAL PURPOSE REGISTERS
• Special-purpose registers have dedicated tasks in the execution of
instructions and control of the CPU. They are not used for general data
storage but instead manage specific operations.
• Instruction Register (IR):
• Holds the current instruction being executed by the CPU. It contains the opcode and
sometimes additional data for the instruction.
• Example: When an instruction is fetched from memory, it is placed in the IR for
decoding and execution.

• Memory Address Register (MAR):

• Stores the memory address of the data or instruction that is being fetched or stored.
It works as an intermediary to communicate with the memory system.
• Example: When the CPU wants to access data from memory, the address of that
data is placed in the MAR.
CPU REGISTERS
• These are the high speed memory locations built into the
microprocessor.
 CPU REGISTERS

• These are the high speed memory locations built into the microprocessor.
• The CPU uses these locations to store data and instructions temporarily
for processing.
• CPU processes, stores and transfer data from one component to
another with the help of registers.
• The number of register varies among computers.
• It increases the performance of CPU.
• Each register receives the information, holds it temporarily and pass it
on, as directed by CU.
• The size of register depends on the computer architecture.
THERE ARE FOUR TYPES SPECIAL
PURPOSE REGISTER

I. PROGRAM COUNTER (PC)

II. INSTRUCTION REGISTER (IR)
III. MEMORY ADDRESS REGISTER (MAR)
IV. MEMORY BUFFER REGISTER (MBR);

SLO # 3.1.3
 SPECIAL PURPOSE REGISTERS
Program Counter (PC)

• Used to store the address of the next instruction to be

fetched for execution.

• When the instruction is fetched, the value of program

counter is incremented.
 RAM

2134 10110011 1 PC
ADDRESS

2135 10100011 4
2134
2136 11100011 2

2137

2138 11110000 3
 SPECIAL PURPOSE REGISTERS
Instruction Register (IR)

• Instruction register is used to store the fetched the instruction.

• The instruction is also decoded in this register.
 RAM

2134 10110011 1 PC
ADDRESS

2135 10100011 4
2134
2136 11100011 2 IR
10110011
2137

2138 11110000 3
 SPECIAL PURPOSE REGISTERS
Memory Address Register (MAR)

• Used to store memory address being used by the processor.

• When processor wants to READ data from or WRITE data in memory,

it stores the address of that memory location in this register.
 RAM

2134 10110011 1 PC
ADDRESS

2135 10100011 4
2134
2136 11100011 2 IR
10110011
2137

2138 11110000 3 MAR

2137
 SPECIAL PURPOSE REGISTERS
Memory Buffer Register (MBR)

• Used to store data coming from or going from the memory.

 RAM PC
2134
2134 10110011 1
IR
ADDRESS

10110011
2135 10100011 4

2136 11100011 2 MAR

2137
2137 10101010

2138 11110000 3 MBR

10101010
3.2 VARIOUS OPERATIONS
PERFORMED BY CPU
3.2.1 COMPARE THREE TYPES OF
INSTRUCTIONS OF CPU, I.E. DATA
TRANSFER INSTRUCTIONS, DATA
PROCESSING INSTRUCTIONS AND
PROGRAM CONTROL
INSTRUCTIONS;

SLO # 3.2.1
1. DATA TRANSFER INSTRUCTIONS
• Data transfer instructions are the instructions which
transfers data in the microprocessor.
• These instructions move data between registers, or
between memory and registers.
• These instructions copy data from source to
destination.
• While copying, the contents of source are not modified.
• They are also called copy instructions.
• Examples:
• MOV A, B (Move the contents register A to B)
• LD A (Load the data to register A from memory)
• STO Instruction stores information from register to
 2. DATA PROCESSING INSTRUCTIONS
The data processing instructions
manipulate data within registers. They
include
•move instructions,
•arithmetic instructions (ADD, SUB, MUL,
DIV)
•Shifts (Shift to the left of right of an
operand)
•logical instructions (AND, OR, NOT),
 3. PROGRAM CONTROL INSTRUCTIONS
•These instructions used to change the
sequence of instruction of a program are
called control transfer instructions.
•These instructions transfer the execution
control to certain part of program
instead of next instruction.
•JUMP and JUMPZ (Jump if zero) etc.
•LOOP (when number of statements are
to be repeated)
WHAT IS INSTRUCTION SET?
An instruction is a statement that tells the computer
to do something. The way an instruction is given is
called instruction format.
A computer has a variety of instruction formats. The
control unit of CPU is responsible to interpret the
instruction code. The control unit also provides the
necessary control function required to process the
instructions. A simple instruction format consists of
16 bits.
INSTRUCTION CODE FORMAT

1. Operand code

The operand code specifies the operation to be performed by the

computer such as ADD, SUB, MOV etc. It takes 4 bits. An operand can
be a value or register number on which the operation is performed.
Opcode Operand Operand
Reference 1 Reference 2

16 bits
Instruction Code Format

2. Address of Operand

The address of operand refers to a location in main memory where

the value is stored.
 INSTRUCTION FORMATS
• An instruction format defines the layout of the
instruction. It consists of two parts, an Op-
code (Operation-Code) and Operand.
• Op-Code: is a group of bits various processor
operations such as LOAD, STORE, ADD, and SHIFT
to be performed on some data stored in registers
or memory.
• Operand: can be data, or can refer to data – i.e
address of data.
Example: (draw diagram pg: 49)
COMPARE DIFFERENT TYPES OF
CPU INSTRUCTION FORMATS,
I.E.

TWO ADDRESS INSTRUCTION;

ONE ADDRESS INSTRUCTION
AND
ZERO ADDRESS INSTRUCTION.
TYPES OF INSTRUCTION FORMATS
Two-Address instruction format
This format uses two address fields. Each address
field can specify either a register or memory
address. It is the most common instruction format.

The example of this instruction format are MOV,

ADD, MUL etc.
Op- Operan Operan
Code d d
HOW TWO-ADDRESS INSTRUCTION FORMAT WORKS

Suppose A=2, B=4, C=3 AND D = 6

X = (A+B) * (C+D) MO
R1 2 A 2
V
AD
MOV R1, A R1 6 B 4
D
ADD R1, B MO
R2 3 C 3
V
AD
MOV R2, C R2 9 D 6
D
ADD R2, D MU R1 54 R2 9
L
MO
MUL R1,R2 X 54 R1 54
V
MOV X, R1
TYPES OF INSTRUCTION FORMATS

One-Address instruction format

This format uses only one address field. It
uses one accumulator register (AC) for all
data manipulation. A second register is
required for multiplication and division.
Op- Operan
Code d
How One-Address instruction format works
Suppose A=2, B=4, C=3 AND D =
6 LOA
A 2
X = (A+B) * (C+D) D
ADD B+A 6
LOAD A
STO
T=B+ 6
ADD B RE A
LOA
STORE T C 3
D
LOAD C ADD C+D 9
ADD D MUL T*(C+ 54
MUL T STO D)
X=T 54
RE
STORE X
TYPES OF INSTRUCTION FORMATS

Zero-Address instruction format

• An address field is absent in the instruction.
• A stack-organized computer does not use address
field for the instruction like ADD and MUL.
• However, the instructions such as PUSH and POP
require an address field to specify the operand
that communicates with the stack.
Opcode
 How Zero-Address instruction format works
Suppose A=2, B=4, C=3
AND D = 6 POP 54
X
X = (A+B) * (C+D) (6)*(
MUL
9)
PUSH A AD
(6+3
D
PUSH
)
PUSH B 6
D
ADD PUSH 3
C
PUSH C (2+4
AD
PUSH D )
D
PUSH
ADD 4
B
MUL
PUSH 2
A
HTTPS://BIT.LY/356NDSA
3.2.3 DESCRIBE
FETCH – DECODE – EXECUTE CYCLE
WITH THE HELP OF A DIAGRAM;
 FETCH EXECUTE CYCLE?
• The fetch execute cycle is the basic operation
(instruction) cycle of a computer.

• During the fetch execute cycle, the computer

retrieves a program instruction from its memory. It
then establishes and carries out the actions that are
required for that instruction.

• The cycle of fetching, decoding, and executing an

FETCH OPERATION:

•The instruction is fetched from main

memory and stored in the processor.
•The control unit can then access the
instruction so that it can be decoded
and executed.
DECODE OPERATION:

•The instruction needs to be decoded

before it can be run. This is the
process the control unit uses to work
out what signals to issue to the other
components for the instruction to be
executed.
EXECUTE OPERATION:

•The control unit will send signals to

the relevant components so that the
instruction is carried out.
FETCH EXECUTE CYCLE
 Differentiate between Complex
Instruction Set Computer (CISC) and
Reduced Instruction Set Computer
(RISC) Architecture;

SLO # 3.2.4
 Complex Instruction Set Computer (CISC) and Reduced Instruction Set
Computer (RISC) CISC
Architecture
(Complex Instruction RISC (Reduced Instruction Set
Aspect
Set Computer) Computer)
Instruction Set Large and complex Small and simple

Longer due to multi-cycle

Execution Time Faster due to single-cycle execution
execution

Pipelining Difficult to implement Easier to implement

More complex, requiring larger
Hardware Simpler hardware design, smaller
silicon area for decoding and
Complexity chip size, and power-efficient.
control.
Fewer lines of code, reducing More lines of code, increasing
Memory Usage
memory usage. program size.
Software Less reliance on compiler High reliance on compiler
Dependency optimization. optimization.
Performance Reduces the number of Optimizes instructions per clock
Focus instructions per program. cycle.
Intel x86, VAX, IBM System/360,
Examples ARM, SPARC, MIPS, PowerPC.
AMD
 DIFFERENCE BETWEEN RISC AND CISC
RISC CISC

1. RISC stands for Reduced 1. CISC stands for Complex Instruction

Instruction Set Computer. Set Computer.
2. CSIC processor has complex
2. RISC processors have simple instructions that take up multiple
instructions taking about one clocks for execution. The average clock
clock cycle. The average clock cycle per instruction (CPI) is in the
cycle per instruction (CPI) is 1.5 range of 2 and 15.
3. Execution time is very less 3. Execution time is very high
4. The decoding of instructions
is simple. 4. Decoding of instructions is complex
5. The most common RISC
microprocessors are Alpha, ARC, 5. Examples of CISC processors are the
Differentiate between Intel P4
and advance micro devices
(AMD) Athlon on the basis of
clock speed, bus width, cache
and architecture.
SLO # 3.2.5
3.2.5 Differentiate between Intel P4 and advance micro devices (AMD)
Athlon on the basis of clock speed, bus width, cache and architecture.
Feature Intel Pentium 4 (P4) AMD Athlon
Clock Faster but less efficient Slower but more efficient
Speed (e.g., 2–3.8 GHz). (e.g., 1–2.4 GHz).
64-bit, but with faster
Bus 64-bit, good for basic
communication
Width performance.
(HyperTransport).
Smaller and less Larger and more efficient,
Cache optimized for giving better
performance. performance.
Focused on doing more
Focused on speed, but
Architect work efficiently and
ran hotter and wasted
ure introduced 64-bit
energy.
computing.
Similar
INTEL P4 VS (AMD) ATHLON

Specification Intel AMD Athlon

Clock Speed 4.25x+ 5x+

Bus Width 64 bit 64 Bit
Cache L1(2 x 16) L1(2 x 64KB)
L2(128 KB) L2(256 KB)
L3(-) L3(-)
Architecture Willamette Thunderbird