A Project Report on

STUDY OF OFDM TRANSMITTER AND

RECEIVER

Submitted in partial fulfilment of the

requirements for the award of the degree
of
BACHELOR OF TECHNOLOGY
in
ELECTRONICS AND COMMUNICATION ENGINEERING

Submitted by:
Prakhar Surana
(20116063)

Under the guidance of:

Dr. Sandeep Kumar Singh

Department of Electronics and Communication Engineering

Indian Institute of Technology Roorkee
November 2023
© INDIAN INSTITUTE OF TECHNOLOGY ROORKEE, ROORKEE - 2022
ALL RIGHTS RESERVED
 DECLARATION

We hereby declare that the work which is being presented in this report entitled
“STUDY OF OFDM TRANSMITTER AND RECEIVER” in partial fulfilment of
the requirements for the award of the degree of BACHELOR OF TECHNOLOGY
in Electronics and Communication Engineering to the Department of Electronics
and Communication Engineering, Indian Institute of Technology Roorkee is an
authentic record of our own work carried out under the supervision of Dr. Sandeep
Kumar Singh, Department of Electronics and Communication Engineering, Indian
Institute of Technology Roorkee. This work has been done during August, 2023 to
November 2023. We have not submitted the matter embodied in this report for the
award of any other degree or diploma.

Date: November 28, 2023

Place: Roorkee

Prakhar Surana
(20116063)

i
 CERTIFICATE

This is to certify that the project report entitled “STUDY OF OFDM TRANSMITTER
AND RECEIVER” submitted by Prakhar Surana to the Department of Electronics and
Communication Engineering, Indian Institute of Technology Roorkee toward partial
fulfilment of the requirements for the degree of BACHELOR OF TECHNOLOGY in
Electronics and Communication Engineering is a record of bonafide work carried out
under my supervision and guidance.

Date: November 28, 2023

Place: Roorkee

Dr. Sandeep Kumar Singh

Assistant Professor
Department of Electronics and Communication Engineering
Indian Institute of Technology Roorkee

ii
 ACKNOWLEDGEMENT

I would like to thank Professor Sandeep Kumar Singh and Professor Ekant Sharma for
continuously guiding me throughout the project and believing in me.

iii
 ABSTRACT

The trend in digital design favours System-on-a-Chip (SoC) because of its numerous
advantages over discrete electronics, including higher speed, lower power consumption,
smaller size, and lower cost. Platforms such as FPGA are increasingly being used in SoC
design due to their low cost, higher capacity, and better speed.

The goal of this project is to create a single-chip OFDM transmitter and receiver using
Verilog HDL. OFDM is a multi-carrier modulation or MCM technique that is widely used
in digital communication systems such as 3G GSM, WiMAX, and LTE and is known for
its resistance to channel fading in wireless environments.

The OFDM design incorporates radix-2 algorithm of 8-points IFFT/FFT decimation-in-

frequency, crucial for digital signal processing in OFDM.
Altera's Quartus II environment can be used to simulate the implementation on the FPGA
platform.
For improved performance, a different modulation scheme combining ASK, PSK, FSK,
and QAM may be used in the future.

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 CONTENTS

Cover Page
Copyright declaration ....................................................................................................... (i)
Declaration ........................................................................................................................ (i)
Certificate ........................................................................................................................ (ii)
Acknowledgement .......................................................................................................... (iii)
Abstract ........................................................................................................................... (iv)
Table of contents ..............................................................................................................(v)
List of figures .................................................................................................................. (vi)
List of tables .................................................................................................................. (vii)
Chapter 1 Introduction ..................................................................................................... 8
1.1 Introduction ................................................................................................................ 8
1.2 Basic Digital Communication System ....................................................................... 8
1.3 Motivation of the Project............................................................................................ 9
1.4 Objective of the Project .............................................................................................. 9
Chapter 2 Concept of OFDM ......................................................................................... 10
2.1 What is OFDM? ...................................................................................................... 10
2.2 Basic Principle of OFDM ......................................................................................... 10
2.3 Block Diagram of Implementation ........................................................................... 12
2.4 FFT & IFFT .............................................................................................................. 14
2.5 Cyclic Prefix ............................................................................................................. 14
Chapter 3 Design of an 8-point IFFT/FFT .................................................................... 16
3.1 Introduction .............................................................................................................. 16
3.2 8-point IFFT and FFT .............................................................................................. 16
Chapter 4 Results, Conclusion and Future Work ........................................................ 24
References......................................................................................................................... 26

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 LIST OF FIGURES

Figure No. Description Page No.

1.1 Block Diagram of Digital Communication 8
2.1 Comparison of Wireless transmissions 10
2.2 Example of single channel 10
2.3 Division of Channel into N different channels 11
2.4 Schematic block of OFDM Transmitter 12
2.5 Schematic block of OFDM Receiver 13
2.6 Block Diagram of OFDM Scheme 13
2.7 Cyclic Prefix 15
3.1 Structural Implementation of 8-point IFFT 17
3.2 Stage 1 of Structural Implementation of IFFT 18
3.3 Stage 2 of Structural Implementation of IFFT 18
3.4 Stage 3 of Structural Implementation of IFFT 19
3.5 Output Equations of 8-point IFFT 19
3.6 Structural Implementation of 8-point FFT 21
3.7 Stage 1 of Structural Implementation of FFT 21
3.8 Stage 2 of Structural Implementation of FFT 22
3.9 Stage 3 of Structural Implementation of FFT 22
4.1 Result of BFSK modulator 24
4.2 Result of PISO and SIPO convertor 24

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 LIST OF TABLES

Table No. Description Page No.

2.1 Symmetric properties of 𝑊8𝑀 14
3.1 Final equations for the IFFT processor 20
3.2 Final equations for the FFT processor 23

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 Chapter 1

Introduction
1.1. Introduction
Wireless technology plays an important role in modern society, extending its influence
beyond communication to include a wide range of industrial applications. Wireless
technology's pervasiveness can be attributed to remarkable advances in digital
communication and applied electronics. The landscape of communication systems has
overwhelmingly embraced digital formats, including television, mobile communication,
radio communication, satellite communication, and both wired and wireless internet.
Because of the noise resistance and associated benefits, techniques such as Orthogonal
Frequency Division Multiplexing (OFDM) find widespread application within these
systems.

1.2 Basic Digital Communication System

The transmission of information via these three components constitutes a communication
system: transmitter, channel, and the receiver, as depicted in Figure 1.1.

Figure 1.1 Block Diagram of Digital Communication

Source: Adapted from [1]

8
The information source generates messages for transmission. The transmitter comprises a
formatter, source encoder, channel encoder, and a modulator (based on different
schemes). The formatter transforms the signal type, the source encoder efficiently
represents information, and the channel encoder helps in error correction and detection by
increasing data redundancy. Modulation converts the baseband signal to a bandpass
signal for transmission.
During transmission, signals face noise that attenuates amplitude and distorts phase. Both
wired and wireless media contribute to signal impairment. In the receiver, the opposite
steps occur to recover the transmitted information effectively. The receiver aims to
reconstruct the original information, mirroring the transmission process.

1.3 Motivation of the project

OFDM is widely used in systems like 3G GSM, WiMAX, and 4G LTE. Its foundation
lies in Fast Fourier Transform (FFT), which is used in receiver and Inverse Fast Fourier
Transform (IFFT) which is used in transmitter, allowing multiple channels to overlap
over each other without losing their distinct characteristics. These multiple carriers are
orthogonal in nature. This efficient spectrum utilization enhances processing at the
receiver. The focus is to support higher data rates and minimize Inter-Symbol
Interference. FPGA is used for the implementation and the integration of the entire
process into a single chip offers better performance, reduced power consumption, faster
delivery to market, and more reliability compared to traditional platforms. Capitalizing
on these advantages, this OFDM system will be implemented using FPGA technology.

1.4 Objectives of the project

In the future, the project hopes to accomplish the following goals:

• Designing of an OFDM transmitter and receiver using HDL such as Verilog and
implementation on FPGA board
• Design a new modulation scheme rather than the basic and traditional schemes
with the combination of traditional schemes.

9
 Chapter 2

Concept of OFDM
2.1. What is OFDM?
OFDM or Orthogonal Frequency Division Multiplexinng is a key wireless Broadband
Technology having a Bandwidth upto 20 MHz. It has naturally higher data rates, thus used
in applications like 3G,4G,5G, Wi-fi, WiMax, WLAN, DAB, DVB etc. It is developed to
support higher bit rates and minimize the Inter- Symbol Interference (ISI)

Figure 2.1 Comparison of Wireless transmissions

Source: Adapted from [2]

2.2. Basic Principle of OFDM

Let’s take a single channel which uses all the BW available:

Figure 2.2 Example of single channel

In this, Symbol time T=1/B, thus T=0.1 µs for this case.

Delay Spread of Channel:

10
 Td ≈ 2 to 3 µs => T<< Td

This leads to ISI or the Inter Symbol Interference and as the Bandwidth increases, T
decreases, thus there is a higher chance of ISI, this is a significant challenge in a
broadband wireless system. To overcome ISI, we can divide the band into N sub-bands
and place a single sub-carrier into each band, reducing the Bandwidth of the sub-band and
thus increasing the symbol time T.

-3F0 -2F0 –F0 0 F0 2F0 3F0

Figure 2.3 Division of Channel into N different channels

A system with multiple sub-bands let’s say N sub-bands and multiple sub-carriers is
termed MCM or Multi Carrier Modulated System. For kth subcarrier, Band is at k.F0 or
𝑘𝐵
or 𝑒 𝑗2𝜋𝑘𝐹0 where Xk denotes the kth subcarrier. Thus, the net transmitted MCM signal
𝑁
can be written as:

y(t) = ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘𝐹0𝑡

(This is very similar to the Fourier Series)

To extract Xl or the symbol on lth subcarrier, we employ coherent demodulation with the
factor e−j2πlF0t . By co-relating with ej2πkF0t or matched filtering it with e−j2πkF0(T−t) ,
we can extract the symbol transmitted on lth sub-carrier.

𝟏/𝑭𝟎
= F0.∫𝟎 𝑒 −𝑗2𝜋𝑙𝐹0𝑡 . 𝒚(𝒕). 𝒅𝒕

𝟏/𝑭𝟎
= F0.∫𝟎 𝑒 −𝑗2𝜋𝑙𝐹0𝑡 . ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘𝐹0𝑡 . 𝒅𝒕

𝟏/𝑭𝟎 𝑗2𝜋(𝑘−𝑙)𝐹0𝑡
= ∑𝑘 Xk .F0.∫𝟎 𝑒 . 𝒅𝒕

Since this is a sinusoidal function, and we are integrating over a fundamental period.
Thus, the later part reduces to 1 when k=l and 0 when k≠l. After this step, Xl is recovered.

11
Because of the large number of sub-carriers present, generating x(t) is difficult. How can
we solve this issue? Because the signal is bandlimited to Fmax, it can be sampled at the
Nyquist rate of 2. Fmax, resulting in the following sampling interval:

1 𝑩 1
T = 2.𝐹𝑚𝑎𝑥, where Fmax = 𝟐 , thus, T = 𝐵

𝑙
Let lth sample is taken at l.T or 𝐵

x(t) = ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘𝐹0𝑡 thus, x(l) = x(l.T) = ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘𝐹0𝑙𝑇

𝟏 𝑩
Putting T = 𝑩 and F0 = 𝑵, we get: x(l) = ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘𝑙/𝑁

This is the lth IDFT point of X0,X1,X2,X3………..XN-1, which represent the symbols
that are transmitted over the N different sub-carriers.

2.3. Block Diagrams of implementation:

The following figures represent the block diagram of transmitter, receiver and the overall
OFDM scheme.

Figure 2.4 Schematic block of OFDM Transmitter

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Figure 2.5 Schematic block of OFDM Receiver

Figure 2.6 Block Diagram of OFDM Scheme

Source: Adapted from [5]

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2.4. FFT and IFFT:
Suppose the system has N subcarriers, dividing the channel into N different sub-channels;
this function of IFFT receives N sinusoidal along with N symbols at a time. The total N
sinusoidal signals that make up a single OFDM symbol are the output of this N-point
IFFT. The transmitted OFDM symbol defined by the Inverse Discrete Fourier Transform
(IDFT) is as follows:

1
x(n) = 𝑁 ∑𝑘 Xk 𝑒 𝑗2𝜋𝑘/𝑁

And the DFT can be written as:

X(k) = ∑𝑘 x(n) 𝑒 −𝑗2𝜋𝑘/𝑁

X(k) = ∑𝑘 x(n) 𝑊𝑁𝑛𝑘

Where 𝑊𝑁𝑛𝑘 = 𝑒𝑗2𝜋𝑘/𝑁, is known as the Twiddle Factor.

Table 2.1 Symmetric properties of 𝑊8𝑀

2.5. Cyclic Prefix:

Model for frequency selective channel can be derived as:

y(n) = h(0).x(n) +h(1).x(n-1)+…………..+h(L-1).x(n-L+1)

X’0 X’1 ……………….. X’N-1 → x’(0) x’(1) ……………… x’(N-1) (IFFT)

Output for x(0): y(0) = h(0).x(0) +h(1).x’(N-1)+h(2).x’(N-2)+…………..

This issue is called Inter-Block Interference (IBI) and to avoid IBI, we use Cyclic Prefix
(C.P.), in which we take L samples from the tail and then add them at the prefix.
14
We are taking L samples from the end or the tail of the OFDM block and cycling them.
We are moving them to the prefix of the transmitted OFDM block and we are adding this
prefix to the transmitted OFDM block, This this is called cyclic prefix.

Now,

y(0) = h(0).x(0) + h(1).x(N-1) + h(2).x(N-2) +…………..+ h(L-1).x(N-L+1)

y(1) = h(0).x(1) + h(1).x(0) + h(2).x(N-1) +……………...+ h(L-1).x(N-L+2)

Thus, the Output signal is a circular convolution h ⊛ x

Figure 2.7 Cyclic Prefix

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 Chapter 3

Design of an 8-point IFFT/FFT

3.1 Introduction:
The Fast Fourier Transformation has a much faster computational time than the Discrete
Fourier Transform because the number of operations in FFT is N.log2N, which is less than
that of N2 of DFT. Because their operations are nearly identical except for the scaling and
conjugation of the twiddle factor in FFT, the computational time between FFT and IFFT is
presumed to be the same.

3.2 : 8- point IFFT and FFT:

The basic processing block in a transmitter is an IFFT block. We are considering an 8-
point IFFT for the project so that the results are accurate, but the complexity of the project
is less. We can have 16,32,64… point IFFT as well but this would increase the complexity
of the project, but at the trade off more accurate results.

This can be calculated by implementing a single butterfly computation in the data path
unit for IFFT operation. A control unit determines the stage of operations and controls the
data path. The control unit feeds the appropriate pairs of inputs into the butterfly
computation, and the output pairs are saved in memory. Each pair will undergo multiples
of butterfly computation in stage 1. For 8-point IFFT, there would be a total of log2N
stages. Assume the input string bits are x0, x1, x2 upto x7. The result of Stage 1 of IFFT
computation would be stored in certain memory location, let’s call it M. The output from
Stage 1 is fed into Stage 2 of the operation. At stage 2, the result in memory M acts as
input and is fed into butterfly computation in the suitable pairs. The output from Stage 2
would be stored in the same memory location in which the Output of Stage 1 was stored,
M. The output from Stage 2, acts as input and is fed into Stage 3 of the operation. For an
8-point IFFT, the process terminates at Stage 3, which is calculated by taking log with a
base 2. Final Output is the output so obtained after Stage 3 and is the computed Inverse
Fast Fourier Transform (IFFT) and the equations are formed after that.

16
 Figure 3.1 Structural Implementation 8-point of IFFT
Source: Adapted from [6]

For simplicity, we can calculate the outputs of these stages using the twiddle factor and
calculate the final output of the 8-point IFFT operation.

17
Figure 3.2 Stage 1 of Structural Implementation of IFFT
Source: Adapted from [6]

Figure 3.3 Stage 2 of Structural Implementation of IFFT

Source: Adapted from [6]
18
 Figure 3.4 Stage 3 of Structural Implementation of IFFT
Source: Adapted from [6]
The final output equations derived are shown as below:

Figure 3.5 Output Equations of 8-point IFFT

Source: Adapted from [6]

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 Table 3.1 Final equations for the IFFT processor

The processing block in a receiver is a Fast Fourier Transform (FFT) block. We are
considering an 8- point FFT for the project so that the results are accurate, but the
complexity of the project is less. We can have 16,32,64… point FFT as well but this
would increase the complexity of the project, but at the trade off more accurate results.

The computation is similar to that of the IFFT block. The computation equation for FFT is
very much identical to those of IFFT equation. The only change it has that it has a
negative sign in the twiddle factor and a variation in the scaling factor.

The 8-point FFT has 3 stages in total and Stage 1 accepts the input directly from the rxr.
This figure shows the 3 stages of 8-point FFT:

20
 Figure 3.6 Structural Implementation 8-point of FFT
Source: Adapted from [6]
For simplicity, we can calculate the outputs of these stages using the obtained twiddle
factor and scaling factor and calculate the final output of the 8-point FFT operation.

Figure 3.7 Stage 1 of Structural Implementation of FFT

Source: Adapted from [6]

21
Figure 3.8 Stage 2 of Structural Implementation of FFT
Source: Adapted from [6]

Figure 3.9 Stage 3 of Structural Implementation of FFT

Source: Adapted from [6]

22
The final output equations can be written as below:

Table 3.2 Final equations for the FFT processor

23
 Chapter 4

Results, Conclusion and Future Work

3.1. Results:

The result of a few blocks of OFDM is shown as below:

Figure 4.1 Result of BFSK modulator

Figure 4.2 Result of PISO and SIPO convertor

3.2. Conclusion
Complete study of OFDM has been done and the implementation of Modulation and
Demodulation using BFSK, Serial to Parallel converter, Parallel to serial Converter has
been achieved with Verilog. The final output for FFT and IFFT functions have been
computed and it can be written in Verilog using shifters. It is also proved that the number
of operations using FFT is much lesser as compared to that in DFT, thus complexity is
lesser.

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3.3 Future Works:

• Completing the codes for FFT and IFFT and implementation on FPGA for better
accuracy and connecting them together as a single structure.

• The proposed FFT and IFFT blocks can be implemented using higher orders like
16-point, 32-point, 64-point to have better accuracy.

• Designing a new Modulation scheme by the combination of ASK, PSK and FSK.

25
References
[1] “Block diagram of Digital Communication,” Electronics Coach. (accessed Nov.
28, 2023).

[2] “Orthogonal Frequency Division Multiplexing (OFDM)”, Tech Target.

(accessed Nov. 28, 2023).

[3] Kapoor, Shivam & Marchok, Daniel & Huang, Yih-Fang. (2000). Adaptive
interference suppression in multiuser wireless OFDM systems using antenna
arrays. Signal Processing, IEEE Transactions on. 47. 3381 - 3391.
10.1109/78.806081.

[4] H. K. S. N. . et. al., “Fpga Implementation Of Digital Modulation Schemes

Using Verilog Hdl”, TURCOMAT, vol. 12, no. 12, pp. 2442–2451, May 2021.

[5] Karimian, Miss & Yazdani, Javad. (2011). Design and Analysis of OFDM
System for Powerline Based Communication

[6] F. Ahmed, M. L. Ali and M. I. H. B. Asad, "Design of a high speed OFDM

transmitter and receiver," 8th International Conference on Electrical and Computer
Engineering, Dhaka, Bangladesh, 2014, pp. 425-428, doi:
10.1109/ICECE.2014.7026872

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