Bonifacio, Jun Lab 1

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Course: Logic Circuits and Design Section: CPE22S2

Name: Bonifacio, Jun Date Performed: January 25, 2023


Instructor: Engr. Marte Nipas Date Submitted: February 17, 2023

LABORATORY EXPERIMENT NO.1

LOGIC GATES

1. Objective(s):
The activity aims to:
The activity aims to construct a logic circuit in a breadboard and multiSIM software.
2. Intended Learning Outcomes (ILOs):

The students shall be able to:


1. Classify the Logic Gates such as AND, OR, NOT Gate, NAND, NOR, Ex-OR and Ex-NOR Gate.
2. Represents the functions of each gate by truth table, Logic Diagrams and Boolean Algebra.
3. Construct a simple circuit in multisim using Logic Gates.
3. Discussion:
MultiSIM is a software simulation tool that is used to reinforce the theory presented in
each chapter. It provides an accurate simulation of digital and analog circuit operation along with
a simulation of instruments used by a technician to measure IC, component, and circuit
characteristics. With this software, you have the ability to build and test most of the circuits.

TTL Standard

The standard configuration allows for supply power to operate through pin 14 (Vcc) and common ground pin

7. In order to identify pin 1 on various DIP packages a deep circle indicates pin 1 and
preceding pins counter clockwise around the chip. A logic diagram shows all connections
between logic elements (example: two input AND gates), but may omit symbols for input
(switch), output (LED), Vcc (+5V) and ground (0V) connections of the chip.
The Breadboard.
A breadboard is used to build and test circuits quickly before finalizing any circuit design. The breadboard has

many holes into which circuit components like ICs and resistors can be inserted as shown in the figure 2.1.

Figure 1.1 : Breadboard

The bread board has strips of metal which run underneath the board and connect the holes on the top of

the board. The metal strips are laid out as shown above. Note that the top and bottom rows of holes are

connected horizontally while the remaining holes are connected vertically. To use the bread board, the

legs of components are placed in the holes. Each set of holes connected by a metal strip underneath

forms a node. A node is a point in a circuit where two components are connected. Connections between

different components are formed by putting their legs in a common node. The long top and bottom row of

holes are usually used for power supply connections. The rest of the circuit is built by placing components

and connecting them together with connecting wires. ICs are placed in the middle of the board so that

half of the legs are on one side of the middle line and half on the other, avoiding short circuit that may

damage the IC.


Logic Gates
Logic gates are the basic building blocks for forming digital electronic circuitry. A logic
gate has one output terminal and one or more input terminals. Its output will be HIGH
(1) or LOW (0) depending on the digital level(s) at the input terminal(s). Through the
use of logic gates, we can design digital systems that will evaluate digital input levels
and produce a specific output response based on that particular logic circuit design.

Basic Gates
The three (3) basic logic gates are the AND, OR, and NOT.
1. 74LS08 is an AND Gate function. The AND gate circuit diagram is shown in figure 2.2. The output

is high when both the inputs are high. The output is at a low level when any of the inputs are low. The

Boolean equation of an AND gate is x * y or XY and the gate performs logical multiplication.

(a) (b)

Figure 1.2: AND Gate (a) Pin Configuration (b) AND gate symbol

2. 74LS32 is an OR Gate. The OR gate circuit diagram is shown in figure 2.3. The output is
high when any of the inputs is high. The output is low level when both the inputs are low.
The Boolean equation of an OR gate is x + y and the gate performs logical addition.
(a) (b)
Figure 1.3: OR Gate (a) Pin Configuration (b) OR gate symbol
3. 74LS04 is a NOT Gate. The NOT gate circuit diagram is shown in figure 2.4. The
output is high when the input is low. The output is low when input is high. The
Boolean equation of NOT gate is x’ or x and the gate performs logical inverter.

(a) (b)

Universal Gate
A universal gate is a gate that can implement or function as any Basic Gates. The NAND and NOR

gates are universal. In practice, using these gates is advantageous since NAND and NOR gates are

economical and easier to fabricate. These universal gates are quite similar to basic gates. The mere

difference is that the inverter is added to AND and OR gate to complement these basic gates.

The two (2) basic logic gates are the NAND and NOR.
1. 74LS00 is a NAND Gate function. The NAND gate circuit diagram is shown in figure 2.5. The output is high

when one of the inputs is low. The output is a low level only when both of the inputs are high. The Boolean

equation of a NAND gate is (x * y)’ or XY and the gate performs logical multiplication and inverts the output.
(a) (b)

Figure 1.5: NAND Gate (a) Pin Configuration (b) NAND gate symbol

2. 74LS02 is a NOR Gate. The output is high only when both of the inputs are low. The output is low when

one of the inputs is high. The Boolean equation of a NOR gate is (x + y) ‘ or x + y and the gate performs

logical addition and inverts the output. The OR gate circuit diagram is shown in figure 2.5.

(a) (b)

Figure 1.6: NOR Gate (a) Pin Configuration (b) NOR gate symbol

The two (2) Coincidence Logic Gates are the XOR and XNOR.
1. 74LS86 is an XOR Gate. The XOR gate circuit diagram is shown in figure 2.7 known as the exclusive OR

operator, a Boolean operator that returns a low output value only if both of the inputs are high or if both of

the inputs are low. If inputs are not of the same level (high and low), it gives high output.

a) (b)
Figure 1.7: XOR Gate (a) Pin Configuration (b) XOR gate
symbol
2. XNOR Gate. In contrast with XOR, an exclusive NOR operator returns a value a high output if
both of the inputs are high or if both of the inputs are low. If inputs are not of the same level
(high and low), it gives a low output. The XNOR gate circuit diagram is shown in figure 2.4.

a) (b)

Figure 1.8: XNOR Gate (a) Pin Configuration (b) XNOR gate symbol

4. Resources:

1 Computer Set with MultiSIM software

5. Procedure and Output


NOT GATE
1. Place 5v VCC and Ground component (located at the Power Source) at the working area
2. Place the 7404 IC at the working area of the Multisim.
3. Refer to the integrate circuit (IC) pin configuration of TTL 7404. Connect pin 7 of the IC
to the ground and Connect the pin 14 of the IC to the Vcc.
4. Prepare another wire for the input. Insert the first end of the wire connected to pin 1 of
the IC and the other end of the wire to VCC. That will serve as an input with a value of 1.
5. To view the output, insert the positive terminal (commonly the longer pin) of the LED
connected to the output pin (pin 2) and the negative terminal (shorter pin) of the LED to
the ground (connect resistor 300ohms if needed).

Figure 1.9: LED Terminals

6. Click the play button to see the output.


7. Place the screenshot of your work below:

8. Change the Pin 1 connection from VCC to Ground. This will change the value of your input from 1 to 0.

9. Based on your observation, fill up the following truth table in Table 1.1. Use 0 to show
low input/output signal; 1 to show high input/output signal.
Table 1.1 NOT Gate Truth Table

INPUT OUTPUT
0 1
1 0

10. How many INVERTER(s) (gates) does the 7404 HEX inverter have? __6 __
11. Identify the INPUTs and OUTPUTs PIN of the 7404 HEX INVERTER and write your answer in table 2.2

Table 2.2 7404 Input and Output Pins

INPUT PIN OUTPUT PIN


1 2
3 4
5 6
13 12
11 10
9 8

AND GATE
12. Place TTL 7408 IC to the working area of Multisim.
13. Refer to the IC pin Configuration of TTL 7408 IC, connect the pin 7 to ground, and pin 14 to Vcc.

14. Insert one end of the first connecting wire to pin 1. Insert the second connecting wire to
pin 2 and connect both ends of the connecting wire to VCC. This will serve as the input
value of 1 for the first input and input value of 1 to the second input.
15. Check the output in the output pin (pin 3) by inserting the positive terminal of the LED
and the negative terminal of LED to the Ground (connect resistor 300ohms if needed).
16. Click the play button to see the output. Fill up the table below considering the first
connecting wire as the first input and the second connecting wire as the second input.
Change the value of inputs and see what happens to the output.
Table 1.3 AND Gate Truth Table

INPUTS
OUTPUT (Y)
PIN 1 PIN 2
0 0 0
0 1 0
1 0 0
1 1 1

17. How many AND gates does the7408 have?- __4__


18. Identify the INPUTs and OUTPUTs PIN of the 7408 quad 2-input AND gate and write your answer in

table 1.4.
Table 1.4 7408 Input and Output Pins
INPUT PINS OUTPUT PIN
1 3
2
4 6
5
13 11
12
10 8
9
OR GATE
19. Replace the TTL 7408 IC by the TTL 7432 IC.
20. Refer to the IC pin Configuration of TTL 7432 IC. Connect the pin 7 to the ground and the pin 14 to Vcc.

21. Connect both pin 1 and pin 2 wire to the VCC.


22. Check the output in the output pin (pin 3) by inserting the positive terminal of the
LED and the negative terminal of LED to the Ground.
23. Click the play button to start simulating the output.
24. Place the screenshot of your work below:

25. How many OR gates does the 7432 have? ____4____


26. Fill up the table below considering the first connecting wire as the first input and the second connecting
wire as the second input. Change the value of inputs and see what happens to the output.

Table 1.5 OR Gate Truth Table


INPUTS
OUTPUT (Y)
PIN 1 PIN 2
0 0 0
0 1 1
1 0 1
1 1 1

27. Identify the INPUTs and OUTPUTs PIN of the 7432 quad 2-input AND gate and
write your answer in table 1.6.
Table 1.6 - 7432 Input and Output Pins

INPUT PINS OUTPUT PIN


1 3
2
4 6
5
13 11
12
10 8
9

NAND Gate
27. Place the 7400 at the working area of Multisim
28. Refer to the IC pin Configuration of TTL 7400 IC. Connect the pin 7 to ground and the pin 14 to Vcc

29. Connect both Pin 1 and Pin 2 of 7400 to VCC.


30. Insert the positive terminal of the LED to the hole connected to pin 3 and the
negative terminal of LED to the Ground.
31. Click the play button to start simulating the output.
32. Place the screenshot of your work below:
33. Fill up the table below considering the first connecting wire as the first input and the second connecting
wire as the second input. Change the value of inputs and see what happens to the output.

Table 1.7 NAND Gate truth table

INPUTS
OUTPUT (Y)
PIN 1 PIN 2
0 0 1
0 1 1
1 0 1
1 1 0

35. How many NAND gates does the7400 have? 4


36. Identify the INPUTs and OUTPUTs PIN of the 7400 quad 2-input AND gate and
write your answer in table 1.8.
Table 1.8 NAND Gate Input and Output Pins

INPUT PINS OUTPUT PIN


1 3
2
4 6
5
13 11
12
10 8
9
XOR GATE
37. Place the 7486 at the working area of Multisim
38. Refer to the IC pin Configuration of TTL 7486 IC. Connect the pin 7 to ground and the pin 14 to Vcc

39. Connect both ends of the two-input pin of the IC to VCC.


40. Insert the positive terminal of the LED to the hole connected to the output pin
and the negative terminal of LED to the Ground.
41. Click the play button to start simulating the output.
42. Place the screenshot of your work below:

43. Fill up the table below considering the first connecting wire as the first input and the
second connecting wire.
Table 1.9 XOR Gate Truth Table

INPUTS
OUTPUT (Y)
PIN 1 PIN 2
0 0 0
0 1 1
1 0 1
1 1 0

44. How many XOR gates does the7486 have? ___4___


45. Identify the INPUTs and OUTPUTs PIN of the 7486 quad 2-input XOR gate and
write your answer in table 1.10

Table 1.10 XOR Input and Output Pins

INPUT PINS OUTPUT PIN


1 3
2
4 6
5
13 11
12
10
9

NOR Gate.
46. Place the 7402 at the working area of Multisim
47. Refer to the IC pin Configuration of TTL 7402 IC. Connect the pin 7 to ground and the pin 14 to Vcc

48. Connect both Pin 2 and Pin 3 of 7402 to VCC.


49. Insert the positive terminal of the LED to the hole connected to pin 1 and the
negative terminal of LED to the Ground.
50. Click the play button to start simulating the output.
51. Place the screenshot of your work below:
52. Fill up the table below considering the first connecting wire as the first input and the second connecting

wire as the second input. Change the value of inputs and see what happens to the output.

Table 2.11 NOR Gate Truth Table

INPUTS
OUTPUT (Y)
PIN 1 PIN 2
0 0 1
0 1 0
1 0 0
1 1 0

53. How many NOR gates do the7402 have? 4


54. Identify the INPUTs and OUTPUTs PIN of the 7402 quad 2-input NOR gate and
write your answer in table 2.12.

Table 2.12 NOR Gate Input and Output Pins


INPUT PINS OUTPUT PIN
0 1
0
0 0
1
1 0
0
1 0
1

XNOR Gate
1. Place the IC with CMOS IC 4077 or TTL 7466 IC or TTL 7451 IC at the working area of Multisim
2. Refer to the IC pin Configuration. Connect the pin 7 to ground and the pin 14 to Vcc
3. Connect both ends of the two-input pin of the IC to VCC.
4. Insert the positive terminal of the LED to the hole connected to the output pin and the
negative terminal of LED to the Ground.
5. Click the play button to start simulating the output.
6. Place the screenshot of your work below:
7. Fill up the table below considering the first connecting wire as the first input and the second connecting

wire as the second input. Change the value of inputs and see what happens to the output.

Table 1.13 XNOR Gate Truth Table

INPUTS
OUTPUT (Y)
PIN 1 PIN 2

0 0 1

0 1 0

1 0 0

1 1 1

8. How many XNOR gates does the IC you used have? 4


9. Identify the INPUTs and OUTPUTs PIN of the XNOR IC and write your answer in table 1.14.
Table 1.14 XNOR Gate Input and Output Pins

INPUT PINS OUTPUT PIN


0 1
0
0 0
1
1 0
0
1 1
1
6. Data and Results:

Problem A:
1. Construct the circuit on figure 1.10 on your Multisim. Take note of the number assigned inside
the logic gate symbols. This denotes the IC number package designation for each IC that you
will use. The number outside the IC indicates the PIN of IC. Refer to the IC pin configuration.

Figure 1.10: Basic Logic Gates

2. Write the Y equivalent logic expression: _Y=XW+XW’+X’W___________


3. Change the value of the inputs w and x to 0 or 1 and write your answer on below.

Table 1.15: Truth Table for Problem A

INPUT NOT Gate AND Gate OR Gate OUTPUT


W X 3 3 1 1 1 2 2 Y
0 0 1 1 0 1 0 1 1 0
0 1 1 0 0 1 0 0 0 1
1 0 0 1 1 0 1 0 0 1
1 1 1 0 0 1 0 1 1 1

4. Place the circuit diagram below using Multisim software.


Problem B:
1. Construct the given circuit in figure 1.11 on your Multisim. Determine the input
and output pin configuration and write the equivalent pin number.

Figure 1.11: Basic and Universal Logic Gates

2. Write the Y equivalent logic expression: [(A’vB)’^ (B^C)]’


3. Change the value of the inputs A, B and C to 0 or 1 and write your answer on the table below.

Table 1.16: Truth Table for Problem B


INPUT NOT NOR AND OUTPUT

A B C 1 Z 3 4
0 0 0 1 0 0 0
0 0 1 1 1 0 0
0 1 0 1 0 0 0
0 1 1 1 0 1 1
1 0 0 0 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 0 0
1 1 1 0 0 1 1
4. Draw the equivalent circuit diagram using Multisim software.

Conclusion:

All in all, this Laboratory involves constructing logic circuits on both a breadboard and

MultiSIM software, is a valuable exercise for learning about digital electronics and computer

engineering. Consequently, we can learn about tinkering with input and output pin number This

activity provides hands-on experience in building and testing logic gates, which helps students to

develop their problem-solving skills and gain a better understanding of the practical applications

of logic gates. This activity is an excellent way to introduce students to fundamental concepts of

digital electronics.
Based from the results of the experiment, what general rule can you apply for?

NOT gate: Inverts the input signal.

AND gate: Outputs a high signal only when all inputs are high.

OR gate: Outputs a high signal when at least one input is high.

NAND gate: Negates the output of an AND gate.

NOR gate: Negates the output of an OR gate.

XOR gate: Outputs a high signal when the number of high inputs is odd.

XNOR gate: Negates the output of an XOR gate.


SCREENSHOTS:

NOT GATE

AND GATE

OR GATE
NAND GATE

XOR GATE

NOR GATE
XNOR GATE

PROBLEM A

PROBLEM B

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