ELC 122 Basics of Computer Organisation
ELC 122 Basics of Computer Organisation
ELC 122 Basics of Computer Organisation
The basic block diagram of a computer system is shown in the figure. Components are
connected to each other using buses. The different components include internal
memory, external memory, CPU and i/o devices connected using interfaces.
• CPU- It stands for central processing unit. It is the component that carries out
operation on the data. The operations are usually arithmetic or logical in nature.
• Internal/External Memory- Memory is required to store operations in form of
instructions and data.
• I/o devices- these devices are used to send or receive data from the processor.
• Buses- they are used to connect the components.
1. General purpose registers are available to user to store any type of information,
i.e address, data, etc.
2. Special function registers are used to store some specific information and
these are used by the CPU to control the operation of various hardware blocks
inside the CPU. Some common type of SPRs-
• Program counter- holds the address of next instruction to be executed
• Stack pointer – points to the top of the stack. It tells the CPU where the
instruction should be pushed or popped.
• Instruction register- holds instruction.
• Instruction pointer register- it points where the instruction should be
brought to the execution.
• Memory address register- the contents of this register is memory
address and it points to the location of where the data and operand
should be fetched.
• Memory buffer register- it holds the data to be stored in a specified
memory location.
• Data register- it holds the data to be pushed onto the stack that has been
popped out of the stack
• Flag register- it is a collection of one bit flip flops where each flip flops
indicate certain condition that exist upon execution of an instruction.
Register Based CPU Organization
Consider a general register organization containing 7 general purpose registers and one
i/p o/p source. There will be requirement of two 8: 1 multiplexer where each multiplexer
is providing output for A bus and B bus.
The inputs to the ALU are A bus and B bus and the Alu has single output which can be
used to store the data back in registers or provide the data to an external output line.
The 8: 1 multiplexer requires 3 select lines as sel w A, sel B and sel D is required to
select one of the & registers by using a 3: 8 decoder.
To illustrate,
001 R1
010 R2
011 R3
100 R4
101 R5
110 R6
111 R7
000 External input
To carry out an operation like R3 + R5 = R6, control unit generate signals to specify
operands and the destination.
So control input generates 011 and places it on sel A to select one operand. Similarly R5
generates 101 and places it on select B to select other operand and 110 for sel D to
select destination also say 00000 control is generated and placed on the operation
select line to specify the addition operation.
Thus, the control bit generated a 14 bit signal to carry out the operation R3+R5=R6.
This 14 bit combination is called a control word.
Stack Organization
Stack is last in first out list. It is used in such a way that it can be accessed in only one
direction.
Stack pointer is a register that points to the top of the stack.
There can be two operations carried in case of stack-
1. Push operation- inserting an item in a list
2. Pop operation- deleting an item from a list.
Need of an interface-
1. CPU is primarily an electronic device while IO devices can be electromechanical
devices.
2. CPU is a fast device while lot many IO devices may not share the same
characteristic.
3. Data code and format used by IO devices is different than the same of the CPU.
4. Each peripheral devices work differently and working of one shall not affect the
working of other.
Typical block diagram of I/O interface-
• The Command register decides how the interface should behave. Command
registers are used to issue commands and control various aspects of I/O
devices, such as data transfer, device status, and communication protocols.
• The Status registers are used to store information about the current state or
status of various aspects of hardware components, including I/O devices.
• The role of an address decoder is to decode memory addresses or address
ranges provided by the CPU. It takes the address as input and produces output
signals that select the appropriate memory location or device based on the
address mapping defined in the system.
• The primary role of a data buffer is to provide temporary storage for data that is
being transferred between different components in a computer system. For
example, when data is read from a storage device (such as a hard drive or solid-
state drive), it is first stored in a buffer before being processed by the CPU or
transferred to memory.
If correct device address is sent by the CPU the output of the address decoder enables
the chip. Only then the input output device can communicate with the CPU.
Read/write control signals are generated by the CPU when device wants to send
information to the CPU or CPU wants to send data to o/p device.
The selection of the register can be done with two register select bit- Rs0 and Rs1.
In such a way that,