ELC 122 Basics of Computer Organisation

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Basics of Computer System

Basics of computer organization

The basic block diagram of a computer system is shown in the figure. Components are
connected to each other using buses. The different components include internal
memory, external memory, CPU and i/o devices connected using interfaces.

• CPU- It stands for central processing unit. It is the component that carries out
operation on the data. The operations are usually arithmetic or logical in nature.
• Internal/External Memory- Memory is required to store operations in form of
instructions and data.
• I/o devices- these devices are used to send or receive data from the processor.
• Buses- they are used to connect the components.

Concept of address bus and data bus and control


bus
• Address bus- It is a group of lines carrying addresses such that n bit address bus
will access 2n different locations.
• Two-bit address bus can access 4 addresses namely 00, 01, 10, 11. Similarly, 4
bit can access 16 addresses while 8 can access 256, 16 can access 65536 and
20 bits can access 1048576 addresses.
• Address bus is unidirectional.
• Address lines are not only used to access memory locations but also to access
I/O devices.
• Data bus- it is a group of lines that carry data. Data bus is bidirectional i.e. it can
flow from processor to device, memory to device and memory to processor.
• Consider a CPU with 8-bit data bus. It can send or receive * bits of data at a time
while one with 16 bits can do accordingly.
• Control Bus- Control bits are a group of lines that carry control information that
commands and controls the operations of I/O interfaces and other hardware
units in a computer system.

CPU block diagram and explanation


// diagram
• Important blocks of CPU-Arithmetic and logic unit, control unit, registers and
instruction decoder.
• Role of ALU- it performs various arithmetic and logical operations.
• Registers- Registers are used for temporary storage to store the data during
input or output.
• Control unit- Control unit is responsible for coordinating and synchronization of
various hardware blocks and blocks connected to the CPU. Unique control
signals are generated for every operation and their duration is different as well.
• Instruction Decoder- It is responsible for decoding instructions.

Various registers in CPU


1. Program visible- program visible registers can be accessed by the user using
appropriate instructions.
2. Program invisible- Program invisible registers cannot be accessed by the user
but can be accessed by the CPU only.
Program Visible
Registers

General Purpose Special Function


Register Register

1. General purpose registers are available to user to store any type of information,
i.e address, data, etc.
2. Special function registers are used to store some specific information and
these are used by the CPU to control the operation of various hardware blocks
inside the CPU. Some common type of SPRs-
• Program counter- holds the address of next instruction to be executed
• Stack pointer – points to the top of the stack. It tells the CPU where the
instruction should be pushed or popped.
• Instruction register- holds instruction.
• Instruction pointer register- it points where the instruction should be
brought to the execution.
• Memory address register- the contents of this register is memory
address and it points to the location of where the data and operand
should be fetched.
• Memory buffer register- it holds the data to be stored in a specified
memory location.
• Data register- it holds the data to be pushed onto the stack that has been
popped out of the stack
• Flag register- it is a collection of one bit flip flops where each flip flops
indicate certain condition that exist upon execution of an instruction.
Register Based CPU Organization

Consider a general register organization containing 7 general purpose registers and one
i/p o/p source. There will be requirement of two 8: 1 multiplexer where each multiplexer
is providing output for A bus and B bus.
The inputs to the ALU are A bus and B bus and the Alu has single output which can be
used to store the data back in registers or provide the data to an external output line.
The 8: 1 multiplexer requires 3 select lines as sel w A, sel B and sel D is required to
select one of the & registers by using a 3: 8 decoder.
To illustrate,
001 R1
010 R2
011 R3
100 R4
101 R5
110 R6
111 R7
000 External input
To carry out an operation like R3 + R5 = R6, control unit generate signals to specify
operands and the destination.
So control input generates 011 and places it on sel A to select one operand. Similarly R5
generates 101 and places it on select B to select other operand and 110 for sel D to
select destination also say 00000 control is generated and placed on the operation
select line to specify the addition operation.
Thus, the control bit generated a 14 bit signal to carry out the operation R3+R5=R6.
This 14 bit combination is called a control word.

Stack Organization
Stack is last in first out list. It is used in such a way that it can be accessed in only one
direction.
Stack pointer is a register that points to the top of the stack.
There can be two operations carried in case of stack-
1. Push operation- inserting an item in a list
2. Pop operation- deleting an item from a list.

There are two types of stack-


1. Register stack- it is an arrangement of set of general purpose register to function
as a stack. Registers are small, fast-access storage locations within the CPU that
hold temporary data, operands, addresses, and other essential information for
executing instructions.
Register Stack Operation- The register stack operates similarly to a memory
stack but uses CPU registers instead of memory locations.
It typically has a fixed number of registers dedicated to stack operations, often
called stack registers or stack pointer registers.
Pushing data onto the register stack involves storing values in the stack registers,
while popping data involves retrieving values from these registers.

2. Memory stack- it is a part of read and write memory used as a stack.


A memory stack is a data structure used for managing memory in computer
systems. It follows the Last-In-First-Out (LIFO) principle, where the last item
pushed onto the stack is the first one popped off. Here's a detailed explanation
of a memory stack.
Memory Allocation: It grows and shrinks dynamically as data is pushed onto or
popped off the stack during program execution.
Stack Pointer: The stack pointer (SP) is a special register or memory location that
points to the top of the memory stack. It keeps track of the current stack position
and is updated with each push or pop operation.
Stack Frames: The memory stack is often organized into stack frames, also
known as activation records, for managing function calls and local variables.
Each stack frame corresponds to a function call or procedure invocation and
contains parameters, local variables, return addresses, and other relevant data.
Operations:
Push Operation: Adding data to the stack involves incrementing the stack pointer
and storing the data at the new stack position.
Pop Operation: Removing data from the stack involves retrieving the data from
the current stack position and decrementing the stack pointer.
Function Calls: Memory stacks are crucial for managing function calls and
returns in programming languages.
When a function is called, its stack frame is created and pushed onto the stack,
containing function parameters, local variables, and the return address.
When the function returns, its stack frame is popped off the stack, restoring the
previous stack state.

Input Output Organization


In a typical CPU many external devices are connected. Each device has their own set of
operating mechanism, operating speed, parameters. Hence a system needs to be
developed so that our OS can communicate with outside devices.
Interface-an interface is a communication link between CPU and IO devices for smooth
transfer of information. It is a hardware component with the combination of some
software. The difference between IO devices and CPU is resolved by interfaces.

Need of an interface-
1. CPU is primarily an electronic device while IO devices can be electromechanical
devices.
2. CPU is a fast device while lot many IO devices may not share the same
characteristic.
3. Data code and format used by IO devices is different than the same of the CPU.
4. Each peripheral devices work differently and working of one shall not affect the
working of other.
Typical block diagram of I/O interface-

Typical Block diagram of IO interface has two parts-


1. Input part- Command register, status register.
2. Output part- Read write logic and data buffers.

• The Command register decides how the interface should behave. Command
registers are used to issue commands and control various aspects of I/O
devices, such as data transfer, device status, and communication protocols.
• The Status registers are used to store information about the current state or
status of various aspects of hardware components, including I/O devices.
• The role of an address decoder is to decode memory addresses or address
ranges provided by the CPU. It takes the address as input and produces output
signals that select the appropriate memory location or device based on the
address mapping defined in the system.
• The primary role of a data buffer is to provide temporary storage for data that is
being transferred between different components in a computer system. For
example, when data is read from a storage device (such as a hard drive or solid-
state drive), it is first stored in a buffer before being processed by the CPU or
transferred to memory.

If correct device address is sent by the CPU the output of the address decoder enables
the chip. Only then the input output device can communicate with the CPU.
Read/write control signals are generated by the CPU when device wants to send
information to the CPU or CPU wants to send data to o/p device.
The selection of the register can be done with two register select bit- Rs0 and Rs1.
In such a way that,

CS Rs0 Rs1 Selection


0 X X Interface disabled
1 0 0 Command register
1 0 1 Used to select Status register
1 1 0 Part 1
1 1 1 Part 2

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