MODULE – I

Digital Computers: Introduction, Block diagram of Digital Computer, Definition of

Computer Organization, Computer Design and Computer Architecture. Register Transfer
Language and Micro operations: Register Transfer language, Register Transfer, Bus and
memory transfers, Arithmetic Micro operations, logic micro operations, shift micro
operations, Arithmetic logic shift unit.
Basic Computer Organization and Design: Instruction codes, Computer Registers Computer
instructions, Timing and Control, Instruction cycle, Memory Reference Instructions, Input –
Output and Interrupt.
Digital Computers

A Digital computer can be considered as a digital system that performs various computational
tasks.

The first electronic digital computer was developed in the late 1940s and was used primarily for
numerical computations.

By convention, the digital computers use the binary number system, which has two digits: 0 and
1. A binary digit is called a bit.

A computer system is subdivided into two functional entities: Hardware and Software.

The hardware consists of all the electronic components and electromechanical devices that
comprise the physical entity of the device.

The software of the computer consists of the instructions and data that the computer manipulates
to perform various data-processing tasks.

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o The Central Processing Unit (CPU) contains an arithmetic and logic unit for manipulating
data, a number of registers for storing data, and a control circuit for fetching and executing
instructions.
o The memory unit of a digital computer contains storage for instructions and data. o The
Random Access Memory (RAM) for real-time processing of the data.
o The Input-Output devices for generating inputs from the user and displaying the final
results to the user.
o The Input-Output devices connected to the computer include the keyboard, mouse,
terminals, magnetic disk drives, and other communication devices.

Definition of Computer Organization

 Organization of a computer system is the way of practical implementation that results

in the realization of architectural specifications of a computer system.
 The Architecture of a computer system can be considered as a catalog of tools
available for any operator using the system, while Organization will be the way the
system is structured so that all those cataloged tools can be used, and efficiently.
 You might have used a computer daily, but have you ever wondered how they process
user inputs into results so quickly? That's where the understanding of Computer
Organization and Architecture comes into the picture.
 It helps you delve deeper into the functioning of a computer system.
 Computer Organization and Architecture is a fascinating field that bridges the gap
between hardware and software.
 The subject explores how machines are designed, built, and operate.
 Knowing what's inside and how it works will help you design, develop, and
implement applications better, faster, cheaper, more efficient.
 Computer Organization and Architecture is the study of internal working, structuring,
and implementation of a computer system.

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  Architecture in the computer system, same as anywhere else, refers to the externally
visual attributes of the system

Computer Design and Computer Architecture

 Computer architecture refers to the design of the internal workings of a computer

system, including the CPU, memory, and other hardware components.
 Computer architecture is concerned with optimizing the performance of a
computer system and ensuring that it can execute instructions quickly and
efficiently.

 The architecture of a computer system can be considered as a catalogue of tools

or attributes that are visible to the user such as instruction sets, number of bits
used for data, addressing techniques, etc
Computer Organization
 Organization defines the way the system is structured so that all those catalogued tools can
be used properly.

 computer organization refers to the operational units and their interconnections that
implement the architecture specification

 It deals with how the components of a computer system are arranged and how they interact
to perform the required operations.

 Computer organization is concerned with the physical implementation of the architecture

design and includes decisions about the interconnection and communication between
components, such as the bus structure, memory hierarchy, and input/output systems.
S. No. Computer Architecture Computer Organization

1. Architecture describes what the The Organization describes how it does

computer does. it.

2. Computer Architecture deals Computer Organization deals with a

with the functional behavior of structural relationship.
computer systems.

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3. In the above figure, it’s clear In the above figure, it’s also clear that it
that it deals with high-level deals with low-level design issues.
design issues.

4. Architecture indicates its Whereas Organization indicates its

hardware. performance.

5. As a programmer, you can view The implementation of the architecture

architecture as a series of is called organization.
instructions, addressing modes,
and registers.

6. For designing a computer, an

For designing a computer, its organization is decided after its

architecture is fixed first. architecture.

7. Computer Architecture is also Computer Organization is frequently

called Instruction Set called micro architecture.
Architecture (ISA).

8. Computer Architecture Computer Organization consists of

comprises logical functions physical units like circuit designs,
such as instruction sets, peripherals, and adders.
registers, data types, and
addressing modes.

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9. The different architectural CPU organization is classified into
categories found in our three categories based on the number of
computer systems are as address fields:
follows:
1. Organization of a single Accumulator.
1. Von-Neumann Architecture
2. Organization of general registers
2. Harvard Architecture
3. Stack organization
3. Instruction Set Architecture

4. Micro-architecture

5. System Design

10. It makes the computer’s It offers details on how well the

hardware visible. computer performs.

11. Architecture coordinates the Computer Organization handles the

hardware and software of the segments of the network in a system.
system.

12. The software developer is It escapes the software programmer’s

aware of it. detection.

13. Examples- Intel and AMD Organizational qualities include

created the x86 processor. Sun hardware elements that are invisible to
Microsystems and others the programmer, such as interfacing of
created the SPARC processor. computer and peripherals, memory

Apple, IBM, and Motorola created technologies, and control signals.

the PowerPC.

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Register Transfer Language and Micro operations
A digital computer system connects digital components such as registers, decoders, arithmetic
components, and control logic. To make a comprehensive digital system, these digital modules are
equipped with some common data and control channels.

Register transfer language is a symbolic notation for describing micro-operation transfers between
registers.

The availability of hardware logic circuits that can perform a specified micro-operation and
transfer the outcome of the operation to the same or another register is referred to as register
transfer. The term “language” was coined by programmers to describe programming languages.
This programming language is a method of expressing a computer process through symbols.

Following are some commonly used register transfer example with an example:

1. Accumulator: This is the most commonly used register for storing data read from memory.

2. General-Purpose Registers: These are used to store data on intermediate outcomes during the
execution of a programme. Assembly programming is required to access it.

3. Special Purpose Registers: Users do not have access to the Special Purpose Registers. These are
computer system registers.

MAR: Memory Address Registers are the registers that store the memory unit’s address

MBR: This register stores instructions and data received from and sent from the memory

PC: Program Counter indicates the next command to be executed

IR: Instruction Register stores the to-be-executed instruction

Register Transfer
The replacement operator designates the information moved from one register to another in
symbolic form.

R2 ← R1

It denotes the data transfer from register R1 to register R2.

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In most cases, we want the transfer to happen only under specific control conditions. The following
if-then sentence demonstrates this: If (P=1), (R2 R1)

The control signal P is generated in the control portion.

Micro-Operations
Micro-operations are operations performed on data stored in registers. A micro-operation is a
simple operation that is carried out on data contained in one or more registers.

Example: Load, Shift, count, and clear.

Types of Micro-Operations
The following are the different types of micro-operations:

1. Micro-operations that move binary data from one register to another are known as register
transfers.

2. In registers, arithmetic micro-operations operate on numeric data stored.

3. Bit manipulation operations on non-numeric data are performed by logic micro-operations.

4. Shift micro-operations are data-based shift micro-operations.

1. Arithmetic Micro-Operations Add Micro-Operation

The following statement defines it:

R1 + R2 = R3

The foregoing line tells the computer to add the data or contents of register R1 to the data or
contents of register R2, then transfer the sum to register R3.

Subtract Micro-Operation

Consider the following scenario:

R1 + R2′ + 1 R3

Instead of using the minus operator, we use the complement of 1 and add one to the register being
subtracted.

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Increment/Decrement Micro-Operation

In general, increment and decrement micro-operations are accomplished by adding and removing
1 from the register.

R1 → R1 + 1

R1 → R1 – 1

2. Logic Micro-Operations

These are binary micro-operations carried out on the register bits. These procedures treat each bit
as a binary variable and consider it separately.

Consider the X-OR micro-operation with the contents of R1 and R2 registers.

P: R1 ← R1 X-OR R2

A Control Function is also provided in the above statement.

3. Shift micro-operations

These are the important different types of micro-operations. That means we can move the
register’s contents to the left or right. The serial input shifts a bit to the rightmost position in the
shift left operation, and a bit to the leftmost position in the shift right action.

There are three different sorts of shifts:

a) Logical Shift

The serial input is used to send 0 to the device. The symbols “shl” and “shr” are used to represent
logical shifts left and right, respectively.

R1 ← she R1

R1 ← she R1

b) Circular Shift

This moves the bits of the register around the two ends without losing any data or contents. The
shift register’s serial output is connected to its serial input in this configuration. The terms “cir”
and “cil” stand for left and right circular shifts, respectively.

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d) Shift in Arithmetic

A signed binary number is shifted to the left or right using this method. Arithmetic shift left
multiplies and divides a signed binary number by two. Because the signed number remains the
same when multiplied or divided by two, the sign bit is left unaltered by the arithmetic shift
micro-operation.

Register Transfer language (RTL)

In symbolic notation, it is used to describe the micro-operations transfer among registers. It is a
kind of intermediate representation (IR) that is very close to assembly language, such as that which
is used in a compiler.The term “Register Transfer” can perform micro-operations and transfer the
result of operation to the same or other register.
Micro-operations:
The operation executed on the data store in registers is called micro-operations. They are detailed
low-level instructions used in some designs to implement complex machine instructions.
RegisterTransfer:
The information transformed from one register to another register is represented in symbolic form
by replacement operator is called Register Transfer.
ReplacementOperator:
In the statement, R2 <- R1, <- acts as a replacement operator. This statement defines the transfer
of content of register R1 into register R2.

There are various methods of RTL –

General way of representing a register is by the name of the register enclosed in a rectangular box
as shown in (a).

1. Register is numbered in a sequence of 0 to (n-1) as shown in (b).

2. The numbering of bits in a register can be marked on the top of the box as shown in (c).

3. A 16-bit register PC is divided into 2 parts- Bits (0 to 7) are assigned with lower byte of 16-bit
address and bits (8 to 15) are assigned with higher bytes of 16-bit address as shown in (d).

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Basic symbols of RTL :

Symbol Description Example

Letters and
Denotes a Register MAR, R1, R2
Numbers

R1(8-bit)
() Denotes a part of register R1(0-7)

<- Denotes a transfer of information R2 <- R1

R1 <- R2
Specify two micro-operations of R2 <- R1
,
Register Transfer

P : R2 <- R1 if
P=1
: Denotes conditional operations

Naming Denotes another name for an already

Ra := R1
Operator (:=) existing register/alias

Register Transfer Operations:

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The operation performed on the data stored in the registers is referred to as register transfer
operations.
There are different types of register transfer operations:
1. Simple Transfer – R2 <- R1
The content of R1 are copied into R2 without affecting the content of R1. It is an unconditional
type of transfer operation.
2. Conditional Transfer –

It indicates that if P=1, then the content of R1 is transferred to R2. It is a unidirectional

operation.
3.SimultaneousOperations –
If 2 or more operations are to occur simultaneously then they are separated with comma (,).

If the control function P=1, then load the content of R1 into R2 and at the same clock load
the content of R2 into R1 Bus and memory transfers
Bus Transfer is the most efficient way to transfer data. The data transferred in the bus
transfer is collected using bus lines. Similarly, the transfer of data from the memory unit to
the outside environment and vice versa is known as memory transfer

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Bus Transfer
• In a digital system of registers, a path must be provided to move information.
• Suppose separate lines are used between each register and all other registers in the system.
In that case, the number of wires connecting all of the registers will be excessive because
we are connecting each register with another register.
• A bus structure will not require an excessive connection. Thus it is very useful in
transferring information.
• A bus is made up of a collection of common lines, one for each bit of a register, that are
used to transfer binary data one by one.
There are two methods in bus transfer:
• Bus transfer using Multiplexer
• Bus transfer using Three states bus buffer
The following block diagram shows a Bus system for four registers. It is constructed with the
help of four 4 * 1 Multiplexers each having four data inputs (0 through 3) and two selection
inputs (S1 and S2).

We have used labels to make it more convenient for you to understand the input-output
configuration of a Bus system for four registers. For instance, output 1 of register A is
connected to input 0 of MUX1.

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The two selection lines S1 and S2 are connected to the selection inputs of all four multiplexers.
The selection lines choose the four bits of one register and transfer them into the four-line
common bus.

When both of the select lines are at low logic, i.e. S1S0 = 00, the 0 data inputs of all four
multiplexers are selected and applied to the outputs that forms the bus. This, in turn, causes the
bus lines to receive the content of register A since the outputs of this register are connected to
the 0 data inputs of the multiplexers.

Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the content
provided by register B.

The following function table shows the register that is selected by the bus for each of the four
possible binary values of the Selection lines.

A bus system can also be constructed using three-state gates instead of multiplexers.

The three state gates can be considered as a digital circuit that has three gates, two of which
are signals equivalent to logic 1 and 0 as in a conventional gate. However, the third gate
exhibits a high-impedance state.

The most commonly used three state gates in case of the bus system is a buffer gate.

The graphical symbol of a three-state buffer gate can be represented as:

The following diagram demonstrates the construction of a bus system with three-state buffers.

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 o The outputs generated by the four buffers are connected to form a single bus line. o
Only one buffer can be in active state at a given point of time.

o The control inputs to the buffers determine which of the four normal inputs will
communicate with the bus line.
o A 2 * 4 decoder ensures that no more than one control input is active at any given point
of time.

Memory Transfer

o There are two memory operations in memory transfer

o Read Operation: It is the transfer of the data from memory to the outside environment.
o Write Operation: It is the transfer of the new data to be stored to the memory. o Let
us have a look at some of the registers and abbreviations used for memory:
o MBR: MBR stands for memory buffer register. It is also known as (Memory Data
Register) MDR. It stores the data being transferred to and from memory.
o MAR: The Memory Address Register(MAR) is the CPU register used to store the
memory’s address at which the data is stored and fetched. It is often represented as
AR(Address Register). M represents the memory word.
o Read Operation
o The transfer of data from the Address Register into the Memory Buffer Register is
known as the Read Operation.
o The read operation is represented by MBR ← [AR] M . It states that the Memory
Unit M is transferred from [AR] representing Address register to Memory Buffer
Register (MBA). o Write Operation o Write Operation is the transfer of new data

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 into the memory. o The write operation is denoted by [AR] M ← R1. It states that the
Memory M from Register R1 is transferred to Address Register([AR]).
o

Arithmetic Micro operations

We can perform arithmetic operations on the numeric data which is stored inside the registers.
Example :
R3 <- R1 + R2
The value in register R1 is added to the value in the register R2 and then the sum is
transferred into register R3. Similarly, other arithmetic micro-operations are performed on
the registers.
 Addition –
In addition micro-operation, the value in register R1 is added to the value in the register R2
and then the sum is transferred into register R3.

 Subtraction –
In subtraction micro-operation, the contents of register R2 are subtracted from contents of
the register R1, and then the result is transferred into R3.

There is another way of doing the subtraction. In this, 2’s complement of R2 is added to R1,
which is equivalent to R1 – R2, and then the result is transferred into register R3.

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 Increment –
In Increment micro-operation, the value inside the R1 register is increased by 1.

 Decrement –
In Decrement micro-operation, the value inside the R1 register is decreased by 1.

 1’s Complement –
In this micro-operation, the complement of the value inside the register R1 is taken.

 2’sComplement –
In this micro-operation, the complement of the value inside the register R2 is taken and then
1 is added to the value and then the final result is transferred into the register R2. This
process is also called Negation. It is equivalent to -R2.

Arithmetic micro-operations are the basic building blocks of arithmetic operations performed
by a computer’s central processing unit (CPU). These micro-operations are executed on the
data stored in registers, which are small, high-speed storage units within the CPU.
There are several types of arithmetic micro-operations that can be performed on register data,
including:

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1. Addition: This micro-operation adds two values together and stores the result in a register.
2. Subtraction: This micro-operation subtracts one value from another and stores the result in
a register.
3. Increment: This micro-operation adds 1 to the value in a register.
4. Decrement: This micro-operation subtracts 1 from the value in a register.
5. Multiplication: This micro-operation multiplies two values together and stores the result in
a register.
6. Division: This micro-operation divides one value by another and stores the quotient and
remainder in separate registers.
7. Shift: This micro-operation shifts the bits in a register to the left or right, depending on the
direction specified.
These arithmetic micro-operations are used in combination with logical micro-operations,
such as AND, OR, and NOT, to perform more complex calculations and manipulate data
within the CPU.

Logic micro operations

Logic Micro operations specify binary operations performed for strings of bits in registers.

These operations consider each bit of the register separately and treat them as binary variables.

Example

R3←R1 R2

R1 1 0 1 0

R2 1100

R1 after P=1. 0 1 1 0

Where P is a control function

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Thus, there are 16 different logic operations with 2 binary variables.

Truth Table Logic Micro Operations

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F0= 0000 from truth table and also F0=0 in logic micro operation table

For F1= XY logic micro operation

F1 =0001 from the truth table. Now look at the truth table, 1 in F1 corresponds to the variables

X=1 and Y=1

Therefore, for F1= XY AND operation, here X=1 and Y=1 after performing AND operation
the result is stored in F1.

Hence F1= 0001

Similarly, F3= XY' + XY= X(Y' + Y)=X

Similarly it can be checked for all fifteen logic operations.

Applications of Logic Micro operations

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1. Selective Set Operation - It sets 1 to the bits in register A where there are corresponding

1's in register B.It does not affect bit positions that have 0's in B. The OR microoperation can

be used to selectively set bits of a register.

Example:

consider register A contains 1010 and register B contains 1100. The bits in A

corresponding to the bit 1 in the register B will be changed to 1. Therefore, bits 1 and 0 in

the register A corresponding to the bits 1 and 1 in the register B will be changed to 1 and

1. 1 0 1 0. A before

1 1 0 0 B(logic operand)

1 1 1 0 A after

2. Selective Complement Operation

The selective Complement operation complements bits in A where there are

corresponding 1's in B. It does not affect bit positions that have 0's in B. The exclusive

OR microoperation can be used to selectively set bits of a register.

Example:

1 0 1 0. A before

1 1 0 0 B(logic operand)

0 1 1 0 A after

3. Selective Clear Operation

The selective clear operation clears to 0 the bits in A where there are corresponding 1's in

B. It does not affect bit positions that have 0's in B. The selective clear operation can be

achieved by the microoperation A ← A B' Example:

1 0 1 0. A before

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1 1 0 0 B(logic operand)

0 0 1 0 A after

4. Mask operation - It is similar to selective clear operation except that the bits of A are cleared

only where there are corresponding 0's in B.

The mask operation is an AND Micro Operation.

Example:

1 0 1 0. A before

1 1 0 0 B(logic operand)

1 0 0 0 A after

5. Insert operation - The insert operation inserts a new value into a group of bits. It

Incorporates two operations that are masking and then ORing them with required value.

The mask operation is an AND micro operation and the insert operation is an OR

Micro operation.

Example:

Suppose the binary number 1001 is to be inserted in place of 0110 Let

the register A contain the bit 0110 1010.

0 1 1 0 is replaced by 0 0 0 0 and remaining bits of A will be 1 1 1 1

Mask

A01101010

B. 0 0 0 0 1 1 1 1. ( In register B the position of bits, wherever the new bits are to be

inserted in the register A are filled with zeros and remaining bits are 1)After performing

AND operation between the contents of the registers A and B, the output will be as

follows

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Output A 0 0 0 0 1 01 0. AND microoperation

Now, the new bits to be inserted in register A are placed in register B at the masked bit

position and remaining bits of register B are zero. Then, OR operation is performed

between the contents of register A and register B.

A00001010

B. 1 0 0 1. 0 0 0 0. OR microoperation

10011010

6. Clear operation - The clear operation compares the words in A and B and produces an all

0's result if the two numbers are equal. It is achieved by Exclusive OR operation.

Example:

1 0 1 0. A

1 0 1 0. B

0 0 0 0.

Shift micro operations

Shift micro-operations are those micro-operations that are used for the serial transfer of
information. These are also used in conjunction with arithmetic micro-operation, logic
microoperation, and other data-processing operations. There are three types of shift
microoperations: 1.
1. Logical Shift:
It transfers the 0 zero through the serial input. We use the symbols ‘<<‘ for the logical left shift
and ‘>>‘ for the logical right shift.
Logical Left Shift:
In this shift, one position moves each bit to the left one by one. The Empty least significant bit
(LSB) is filled with zero (i.e, the serial input), and the most significant bit (MSB) is rejected.
The left shift operator is denoted by the double left arrow key (<<). The general syntax for the left
shift is shift-expression << k.

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 Logical Left Shift

Note: Every time we shift a number towards the left by 1 bit it multiplies that number by 2.

Logical Right Shift

In this shift, each bit moves to the right one by one and the least significant bit(LSB) is rejected
and the empty MSB is filled with zero.
The right shift operator is denoted by the double right arrow key (>>). The general syntax for the
right shift is “shift-expression >> k”.

Logical Right Shift

Note: Every time we shift a number towards the right by 1 bit it divides that number by 2.
2. Arithmetic Shift:
The arithmetic shift micro-operation moves the signed binary number either to the left or to the
right position.
Following are the two ways to perform the arithmetic shift.
1. Arithmetic Left Shift
2. Arithmetic Right Shift
Arithmetic Left Shift:
In this shift, each bit is moved to the left one by one. The empty least significant bit (LSB) is filled
with zero and the most significant bit (MSB) is rejected. Same as the Left Logical Shift.

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 Arithmetic Left Shift

2.Arithmetic Right Shift:

In this shift, each bit is moved to the right one by one and the least significant(LSB) bit is rejected
and the empty most significant bit(MSB) is filled with the value of the previous MSB.

Arithmetic Right Shift

3. Circular Shift:
The circular shift circulates the bits in the sequence of the register around both ends without any
loss of information.

Following are the two ways to perform the circular shift.

1. Circular Shift Left
2. Circular Shift Right
Circular Left Shift:
In this micro shift operation each bit in the register is shifted to the left one by one. After shifting,
the LSB becomes empty, so the value of the MSB is filled in there.

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 Circular Left Shift

Circular Right Shift:

In this micro shift operation each bit in the register is shifted to the right one by one. After shifting,
the MSB becomes empty, so the value of the LSB is filled in there.

Circular Right Shift

Arithmetic logic shift unit

Arithmetic Logic Shift Unit (ALSU) is a part of Arithmetic Logic Unit (ALU) of a computer
system. It is a digital circuit that performs arithmetic calculations, logical and shift operations.
Instead of having individual registers performing the micro operations directly, computer systems
employ a number of storage registers connected to a common operational unit called an arithmetic
logic unit, abbreviated ALU. ALSU consists of arithmetic, logical and shift circuits. In each stage,
the circuit can perform 8 arithmetic operations, 16 logical operations and 2 shift operations.

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Characteristics of the ALSU

Arithmetic logic shift unit in digital circuit performs all the logical and arithmetic operations.

The operations like addition, subtraction, multiplication and division are referred as Arithmetic
operations.

The logical operations refer to operations on numbers and special character operations.

The ALSU is responsible for the conditions given below:

Equal to

Less than

Greater than

Functions of the ALSU

A particular microoperation is selected with inputs S1 and S0. A 4 x 1 multiplexer at the output
chooses between an arithmetic output in Ei and a logic output in Hi. The data in the multiplexer
are selected with inputs S3 and S2. The other two data inputs to the multiplexer receive inputs Ai
— 1 for the shift-right operation and Ai + 1 for the shift-left operation.

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Table 1 — Functions of Arithmetic Logic Shift Unit

The circuit of Figure 1 must be repeated n times for an n-bit ALU. The output carry Ci + 1 of a
given arithmetic stage must be connected to the input carry Ci of the next stage in sequence. The
input carry to the first stage is the input carry Cin, which provides a selection variable for the
arithmetic operations.

Part-2

Basic Computer Organization and Design

Computer organization refers to the operational unit and their interconnection that realise the
architectural specification.

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Computer organization deals with how different part of a computer are organised and how various
operations are performed between different part to do a specific task.

The organization of the computer is defined by its internal registers ,timing and control structure
,and set of instruction that is uses.

Computer Registers Computer instructions

Computer registers
Computer registers are memory storing units that operate at high speed. It's a component of a
computer's processor. It can hold any type of data, including a bit sequence or a single piece of
data.
Registers are a type of computer memory used to accept, store, and transfer data and instructions
used by the CPU right away. Processor registers refer to the registers used by the CPU.
During the execution of a program, registers are used to store data temporarily.
In most cases, the number of bits that a register can hold is used to determine its size.
Eight registers, a memory unit, and a control unit make up a basic computer. These devices must
be connected on a regular basis.Following is the list of some of the most common registers in
computer:

Computer instructions
Instructions given to a computer allow it to perform some specific tasks. A basic instruction is
divided into three fields – the operation field, the address field and the mode field.

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The operation field indicates the operation to be performed, the address field indicates the memory
location of the operand, and the mode field indicates how the memory address of the operand is
determined.

Instructions can be divided into various types based on the number of address fields it contains,
the instruction format and the instruction code format. When an instruction enters a computer, it
goes through an instruction cycle.

Computer instructions are a set of machine language instructions that a particular processor
understands and executes. A computer performs tasks according to instructions provided.
Fields of Computer instructions
There are three basic fields of each instruction in a computer. Let look at the following diagram
of 16-bit instruction

I. The Operand is a data. But the operand field may contain actual data or address of that data.
Address of data means the location of register or memory where actual data is present.
II. The Opcode field tells the operation which will be performed on data, i.e. +, -, x, <, etc.
III. The Mode field tells about the addressing modes. It is a source to find the operand. It tells
whether the operand field contains the actual data or address of memory, address of the register,
or address of address, etc. i.e. if Mode bit = 0 then it is direct addressing and if Mode bit =1
then it is an indirect addressing mode. We will cover all of this in detail in addressing modes.
Computer Instructions Formats
A basic computer has three instruction code formats.

1. Memory Reference Instruction

The instruction format of memory reference instructions is

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• Where the 15th bit which is I. This value of I will be 0, to represent direct addressing mode, or 1
to represent indirect addressing mode.
• 12 to 14 bits represent the Opcode value. Opcode value will be in between 000 to 110. These 7
values (000 to 110) represents the 7 decode operations. Decode operations represented by D0 to
D6 as shown in the following diagram

when the value of Opcode = 001 (D1) then ADD operation will perform on the operand.
0 to 11 bits represent the address of memory location or operand itself.
2. Register – Reference Instruction
The instruction format of memory reference instructions is

• Where the 15th bit which is I will always equal to 0 to represent register addressing mode.
• 12 to 14 bits represent the Opcode value. Opcode value will always equal to 111.
• 0 to 11 bits of operand represents the register operation. Different operations can be performed on
the register by setting the value 1 of any location from 0 to 11 bits. So, 12 operations can be
performed on registers by setting 1 to different locations (B0 to B11).

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 For example when the value of operand = 000000000001 then HLT operation will perform on the
register. As shown in the following table

3. Input-Output Instruction
The instruction format of memory reference instructions is

• Where the 15th bit which is I will always equal to 1 to represent I/O addressing mode.
• 12 to 14 bits represent the Opcode value. Opcode value will always equal to 111.
• 0 to 5 bits of operand will always be zero and 6-11 bits represents the I/O operation. Different
operations can be performed on I/O by setting the value 1 of any location from 6 to 11 bits. So, 6
operations can be performed on I/O by setting 1 to different locations (B6 to B11).
For example when the value of operand = 000001000000 then IOF operation will perform on the
register. As shown in the following table

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 Basic Categories of Computer Instructions
There are 3 basic categories of instruction in General Computers
• Data transfer instructions
• Data Manipulation instruction
• Program Control Instruction

Timing and control

Timing and control unit are the fundamentals of any computer system. One of the primary work
of control unit is to send control signals to system component.

Computer programs are number of sequential instructions. The processors are fed with this
instruction. Instructions are made of two things opcode and address.

Opcode defines the operation to be performed and address defines the place in the memory where
the operands are located.

For each instruction the CPU needs a certain time to process it known as clock. The operands
located in the memory needs to be fetched and brought to the CPU with the help of bus. Similarly
processsor needs to keep track of next instruction to be executed. All these are managed by
controlled unit. The logical operations performed on Gates like AND gate OR gate are also
controlled by control unit.

All the calculations are done by ALU unit and management is done by control unit

The timing for all registers in the basic computer is controlled by a master clock generator.
The clock pulses are applied to all flip-flops and registers in the system, including the flip-
flops and registers in the control unit. The control signals are generated in the control unit and

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 provide control inputs for the multiplexers in the common bus, control inputs in processor
registers, and micro operations for the accumulator. There are two major types of control
organization:
1- hardwired control : the control logic is implemented with gates, flip-flops, decoders, and
other digital circuits. It has the advantage that it can be optimized to produce a fast mode of
operation.
2- microprogrammed control: the control information is stored in a control memory. The
control memory is programmed to initiate the required sequence of micro operations.
The timing for all registers in the basic computer is controlled by a master clock generator.
The clock pulses are applied to all flip-flops and registers in the system, including the flip-
flops and registers in the control unit. The control signals are generated in the control unit and
provide control inputs for the multiplexers in the common bus, control inputs in processor
Hardwired Control Unit: The control hardware can be viewed as a state machine that changes
from one state to another in every clock cycle, depending on the contents of the instruction
register, the condition codes, and the external inputs. The outputs of the state machine are the
control signals. The sequence of the operation carried out by this machine is determined by the
wiring of the logic elements and hence named “hardwired”.
• Fixed logic circuits that correspond directly to the Boolean expressions are used to generate the
control signals.
• Hardwired control is faster than micro-programmed control.
• A controller that uses this approach can operate at high speed.
• RISC architecture is based on the hardwired control unit

Micro-programmed Control Unit –

• The control signals associated with operations are stored in special memory units inaccessible
by the programmer as Control Words.

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• Control signals are generated by a program that is similar to machine language programs.
• The micro-programmed control unit is slower in speed because of the time it takes to fetch
microinstructions from the control memory. Some Important Terms
1. Control Word: A control word is a word whose individual bits represent various control signals.
2. Micro-routine: A sequence of control words corresponding to the control sequence of a machine
instruction constitutes the micro-routine for that instruction.
3. Micro-instruction: Individual control words in this micro-routine are referred to as
microinstructions.
4. Micro-program: A sequence of micro-instructions is called a micro-program, which is stored in
a ROM or RAM called a Control Memory (CM).
5. Control Store: the micro-routines for all instructions in the instruction set of a computer are
stored in a special memory called the Control Store.

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Instruction Cycle
The instruction cycle is a basic computer system that deals with the central processor unit's core
operations.

The instruction cycle is defined as the basic cycle in which a computer system fetches an
instruction from memory, decodes it, and then executes it. Fetch-Execute-Cycle is another name
for it. All instructions in a computer system are executed in the RAM of the computer system.
The CPU is in charge of carrying out the instruction.
The input stage is where the computer receives instructions from the user. The processing stage
is where the computer executes those instructions. And finally, the output stage is where results
are displayed to the user or stored on disk.

Each instruction cycle in a basic computer includes the following procedures:

 It has the ability to retrieve instructions from memory.
 It's used to decode the command.
 If the instruction has an indirect address, it can read the effective address from memory.
 It is capable of carrying out the command.

Fetch Cycle: Fetch the instruction from memory

Decode Cycle: Decode the instruction
Read Cycle: Read the effective address from the memory
Execute Cycle: Execute the instruction

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1. Fetch Cycle

The fetching of instruction is the first phase. The fetch instruction is common for each instruction
executed in a central processing unit. In this phase, the central processing unit sends the PC to
MAR and then sends the READ command into a control bus.

After sending a read command on the data bus, the memory returns the instruction, which is stored
at that particular address in the memory. Then, the CPU copies data from the data bus into MBR
and then copies the data from MBR to registers.

After all this, the pointer is incremented to the next memory location so that the next instruction
can be fetched from memory.

2. Decode Cycle
The decoding of instruction is the second phase. In this phase, the CPU determines which
instruction is fetched from the instruction and what action needs to be performed on the
instruction. The opcode for the instruction is also fetched from memory and decodes the related
operation which needs to be performed for the related instruction.
3. Read Cycle

The reading of an effective address is the third phase. This phase deals with the decision of the
operation. The operation can be of any type of memory type non-memory type operation. Memory
instruction can be categorized into two categories: direct memory instruction and indirect memory
instruction.

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4. Execute Cycle
The execution of the instruction is the last phase. In this stage, the instruction is finally executed.
The instruction is executed, and the result of the instruction is stored in the register. After the
execution of an instruction, the CPU prepares itself for the execution of the next instruction. For
every instruction, the execution time is calculated, which is used to tell the processing speed of
the processor.
Memory Reference Instructions
1. Memory Reference – These instructions refer to memory address as an operand. The other
operand is always accumulator. Specifies 12-bit address, 3-bit opcode (other than 111) and 1bit
addressing mode for direct and indirect

addressing.

Example – IR register contains = 0001XXXXXXXXXXXX, i.e. ADD after fetching and

decoding of instruction we find out that it is a memory reference instruction for ADD operation.
Hence, DR ← M[AR]
AC ← AC + DR, SC ← 0

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AND to AC
This is an instaruction that perform the AND logic operation on pairs of bits in AC and the memory
word specified by the effective address. The result of the operation is transferred to AC . The
microoperations that execute this instruction are:

D0T4: DR <- M [AR]

D0T5: AC <- AC /\ DR, SC <--- 0

The control function for this instruction uses the operation decoder D0 since this output of the
decoder is active when the instruction has an AND operation whose binary code value 000. Two
timing signals are needed to execute the instaruction. The clock transition associared with timing
signal T4 transfers the operand from memory into DR . The clock transition associated with the
next timing signal T5 transfers to AC the result of the AND logic operation between the contents
of DR and AC. The same clock transition clears SC to 0, transfer-ring control to timing signal T0
to start a new instruction cycle.

ADD to AC

This instruction adds the content of the memory word specified by the effective address to the
value of AC . The sum is transferred into AC and the output carry Cout is transferred to the E
(extended accumulator) flip-flop. The rnicroopera-tions needed to execute this instruction are

D1T4: DR← M[AR]

D1T5: AC← AC + DR, E← Cout , SC ← 0

Same Two timing signals, T, and T5, are used again but with operation decoder D1 instead of D0,
which was used for the AND instruction. After the instruction is fetched from memory and
decoded, only one output of the operation decoder will be active, and that output determines the
sequence of microoperations that the control follows during the execution of a memoryref-erence
instruction.

LD: Load to AC

This instruction transfers the memory word specified by the effective address to AC . The
microoperations needed to execute this instruction are.

D2T4: DR← M [AR]

D2T5: AC← DR , ← 0

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Looking back at the bus system shown in Fig. 5-4 we note that there is no direct path from the bus
into AC . The adder and logic circuit receive information from DR which can be transferred into
AC . Therefore, it is necessary to read the memory word into DR first and then transfer the content
of DR into AC . The reason for not connecting the bus to the inputs of AC is the delay encountered
in the adder and logic circuit. It is assumed that the time it takes to read from memory and transfer
the word through the bus as well as the adder and logic circuit is more than the time of one clock
cycle. By not connecting the bus to the inputs of AC we can maintain one clock cycle per
microoperation.

STA: Store AC

This instruction stores the content of AC into the memory word specified by the effective address.
Since the output of AC is applied to the bus and the data input of memory is connected to the bus,
we can execute this instruction with one microoperation:

D3T4: M [AR] ← AC, SC ← 0

BUN: Branch Unconditionally

This instruction transfers the program to the instruction specified by the effective address.
Remember that PC holds the address of the instruction to be read from memory in the next
instruction cycle. PC is incremented at time T1 to prepare it for the address of the next instruction
in the program sequence. The BUN instruction allows the programmer to specify an instruction
out of sequence and we say that the program branches (or jumps) unconditionally. The instruction
is executed with one microoperation:
D4T4: PC ← AR, SC ← 0

The effective address frpom AR is transferred through the common bus to PC .Resetting SC to 0
transfers control to T0• The next instruction is then fetched and executed from the memory address
given by the new value in PC .

BSA: Branch and Save Return Address

This instruction is useful for branching to a portion of the program called a subroutine or procedure.
When executed, the BSA instruction stores the address of the next instruction in sequence (which
is available in PC) into a memory location specified by the effective address. The effective address
plus one is then transferred to PC to serve as the address of the first instruction in the subroutine.
This operation was specified in Table 5-4 with the following register transfer:

M[AR] <-- PC, PC <-- AR + I

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A numerical example that demonstrates how this instruction is used with a subroutine is shown in
Fig. 5-10. The BSA instruction is assumed to be in memory at address 20. The I bit is 0 and the
address part of the instruction has the binary equivalent of 135. After the fetch and decode phases,
PC contains 21, which is the address of the next instruction in the program (referred to as the return
address). AR holds the effective address 135. This is shown in part (a) of the figure. The BSA
instruction performs the following numerical operation:

M[135] <-- 21, PC <-- 135 + 1 = 136

The result of this operation is shown in part (b) of the figure. The return address 21 is stored in
memory location 135 and control continues with the subroutine program starting from address 136.
The return to the original program (at address 21) is accomplished by means of an indirect BUN
instruction placed at the end of the subroutine. When this instruction is executed, control goes to
the indirect phase to read the effective address at location 135, where it finds the previously saved
address 21. When the BUN instruction is executed, the effective address 21 is transferred to PC .
The next instruction cycle finds PC with the value 21, so control continues to execute the
instruction at the return address.

ISZ: Increment and Skip if Zero

This instruction increments the word specified by the effective address, and if the incremented
value is equal to 0, PC is incremented by 1. The programmer usually stores a negative number (in
2's complement) in the memory word. As this negative number is repeatedly incremented by one,
it eventually reaches the value of zero. At that time PC is incremented by one in order to skip the
next instruction in the program.

Since it is not possible to increment a word inside the memory, it is necessary to read the word into
DR, increment DR, and store the word back into memory. This is done with the following sequence
of microoperations:

D6T4: DR <-- M [AR]

D6T5: DR <-- DR + 1 D,T,: M [AR] <--

DR, if (DR = 0) then (PC ← PC + 1), SC

←0

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Input – Output and Interrupt
A computer can serve no useful purpose unless it communicates with the external
environment. Instructions and data stored in memory must come from some input device.
Computational results must be transmitted to the user through some output device.
Commercial computers include many types of input and output devices. To demonstrate the
most basic reqttirements for input and output communication, we will use as an illustration a
terminal unit with a keyboard and printer. Input-Output Configuration

The terminal sends and receives serial information. Each quantity of information has eight bits of
an alphanumeric code. The serial information from the keyboard is shifted into the input register
INPR. The serial information for the printer is stored in the output register OUTR. These two
registers communicate with a communication interface serially and with the AC in parallel. The
input-output configuration is shown in Fig. 5-12. The transmitter interfaces receives serial
information from the keyboard and transmits it to INPR. The receiver interface receives
information from OUTR and sends it to the printer serially.

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