Proc. IEEE 2004 Int. Conference on Microelectronic Test Structures. Vol 17, March 2004.

273

9.2
Varactor Modeling Methodology for Simulation of the
VCO Tuning Sensitivity
Domagoj sip&' and Andreas Roithmeie?
Infineon Technologies AG, 'CL TD SIM PXI, 'SMS TI RFI PR2
P.O. Box 800949,D-81609 Munich, Germany
E-mail: [email protected]

ABSTRACT

A modeling methodology for CMOS varactors is

presented using a simple test structure and a new special
device target function. The device target function is based
on the definition of the direrential frequency tuning
-
G

sensitiviiy Kvco of a voltage controlled oscillator (VCO).

The parameter extraction applying the new methodology is
demonstrated for a BSIM4 MOS model. A good agreement
between measurement and simulation of K Y ~for o a 4 GHz
VCO built in a 0.25 pm BiCMOS technology is achieved B
using a varactor model extracted with the new methodology.
The modeling approach directly gives KYcofor different Fig. 2: Schematic view of a NMOS varactor with
oscillation amplitudes of the VCO. The good agreement gate (V,) and tuning voltage (Vtuw)
between modeled and measured Kvco characteristics can be
used to determine the oscillation amplitude of the VCO The differential tuning sensitivity function Kvco is
which is drficult to be measured directly at W/?equencies. defmed by the differential change in frequency with respect
to a differential change in tuning voltage. KVCOis an
INTRODUCTION important control parameter in the design of phase locked
loops [3, 41. The frequency tuning of the VCO is fully
VCOs are one of the most important and widely used determined by the capacitance tuning of the used varactor.
building blocks in RF circuits. Today CMOS devices are So, good varactor models are needed that can be used for
intensively investigated for design of VCOs [I, 21. From a simulation of the Kvco function. Recently works have been
system point of view a VCO consists of a frequency defming published that focus on capacitance tuning range and quality
element like a LC tank with a capacitance C and inductance factor of varactors [S, 61. In the literature no work has been
L in parallel and an active element e.g. represented by a found that reports the capability of varactor models to enable
negative resistance element N to compensate for the simulation of Kvco To our experience BSIM3 or BSIM4
dissipative losses of the tank described by the resistance R based transistor models [7] are not well suited for simulation
(Fig.]), The frequency of the VCO is tuned by a voltage of Kvco since they are focused on the transistor function and
controlled capacitor which is realized using a varactor. not on the varactor features.
NMOS or PMOS varactors are built by transistors with drain In this paper an accurate modeling of the Kvco function is
and source connected together definins the tune port T demonstrated. Furthermore it is shown that the shape of the
(Fig.2). Kvco curve versus tuning voltage is dependent on the
oscillation amplitude of the VCO. This amplitude is difficult
to be measured directly at RF frequencies. Comparing
measured and simulated Kvco curves allows the
determination of the oscillation amplitude. Knowledge of the
oscillation amplitude can be used to determine the quality
factor of the LC tank and to estimate reliability aspects of the
VCO. The quality factor of a LC tank is determined by its
effective parallel resistance R (Fig.1). From the oscillation
amplitude and the easy measurable current consumption of
the VCO the resistance R of the tank can be calculated. The
oscillation amplitude bas a direct impact on gate oxide
Fig. 1: Schematic view of a VCO consisting of a LC
breakdown of the CMOS varactors and transistors in the
tank, dissipative losses Rand a active part N
VCO and therefore determines the lifetime of the circuit [9,
101.

0-7803-8262-5/04/$I7.0002004 IEEE 04CH37516

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 274

DIFFERENTIAL TUNING SENSITMTY Kvco Kvco, BSIM4 offers bias dependent modeling of channel,
bulk and overlap capacitance and threshold shift due to body
The oscillation frequency rn of a VCO is determined by effect [7].
inductance L and capacitance C of the LC tank. Variation of The varactor model used in the VCO circuit (s. Fig. 8) is
the tuning voltage VmCat the varactors tune port leads to a developed with two types of test structures. RF test
variation of the oscillation frequency. The following structures for S-parameter measurements are used for
derivation shows that all bias dependencies of Kvco are fully extracting a subcircuit model of the varactor. The subcircuit
dependent on the varactor features. The differential tuning model mainly determines the quality factor of the varactor.
sensitivity function Kvco for a VCO with a LC tank is The test structure used for modeling Kvco is described in the
defmed as: next paragraph.
The new methodology is applied here to a NMOS
varactor but it is valid also for PMOS varactors and not
limited to the BSIM4 model. Also other compact models like
EKV [ l l ]orMOS11 [12]couldbeused.

DESCRIPTION OF TEST STRUCTURE

The BSIM4 model parameters for the varactor are

extracted from a NMOS multi transistor test structure ( s . Fig.
3) with pads for source S, drain D, gate G and bulk B
connection. The gate length is 0.25 pm and the width of one
gate fmger is 10 pm. 37300 transistors are connected in
parallel to achieve a large total width for capacitance
measurements. The drain and source fingers are arranged in
an interdigital manner. The bulk is connected via a
surrounding guard ring.
Drain and source pads are connected together during
measurement and defme the tune port of the varactor.
Measurement data in Fig. 5, 6 and 7 are obtained from this
(4) test structure

I I _ - - - - I

The gate voltage V, ranges during an oscillation cycle

from a lower value V, to a higher value Vp and so the
capacitance is characterized by a corresponding mean value
C, which still is a function of tuning voltage. For
modeling Kvco a well suited target function is k'vcO because
it contains all essential bias dependencies.

MODELING METHODOLOGY

The modeling methodology is based on fitting the target

function k*vco for measurement and simulation data. k',co is
calculated from CV measurement curves of the varactor
operating in the inversion regime for different tuning
voltages as shown in Fig. 5. From these curves mean
capacitance values for different gate voltage ranges VBH-
Vk are determined according to (4) (s. Fig. 6). The k Fig. 3: Layout of multi transistor test structure
function is calculated from these mean capacitance values surrounded by a bulk guard ring. The insert shows a
according to (3). zoom of the interdigital structure.
The key to achieve an accurate modeling of KvCo is the
precise description of both the absolute value of capacitance
and the derivative of capacitance with respect to tune voltage MEASUREMENT TECHNIQUE
V, ( s . eq. 3 ) . Variation of V, shifts the threshold voltage
Vm due to the body effect [SI. Besides a good modeling of Extraction of all bias dependencies of the varacton
the bias dependencies for channel, bulk and overlap capacitance is performed with a CV measurement bridge H p
capacitance the shift in threshold voltage with V, is 4284A and a DC voltage source (HF'4156B) as shown in
essential for a varactor model that allows simulation of Fig.4. Measurement of the varactor capacitance with a CV

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 test system has the advantage that the gate to tune port C,
and gate to bulk capacitances Cgb are measured and so
modeled separately.
For C, measurement (Fig. 4a) the gate voltage V, is the
primary sweep and the bulk voltage Vb is the secondary
sweep. V, is synchronized with Vb. V, starts always at the
value of the current Vb and stops at a V, of 2.9 V plus Vb.Vb
is swept from 0 to -2.9 V.
For C, measurement (Fig. 4b) V, is always swept from 0
to 2.9 V as a primary sweep and Vue is swept from 0 to 2.9
V as a secondary sweep.
0.0 0.5 lo 1.5 2.0 2.5 3.0

b Y. [vl

a
+ P l Fig. 6: Measurement (symbol) and simulation (line)
of mean capacitance,,C
and a V,, of 0.7 V
., vs. V
,, for different VQH

In Fig. 7 measurement and simulation are compared for

I the target function k.vCO according to (3) vs. V, for
different Vp values and a fixed Vg value of 0.7 V.

Fig. 4: CV measurement configurations using an

impedance meter (HP 4284A) and a parameter
analyzer (HP 4156B) as a voltage source

MEASUREMENT RESULTS

The device capacitances between gate and hulk, CEb, and

between gate and tune port, C, , are summed up in the
inversion region of the CV characteristic of the NMOS
-loo4 ,
0,O
, ,
0.5
. , . ,
19 1.5
, ,
2.0
, ,
2.5
, ,
3.0
.
varactor to get the total capacitance Cab .The total vtum
[vl
capacitance is a function of the gate voltage V, with the tune
voltage V, as a parameter (Fig. 5). . .
Fig. 7: Measurement (svmbol) and simulation (line)
oftarget function k'& ;S., ,V for different VQHand
a VQLof 0.7 V

The shape of the target function k'vCO vanes with the

6% gate voltage range Vp VBI , This result is used to estimate
~

the oscillation amplitude in the VCO circuit shown in Fig. 8.

The howledge of the oscillation amplitude allows to
determine the quality factor of the LC tank and the life time
of the circuit.

3 w RESULTS FOR A 4 GHZ VCO CIRCUIT

250

-0.5 0.0 0.5 10 1.5 2,O 25 3,O 3.5 In Fig. 8 a schematic view of the 4 GHz VCO is given.
Vo[Vl The VCO was produced in a 0.25 pm BiCMOS technology
[ 131. It is a differential VCO with an active part built of two
Fig. 5: Measurement (symbol) and simulation (line) cross coupled NMOS transistors TI and T2 and a LC tank.
of capacitance Cgtbvs. V, for different V
.,, The capacitance of the tank consists of a predefmed
capacitance C, (1.75 pF) and a tunable differential
The simulated data are calculated with BSIM4 using a varactor. The differential varactor consists of two NMOS
parameter set optimized with the target function k*vco. In varactors V1 and V2 with a gate length of 0.25 pm and a
Fig. 6 measurement and simulation are compared for the total gate width of 720 pm each (Fig. 9). The inductance of
mean capacitance G maccording to (4) vs. V, for the tank consists of a differential coil represented by L1 and
different Vp values and a fixed Vg value of 0.7 V.

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 276

L2 (0.6 nH each). The transistors T1 and T2 have a gate

length of 0.41 pm and a total width of 97.2 Fm each.

Vtune
-J,-*"DD

I ,

lv2YI
differential
0.0 0.2 O C 0.6 0.8 1.0 1.2 1,4 1.6 l.8 2.0 22 2.4

V,".

Fig. 10: Measurement (symbol) and simulation

(line) of oscillation frequency f vs. Vbneof the VCO

In Fig. 1 1 the derivative of the curve in Fig. 10 with

respect to V, is shown which is Kvco / 2 7r (s. eq.1). The
shape of this curve is dependent on the oscillation amplitude
(s. Fig. 7, eq. 3).

4
Rbias

Fig. 8: Schematic view of the VCO circuit

-204
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.1 1.6 I8 2.0 2.2 2.4

Vc-

Fig. 11: Measurement (symbol) and simulation

(line) of KvCoI2rr of the VCO
Gate2 The varactor model developed with the new modeling
methodology presented here gives a good agreement
between simulated and measured KVcodata.
Bulk
CONCLUSION

A modeling methodo!ogy is presented that uses a new

\ Tune
device target function k v c based
~ on the d e f ~ t i o nof the
differential kequency tuning sensitivity KVco of a VCO.
BSIM4 model parameters of the varactor are exnacted by
Port fitting measurement and simulation data of this target
Gate1 function. With the extracted varactor model KVCOcan be
simulated accurately. The measurement configuration is
explained to get the necessary measurement data for the
modeling strategy. Extraction of the new target function
Fig. 9: Layout of the differential varactor k'vco for different gate amplitude ranges show that the shape
-
of Kvco vs. tuning voltage is dependent on the oscillation
In Fig. 10 measurement and simulation of the oscillation amplitude, of and
frequency f according to (2) VS. vmefor the circuit are
data can be used to determine the osciliation amplitude.
presented. The small offset in frequency observed in Fig. 10 bowledge of the oscillation amplitude allows to determine
is due to a small deviation of C,,.,. VCO circuit feahlres as quality factor of the LC tank and

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 therefore information on the phase noise of the VCO. The
gate oxide breakdown is related to the oscillation amplitude
which impacts directly the life time of the circuit.

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