L4947

 L4947R

5V-0.5A VERY LOW DROP REGULATOR WITH RESET

PRECISE OUTPUT VOLTAGE (5V ± 4%)

OVER FULL TEMPERATURE RANGE
(– 40 / 125 °C)
VERY LOW VOLTAGE DROP (0.75Vmax)
OVER FULL T RANGE
OUTPUT CURRENT UP TO 500mA
RESET FUNCTION
POWER-ON RESET DELAY PULSE DE-
FINED BY THE EXTERNAL CAPACITOR
+ 80V LOAD DUMP PROTECTION
– 80V LOAD DUMP PROTECTION Pentawatt
REVERSE VOLTAGE PROTECTION
SHORT CIRCUIT PROTECTION AND THER- ORDERING NUMBERS: L4947
L4947R
MAL SHUT-DOWN (with hysteresis)
LOW START UP CURRENT
could fall as low as 6V. Furthermore, it incorpo-
rates a complete range of protection circuits
DESCRIPTION against the dangerous overvoltages always pre-
The L4947/L4947R is a monolithic integrated cir- sent on the battery rail of the car. The reset func-
cuit in Pentawatt package specially designed to tion makes the device particularly suited to supply
provide a stabilized supply voltage for automotive microprocessor based systems : a signal is avail-
and industrial electronic systems. Thanks to its able (after an externally programmable delay) to
very low voltage drop, in automotive applications reset the microprocessor at power-on phase ; at
the L4947/L4947R can work correctly even during power-off, this signal becomes low inhibiting the
the cranking phase, when the battery voltage microprocessor.

BLOCK DIAGRAM

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

June 2000 1/6

L4947 - L4947R

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

Vi DC Input Voltage 35 V
DC Reverse Input Voltage – 18 V
Transient Input Overvoltages : 80 V
Load Dump :
5ms ≤ trise ≤ 10ms
τf Fall Time Constant = 100ms
RSOURCE ≥ 0.5Ω – 80 V
Field Decay :
5ms ≤ tfall ≤ 10ms, RSOURCE ≥ 10Ω
τr Rise Time Constant = 33ms ± 100 V
Low Energy Spike :
trise = 1µs, tfall = 500µs, RSOURCE ≥ 10Ω
fr Repetition Frequency = 5Hz

VR Reset Output Voltage 35 V

TJ, Tstg Junction and Storage Temperature Range – 55 to 150 °C
Note: The circuit is ESD protected according to MIL-STD-883C.

PIN CONNECTION (Top view)

THERMAL DATA

Symbol Parameter Value Unit

R th j-case Thermal Resistance Junction-case Max 3.5 °C/W

TEST CIRCUIT

(*) Min. 20µF, ESR < 10Ω over full temperature range RP (pull up resistor) and RL (load) are both equal to 1KΩ.

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 L4947 - L4947R

ELECTRICAL CHARACTERISTICS (refer to the test circuit, Vi = 14. 4V, Co = 47µF, ESR < 10Ω,
Rp = 1KΩ, RL = 1KΩ, –40°C ≤ TJ ≤ 125°C, unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
Vo Output Voltage Io = 0mA to 500mA 4.80 5.00 5.20 V
Over Full T Range
TJ = 25°C 4.90 5.00 5.10 V
Vi Operating Input Voltage Io = 0mA to (*) 500mA 6 26 V
∆V o Line Regulation Vi = 6V to 26V ; 2 10 mV
Io = 5mA
∆V o Load Regulation Io = 5mA to 500mA 15 60 mV
Vi –Vo Dropout Voltage Io = 500mA, TJ = 25°C 0.40 0.55 V
Over Full T Range 0.75 V
Iq Quiescent Current Io = 0mA, TJ = 25°C 5 10 mA
Io = 0mA Over Full T 6.5 13 mA
Io = 500mA Over Full T 110 180 mA
∆Vo Temperature Output Voltage – 0.5 mV/°C
T Drift
SVR Supply Volt. Rej. Io = 350mA ; f = 120Hz 50 60 dB
Co = 100µF ;
Vi = 12V ± 5Vpp
Isc Output Short Circuit Current 0.50 0.80 1.50 A
VR Reset Output Saturation Voltage 1.5V < Vo < VRT (off), 0.40 V
IR = 1.6mA
3.0V < Vo < VRT (off), 0.40 V
IR = 8mA
IR Reset Output Leakage Current VO in Regulation, VR = 5V 50 µA
VRT peak Power On-Off Reset out Peak 1KΩ Reset Pull-up to Vo, TJ = 0.50 0.80 V
Voltage 25°C
VRT (off) Power OFF Vo Threshold TJ = 25°C
L4947: Vo @ Reset Out H to L 4.70 V
Transition 4.75 Vo–0.15 V
L4947R: Vo @ Reset Out H to 4.55 Vo–0.30 V
L Transition
VRT (on) Power ON Vo Threshold Vo @ Reset Out L to H VRT (off) Vo – V
Transition + 0.05 0.04
VHyst Power ON-Off Hysteresis VRT (on) –VRT (off) 0.05 V
Vd Delay Comparator Threshold Vd @ Reset Out L to H 3.65 4.00 4.35 V
Transition
Vd @ Reset Out H to L 3.20 3.55 3.90 V
Transition
V dH Delay Comparator Hysteresis 0.45 V
Id Delay Capacitor Charging Vd = 3V, TJ = 25°C 20 /µA
Current
Vdisch Delay Capacitor Discharge Vo < VRT (off) 0.55 1.20 V
Voltage
Td Power on Reset Delay Time Cd = 100nF, TJ = 25°C 10 20 30 ms
(*) For a DC voltage 26 < Vi < 37V the device is not operating

FUNCTIONAL DESCRIPTION driver, the power PNP, the protection and reset
functions.
The L4947/L4947R is a very low drop 5V/0.5A
voltage regulator provided with a reset function The power stage is a Lateral PNP transistor
and therefore particularly suited to meet the re- which allows a very low dropout voltage (typ.
quirements of supplying the microprocessor sys- 400mV at TJ = 25°C, max. 750mV over the full
tems used in automotive and industrial applica- temperature range @ IO = 500mA). The typical
tions. curve of the dropout voltage as a function of the
junction temperature is shown in Fig. 1 : that is
The block diagram shows the basic structure of the worst case, where IO = 500mA.
the device : the reference, the error amplifier, the
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L4947 - L4947R

The current consumption of the device (quiescent put instantaneously goes down (LOW status) in-
current) is maximum 13mA - over full T - when no hibiting the microprocessor. The typical power on-
load current is required. off hysteresis is 50mV.
The internal antisaturation circuit allows a drastic The three gain stages (operational amplifier,
reduction in the current peak which takes place driver and power PNP) require the external ca-
during the start up. pacitor (Comin = 20µF) to guarantee the global
stability of the system.
The reset function supervises the regulator output
voltage inhibiting the microprocessor when the Load dump and field decay protections (± 80V),
device is out of regulation and resetting it at the reverse voltage (– 18V) and short circuit protec-
power-on after a settable delay. The reset is LOW tion, thermal shutdown are the main features that
when the output voltage value is lower than the make the L4947/L4947Rspecially suitable for ap-
reset threshold voltage. At the power-on phase plications in the automotive enviroment.
the output voltage increases (see Fig. 2) and -
when it reaches the power-on VO threshold VRT EXTERNAL COMPENSATION
(On) - the reset output becomes HIGH after a de-
lay time set by the external capacitor C d. At the Since the purpose of a voltage regulator is to sup-
power-off the output voltage decreases : at the ply and load variations, the open loop gain of the
VRT(Off) threshold value (VO-0.15V typ. for L4947 regulator must be very high at low frequencies.
and VO-0.3V typ. for L4947R value) the reset out- This may cause instability as a result of the vari-
Figure 1: Typical Dropout Voltage vs. Tj ous poles present in the loop. To avoid this insta-
bility dominant pole compensation is used to re-
(Io = 500mA). duce phase shift due to other poles at the unity
gain frequency. The lower the frequency of these
others poles at the unity gain frequency. The
lower the frequency of these other poles, the
greater must be capacitor esed to create the
dominant pole for the same DC gain.
Where the output transistor is a lateral PNP type
there is a pole in the regulation loop at a fre-
quencybtoo low to be compensated by a capaci-
tor which can be integrated. An external compen-
sation is therefore necessary so a very high value
capacitor must be connected from the output to
ground.
The paeassitic equivalent series resistance of the
capacitor used adds a zero to the regulation loop.
This zero may compromise the stability of the
system since its effect tends to cancel the effect
of the pole added. In regulators this ESR must be
less than 3Ω and the minimum capacitor value is
47µF.
Figure 2: Reset Waveforms:
(1) Without External Capacitor Cd.
(2) With External Capacitor Cd.

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 L4947 - L4947R

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.8 0.189 MECHANICAL DATA
C 1.37 0.054
D 2.4 2.8 0.094 0.110
D1 1.2 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
E1 0.76 1.19 0.030 0.047
F 0.8 1.05 0.031 0.041
F1 1 1.4 0.039 0.055
G 3.2 3.4 3.6 0.126 0.134 0.142
G1 6.6 6.8 7 0.260 0.268 0.276
H2 10.4 0.409
H3 10.05 10.4 0.396 0.409
L 17.55 17.85 18.15 0.691 0.703 0.715
L1 15.55 15.75 15.95 0.612 0.620 0.628
L2 21.2 21.4 21.6 0.831 0.843 0.850
L3 22.3 22.5 22.7 0.878 0.886 0.894
L4 1.29 0.051
L5 2.6 3 0.102 0.118
L6 15.1 15.8 0.594 0.622
L7 6 6.6 0.236 0.260
L9 0.2 0.008
M 4.23 4.5 4.75 0.167 0.177 0.187
M1 3.75 4 4.25 0.148 0.157 0.167
Pentawatt V
V4 40° (typ.)

L1 V3
E V V
L8
V V1 V
M1
R
R
A
B R
D M
C
D1 L2 V4
L5 H2
L3
F
E1
E
V4

H3 H1 G G1

Dia.

F1 F
L7 H2
V4
L6 L9

RESIN BETWEEN
LEADS

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L4947 - L4947R

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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