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    Exp 7

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    MohammedZahid

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    Exp 7

    Uploaded by

    MohammedZahid
    5 views3 pages

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    Exp_7

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    Exp 7

    Uploaded by

    MohammedZahid

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    Experiment 7: Frequency Response of Common Source MOSFET

    Amplifier
    Objectives:
    To bias an NMOS transistor.
    To use an NMOS transistor in a common-source amplifier configuration and to
    measure its amplification.
    To study the effect of the source resistor (RS) and bypass capacitor (CS) on the
    amplification.
    To study the effect of load resistor (RL) on the amplification.
    To measure the maximum allowable input signal swing (so that amplifier is still
    operating in linear mode)
    Background:
    In class you learned how a MOSFET could be used as a basic common-source amplifier. You
    noticed that choosing a proper bias point on the VTC graph is very important to ensure good
    linear amplification and reduce the amount of distortion. In today's lab you will learn how to
    properly bias an NMOS transistor in a common-source configuration with a source resistance
    and use this circuit to amplify an input signal. We will also measure (practically) the maximum
    allowable input signal swing so that amplifier is still operating in linear mode.

    Biasing:
    Biasing circuit for an NMOS common-source amplifier (with RS) is shown in Fig. 1. The
    biasing is done by fixing the gate voltage using a voltage divider (RG1 and RG2) and also by
    using a source resistor RS (i.e., RS1 in series with RS2). The source resistor gives negative
    feedback and stabilizes the bias current which is usually a function of temperature variations
    and transistor characteristics. This is a popular biasing scheme for discrete transistor circuits.
    Other biasing methods are possible, such as using a drain-to-gate feedback resistor, or using a
    constant-current source. The latter one is popular especially in integrated circuits. In this
    experiment, we will focus on the first method, illustrated in Fig. 1.

    Fig. 1: Biasing network for CS Amplifier (with source resistance)


    Fig. 2: Common Source Amplifier (with source resistance)
    Procedure:

    1. First of all, connect the biasing network as shown in Fig. 1.


    2. In order to obtain the operating point, measure VGS, VDS, and ID.
    3. Now, apply a sinusoidal input of 500 mV peak-to-peak using the function generator
    and coupling capacitor Ci as shown in Fig. 2.
    4. Measure the output voltage vo, for RL= ∞ , for different frequency values (keep the p-
    p input voltage as 500 mV) and tabulate the readings in Table I. The voltage gain in
    linear scale can be calculated by using the expression Av= |V0|/|Vi|. In order to convert
    the gain into dB scale, one can use the expression Av(dB)=20 log10 (|V0|/|Vi|).
    5. A semi-log graph is drawn by taking frequency on x-axis and gain in dB on y-axis.
    6. The 3dB bandwidth of the amplifier is calculated from the graph using the following
    expression:
    3dB Bandwidth, BW = f2-f1
    where f1 and f2 are lower and upper cut-off frequencies of CE amplifier, respectively.
    7. Now, repeat step 1-5 for RL = 10 k Ω and tabulate the readings in Table II.
    8. Finally, remove Cs from the circuit, repeat step 1-5 for RL = 10 k Ω and tabulate the
    readings in Table III.
    9. To check the linearity of the amplifier, increase the input signal gradually from 500 mV.
    Note down the maximum input signal amplitude (p-p) that can be applied so that the
    output signal is an exact replica of the input signal (i.e., not chopped off).

    Table I: Input voltage Vs=500mV (p-p), RL = infinity

    Frequency (Hz) Output Voltage (Vo) Gain in Linear Scale Gain in dB


    (V0/Vi) Av=20 log10 (V0/Vi)
    Table II: Input voltage Vs=500mV (p-p), RL = 10 k Ω

    Frequency (Hz) Output Voltage (Vo) Gain in Linear Scale Gain in dB


    (V0/Vi) Av=20 log10 (V0/Vi)

    Table III: Remove Cs from the circuit and calculate the gain for input voltage
    Vs=500mV (p-p), RL = 10 k Ω

    Frequency (Hz) Output Voltage (Vo) Gain in Linear Scale Gain in dB


    (V0/Vi) Av=20 log10 (V0/Vi)

    Model Graph:

    Result:
    The voltage gain and frequency response of the CS amplifier are obtained. Also, the effect of
    feedback resistor RS on the amplifier response is observed.

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