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    Timers

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    87krishna331
    The document discusses timers and counters in 8051 microcontrollers. It describes the two timer registers Timer 0 and Timer 1 that can be used as timers or counters. Timer 2 is also available in the 8052 microcontroller. The timers can be used for interval timing, event counting, and baud rate generation. The document explains how to initialize and set the modes of the timers using the TMOD and TCON registers and how to start, stop, and monitor the timers.

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    Timers

    Uploaded by

    87krishna331
    144 views17 pages
    The document discusses timers and counters in 8051 microcontrollers. It describes the two timer registers Timer 0 and Timer 1 that can be used as timers or counters. Timer 2 is also available in the 8052 microcontroller. The timers can be used for interval timing, event counting, and baud rate generation. The document explains how to initialize and set the modes of the timers using the TMOD and TCON registers and how to start, stop, and monitor the timers.

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    The document discusses timers and counters in 8051 microcontrollers. It describes the two timer registers Timer 0 and Timer 1 that can be used as timers or counters. Timer 2 is also available in the 8052 microcontroller. The timers can be used for interval timing, event counting, and baud rate generation. The document explains how to initialize and set the modes of the timers using the TMOD and TCON registers and how to start, stop, and monitor the timers.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    144 views17 pages

    Timers

    Uploaded by

    87krishna331
    The document discusses timers and counters in 8051 microcontrollers. It describes the two timer registers Timer 0 and Timer 1 that can be used as timers or counters. Timer 2 is also available in the 8052 microcontroller. The timers can be used for interval timing, event counting, and baud rate generation. The document explains how to initialize and set the modes of the timers using the TMOD and TCON registers and how to start, stop, and monitor the timers.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 17

    Lecture Set 7

    Timers/Counters

    Embedded Systems Design

    Dr. Bassel Soudan

    Reminder

    The pins of port 3 have dual functionality.


    These second functions are mostly related to the timers.

    For the 8052, 2 pins on port 1 also have additional functionality related to timers.

    Embedded Systems Design

    Dr. Bassel Soudan

    The MCS-51 Timers

    The 8051 has two registers that can be used either as timers or counters.
    These are referred to as Timer0 and Timer1.

    These timers exist in the SFR area as pairs of 8bit registers.


    TL0 (8AH) and TH0 (8CH) for Timer0. TL1 (8BH) and TH1 (8DH) for Timer1. LSB is bit 0 of TLx and MSB is bit 7 of THx.

    The 8052 has a third timer called Timer 2.


    TL2 (CCH) and TH2 (CDH).
    Dr. Bassel Soudan

    Embedded Systems Design

    Usage

    The timers can be used for:


    Interval timing
    The timer is programmed to overflow at a regular interval and set the timer overflow flag.
    Overflow means reaching maximum count of FFFFH.

    Event counting
    Determine the number of occurrences of an event. An event is any external stimulus that provides a 1-to-0 transition on a pin of the 8051.

    Baud rate generation for the built-in serial port.


    Embedded Systems Design

    Dr. Bassel Soudan

    Incrementing

    When used as timers, the registers are incremented once per machine cycle.
    Each machine cycle is 12 clock cycles.
    The count frequency = (system clock frequency) / 12

    When used as counters, the registers will be incremented once on every 1-0 (negative edge) on the appropriate input pin.
    T0 P3.4 T1 P3.5

    The pins must be held high for one complete machine cycle and then low for one complete machine cycle.
    Embedded Systems Design

    Dr. Bassel Soudan

    Timer Mode Register

    The TMOD register (89H) contains two groups of 4 bits that set the operating mode for Timer 0 and Timer 1. MSB LSB
    GATE C/T M1 M0 GATE C/T M1 M0 Timer 1 Bit 7 6 Name GATE C/T Description Gate bit. If set, timer 1 will only increment while INT1 is high. Counter/timer select bit 1 = event counter external timing signal 0 = interval timer internal timing signal Mode bit 1 Mode bit 0 Timer 0 Gate bit Timer 0 counter/timer select bit Timer 0 M1 bit Timer 0 M0 bit Timer 0

    5 4 3 2 1 0

    M1 M0 GATE C/T M1 M0

    Embedded Systems Design

    Dr. Bassel Soudan

    Timer Mode Definitions

    Using the M1 and M0 bits of the TMOD register, we can set the timers to operate in one of 4 possible modes:
    M1 0 0 1 1 M0 0 1 0 1 Mode Description 0 1 2 3 13-bit timer mode 16-bit timer mode 8-bit auto reload mode Split timer mode:
    Timer 0: TL0 is an 8-bit timer controlled by timer 0 mode bits; TH0 the same except controlled by timer 1 mode bits. Timer 1: Stopped.

    Embedded Systems Design

    Dr. Bassel Soudan

    Timer Control Register

    The TCON register (88H) contains status and control bits for Timer0 and Timer1.
    Bit addressable.
    MSB TF1 TR1 TF0 TR0 IE1 IT1 IE0 LSB IT0

    Bit TCON.7 TCON.6 TCON.5 TCON.4 TCON.3 TCON.2 TCON.1 TCON.0

    Name TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

    Description Timer 1 overflow flag Timer 1 run-control bit. Used to turn the timer on/off 0 overflow flag Timer Timer 0 run-control bit. External Interrupt 1 edge flag External Interrupt 1 type flag External Interrupt 0 edge flag External Interrupt 0 type flag

    Embedded Systems Design

    Dr. Bassel Soudan

    Mode 0/1

    In mode 1, the timer/counter is configured as a 16-bit timer/counter.


    The upper 8 bits of the count are in TH The lower 8 bits are in TL.

    In mode 0, the timer/counter is configured as a 13-bit timer/counter.


    Used for backward compatibility with the 8048.

    The upper 8 bits of the count are in TH The lower 5 bits are in the lower 5 bits of TL. The upper 3 bits of TL are not used

    The TFx flag will be set when the counter switches from all 1s to all 0s.
    The timer continues to count.
    Dr. Bassel Soudan
    9

    Embedded Systems Design

    Mode 2

    8-bit Auto-Reload Mode


    TL operates as an 8-bit counter. TH holds a reload value.
    When TL overflows (reached FFH), the TFx flag is set, TL is reloaded from the value in TH and counting continues.

    To make counter 0 count 40H times:


    Set TH0 and TL0 to BFH Set the counter to mode 2. Run the counter. Once it reached FFH, it will reload with BFH and repeat.
    Dr. Bassel Soudan

    Embedded Systems Design

    10

    Mode 3

    Split timer mode. Timer 0 is split into two independent 8-bit timers.
    When TL0 overflows, it sets the TF0 flag. When TH0 overflows, it sets the TF1 flag.

    Timer 1 is stopped in mode 3.


    It can be switched independently to a different mode.
    However, when it overflows it will NOT set the TF1 flag.

    Embedded Systems Design

    Dr. Bassel Soudan

    11

    Clocking Sources

    There are two possible clock sources for the timers controlled by the C/T bit of each timer in the TMOD register. If C/T = 0, continuous timer operation is selected and the timer is clocked from by the system clock divided by 12.
    The timer is being used for interval timing. Timer overflow occurs after a certain number of cycles depending on the initial value stored in TLx/THx.

    If C/T = 1, the timer is clocked from an external source (pin T0 or T1 on port 3).
    The timer is being used for event counting. The number of events is stored as a 16-bit hexadecimal value in TLx/THx.

    Embedded Systems Design

    Dr. Bassel Soudan

    12

    Starting, Stopping and Controlling the Timers

    The simplest method for starting and stopping the timers is by setting/clearing the TRx bit in TCON.
    TRx is cleared after a reset.
    It has to be set by software to start the timer.

    TCON is bit addressable.


    SETB CLR TR0 TR0

    Embedded Systems Design

    Dr. Bassel Soudan

    13

    Starting, Stopping and Controlling the Timers

    The other possibility is by using the GATE bit of TMOD and the external input INTx.
    Setting GATE = 1 allows the timer to be controlled by INTx.
    When INTx goes high, the counter is enabled and counts at a rate of system clock/12. When INTx goes low, the counter is disabled.

    Embedded Systems Design

    Dr. Bassel Soudan

    14

    Initializing the Timer Registers

    TMOD is the first register initialized since it sets the mode of operation.
    MOV TMOD, #00010000B

    This sets Timer 1 into mode 1 clocked from the on-chip oscillator.

    An initial value is stored in THx/TLx if necessary.


    MOV MOV TL1, #9CH TH1, #0FFH

    This will set the starting value of Timer1 to FF9CH.


    Timer1 will count 100 cycles before overflowing.

    To start the timer, we need to set the right TRx bit.


    SETB TR1 Dr. Bassel Soudan
    15

    Embedded Systems Design

    Monitoring the Timer

    It is possible to write an ISR that responds when the timer overflows. Then we can enable the appropriate interrupt bit in the IE register and let the microcontroller respond automatically. Or, we can write a wait loop and monitor the timer flag TFx.
    WAIT: JNB TF1, WAIT

    When the counter reaches FFFFH and turns to 0000H, the TF1 bit will be set and the program will break out of the loop.
    Embedded Systems Design

    Dr. Bassel Soudan

    16

    Responding to a Timer Overflow

    When the timer overflows, we need to stop it and then reset the TFx bit so that we dont generate false overflows.
    CLR CLR TR1 TF1

    Embedded Systems Design

    Dr. Bassel Soudan

    17

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