ASCET V5.2 Reference
ASCET V5.2 Reference
2
Reference Guide
Copyright
The data in this document may not be altered or amended without special
notification from ETAS GmbH. ETAS GmbH undertakes no further obligation in
relation to this document. The software described in it can only be used if the
customer is in possession of a general license agreement or single license.
Using and copying is only allowed in concurrence with the specifications stip-
ulated in the contract.
Under no circumstances may any part of this document be copied, repro-
duced, transmitted, stored in a retrieval system or translated into another lan-
guage without the express written permission of ETAS GmbH.
© Copyright 2007 ETAS GmbH, Stuttgart
The names and designations used in this document are trademarks or brands
belonging to the respective owners.
The name INTECRIO is a registered trademark of ETAS GmbH.
Document EC010005 R5.2.2 EN
2
Contents
The Modeling Language
1 Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.1 The Task Schedule for the Operating System . . . . . . . . . . . . . . . . . . . . . . 13
1.1.1 Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.1.2 Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.1.3 Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.1.4 Application Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.2 Modules and Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.3 Interprocess Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2 Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.1 Modules vs. Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.2 Definition and Instantiation of Components . . . . . . . . . . . . . . . . . . . . . . 25
2.3 The Interface of Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3.1 The Interface of Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3.2 The Interface of Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.4 Reusing Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.4.1 Hierarchical Class Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.4.2 Hierarchical Module Structure. . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.5 State Machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Contents 3
2.5.1 State Machine Components . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.5.2 Semantics of State Machines . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.5.3 Semantics: Simple State Machines . . . . . . . . . . . . . . . . . . . . . . 48
2.5.4 Semantics: Junctions in State Machines . . . . . . . . . . . . . . . . . . 51
2.5.5 Semantics: Hierarchical State Machines. . . . . . . . . . . . . . . . . . . 57
2.5.6 Semantics: Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
2.5.7 Simple Code Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
2.5.8 Optimizing the State Machine . . . . . . . . . . . . . . . . . . . . . . . . . 73
2.5.9 State Machines as Classes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4
5.2.7 Literals and Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.2.8 Comments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.2.9 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.3 Implementation Casts in ESDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.4 Control Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
5.4.1 If…Else. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
5.4.2 Switch…Case…Default . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.4.3 While . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
5.4.4 For . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
5.4.5 Break . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
5.5 Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
5.5.1 This . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.5.2 Access Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.5.3 Direct Access Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.6 Composite Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.6.1 Arrays. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.6.2 Matrices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.6.3 One-dimensional Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.6.4 Two-dimensional Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.6.5 Distributions and Group Tables . . . . . . . . . . . . . . . . . . . . . . . . 133
5.7 Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
5.8 Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
5.9 Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
5.10 Mathematical Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
5.11 Accessing Block Diagrams from ESDL . . . . . . . . . . . . . . . . . . . . . . . . . . 138
5.12 Using ESDL in State Machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
5.13 Overview: ESDL Features Compared . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
5
6.3.2 The Break Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
6.3.3 Method Call . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
6.3.4 Control Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
6.4 The Semantics of Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.4.1 Graphical Hierarchies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
6
10.3 Block Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
10.4 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
10.5 Algebraic Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
10.6 Direct and Nondirect Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
10.7 Difference Between Graphical Hierarchies and CT Structure Blocks . . . . 204
10.8 Computing Sequence of Methods Within a Structure . . . . . . . . . . . . . . 204
Reference Lists
7
12.3.9 TimerRetrigger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
12.3.10 TimerRetriggerEnabled. . . . . . . . . . . . . . . . . . . . . . . . . 228
12.4 Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
12.4.1 DelaySignal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
12.4.2 DelaySignalEnabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
12.4.3 DelayValue. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
12.4.4 DelayValueEnabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
12.4.5 TurnOffDelay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
12.4.6 TurnOffDelayVariable. . . . . . . . . . . . . . . . . . . . . . . . . . 231
12.4.7 TurnOnDelay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
12.4.8 TurnOnDelayVariable. . . . . . . . . . . . . . . . . . . . . . . . . . . 232
12.5 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
12.5.1 Accumulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
12.5.2 AccumulatorEnabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
12.5.3 AccumulatorLimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
12.5.4 RSFlipFlop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
12.6 Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
12.6.1 DeltaOneStep. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
12.6.2 DifferenceQuotient. . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
12.6.3 EdgeBi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
12.6.4 EdgeFalling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
12.6.5 EdgeRising. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
12.6.6 Mux1of4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
12.6.7 Mux1of8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
12.7 Nonlinears . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
12.7.1 Hysteresis-Delta-RSP. . . . . . . . . . . . . . . . . . . . . . . . . . 239
12.7.2 Hysteresis-LSP-Delta. . . . . . . . . . . . . . . . . . . . . . . . . . 240
12.7.3 Hysteresis-LSP-RSP.. . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
12.7.4 Hysteresis-MSP-DeltaHalf. . . . . . . . . . . . . . . . . . . . . . 241
12.7.5 Limiter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
12.7.6 Signum. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
12.8 Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
12.8.1 Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
12.8.2 Integrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
12.8.3 Lowpass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
13 Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
13.1 General Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
13.2 Problems with ASCET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
8
14 Code Generation Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
14.1 Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
14.1.1 Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
14.1.2 Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
14.2 Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265
14.2.1 Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265
14.2.2 Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
14.3 Fixed Point Code Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
14.3.1 Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
14.3.2 Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
9
10
ASCET V5.2
The Modeling Language
12
1 Projects
In ASCET, an embedded software system is defined in the context of a project.
A project contains at least the following:
• A collection of modules
• The task schedule for the real-time operating system
• The definition of the inter-process communication
The central part of a project is the definition of the operating system’s task
schedule. Here, the dynamic behavior of the system is described. Fig. 1-1 illus-
trates the structure of a project.
Project
Process A1 Process B1
Task 1 Task 2
Process A2 Process B2
Process A1 Process B2
Process B1 Process A2
Projects 13
The specification of the task schedule is based on the automotive real-time
operating system ERCOSEK. To serve the large number of parallel requests to
the embedded control system, e.g. camshaft interrupts or sampling at a fixed
rate, a priority-based cooperative and preemptive scheduling is the core of the
operating system. This scheduling controls the execution of tasks in a multi-
tasking environment. A task is defined as a list of processes to be executed in
a given order. A process is any portion of a control algorithm which has to be
executed at a given rate or as a reaction to an external interrupt.
Since a control system contains a number of algorithms, the number of pro-
cesses can be very large. At the same time, many of these processes have a
similar dynamic behavior. The collection of processes with the same dynamic
behavior into tasks therefore reduces the administrative overhead of the oper-
ating system and structures the dynamic behavior of the application. Processes
with the same dynamic behavior are therefore collected into one task.
The definition of a real-time task schedule consists of:
• Scheduling
• Tasks
• Processes
• Application modes
14 Projects
1.1.1 Scheduling
Project
Task1 Task2
Process1 Process3
Process2 Process4
Process5
p5
p4
p3
p2
p1
0 10 20 Time (ms)
Task1 Task2 Task1 Task1 Task2
Projects 15
pleted, the interrupted task is continued. This type of scheduling is illustrated
in Fig. 1-4, where the running times of processes are p1= 2ms, p2 = 1ms, p3
= 5ms, p4 = 4ms, and p5 = 2ms.
Process
Task 1 Task 1
Task 1
Task 2 Task 2
p5
p4
p3
p2
p1 ...
T im e
0
10 20
T a sk1 T a sk2 T a sk1 T a s k2 T a s k1 T a sk 2 (m s )
(co n td .)
5
4
3
2
...
1
T im e
0 10 20 (m s )
T ask1 Task2 Task1 Task2 Task1 Task2
(p 4 c o n td .)
16 Projects
In non-preemptable scheduling (micro-controller targets only), neither the cur-
rent process nor the current task are interrupted when a task with higher pri-
ority is activated. The new task is executed only after the non-preemptable task
is completed. Fig. 1-6 shows the same scenario as above (i.e. the same process
running times) with non-preemptable scheduling
Process
p5
p4
p3
p2
...
p1
Time
0 10 20 (ms)
Task1 Task2 Task1 Task1 Task2
Note
Non-preemptable tasks were introduced in ERCOSEK to provide OSEK com-
patibility. Their use is explicitly not recommended, since most jobs can be
solved easier by exclusive use of cooperative and preemptive tasks, and the
configuration of non-preemptable tasks can be complicated due to several
boundary conditions.
1.1.2 Tasks
A task contains a list of processes that are executed on activation of that task.
The execution order of the processes is fixed. The way a task is scheduled by
the scheduler of the operating system is defined by the task settings. There are
several different task modes:
• Alarm tasks are activated periodically. The activation rate is specified in
seconds.
• Timetable tasks (micro-controller targets only) are alarm tasks written
into a timetable. Thus, runtime can be saved (at the price of enhanced
memory requirement).
• Interrupt tasks are activated by an external event. For each processor,
different types of events are available. The appropriate event can be
chosen from a list of events.
• Software tasks are activated by calling an operating system routine, i.e.
they are activated directly through the software.
Projects 17
• Init tasks are activated once before the start of the operation system.
Init tasks contain code for the initialization of the system.
Each task is furthermore assigned to one of the three scheduling groups, non-
preemptable, preemptive or cooperative, and inside each group to one of the
available priority levels. The number of priority levels for each scheduling group
can be defined by the user, and determines the memory demand of the sched-
uler tables. It should be optimized for the final system.
Tasks at a higher priority than the running task can interrupt the running task,
running tasks scheduled as non-preemptable excepted. If the interrupting task
belongs to the preemptive scheduling group, the running task is interrupted
immediately, otherwise the interrupt happens at the end of the current pro-
cess. Preemptive and non-preemptable tasks always have a higher priority than
cooperative tasks. Fig. 1-7 shows the priority scheme. The actually available
tasks depend on the selected target.
Priority
Max. interrupt priority =
Max. preemptive priority Hardware tasks
(ISR)
Hardware tasks
(ISR) and
software/periodic
tasks
Min. interrupt priority
Software and
periodic tasks
Min. preemptive priority 0
Max. cooperative priority
Cooperative
Software and
periodic tasks
Max. cooperative priority (0)
Fig. 1-7 Priority scheme
Each time a task is activated, the time elapsed since the previous activation is
stored in the global variable dT. This variable can be used in the definition of
algorithms to describe the control algorithms independent of their sample
rate.
18 Projects
1.1.3 Processes
Note
Switches between application modes take place via an operating system ser-
vice call. Details can be found in the API description of the ERCOSEK manual.
Projects 19
computed at the highest frequency. At the same time the descriptions of the
algorithms are not distributed, which makes them easier to develop, maintain
and understand.
The functionality of a complex control task can be distributed over several
modules which can be modelled hierarchically. For further refinement classes
and state machines can be used for sub-algorithms or service routines (e.g.
accumulator, pi-control etc.)
Modules are exclusively used by projects and are the top level components
within a project. Usually, modules are used to describe a unique part of a
project, e.g. a lambda control. Therefore modules can have only one instance
inside a project, in contrast to other components, which can have any number
of instances (e.g accumulators).
Like all other components, modules have an interface. The interface of a mod-
ule consists of its processes and the messages which are used for data
exchange.
20 Projects
process2 interrupts
process1
Data become inconsistent
because all processes work
x=1 x= -1 on the same variable
process2
if (x>0) y=sqrt(x)
process1
process2 interrupts
process1
Data stay consistent
because each process works
x=1 x= -1 on its own copy
process2
t=x;
if (t>0) y=sqrt(t)
process1
Projects 21
22 Projects
2 Components
A project is at the top level of an embedded control system specification in
ASCET. Here the framework of an application is defined and its execution are
controlled. A project is the brain of an embedded control system.
Compared to this, components are the body. They are used to specify the
actual control algorithms and other various computation tasks to be per-
formed in the embedded control system.
Components have a clearly defined interface that describes how and when to
perform the algorithms described in the components, and also how data
exchange with other components is to be performed.
There are two types of components: modules and classes. A central aspect in
the design of both types is data encapsulation, where ASCET follows an
object-oriented approach. A component contains a number of elements that
can be used by all processes or methods defined in that module or class. The
scope of these elements can be restricted to be local. Even for messages, the
scope can be restricted to processes defined within that module only.
A component specification consists of:
• The content of the component, i.e. declarations of the variables,
parameters etc. the component uses.
• The interface of the component in the form of processes or methods.
This interface can be extended by allowing access to internal variables
(of classes) and messages (used in modules) directly.
• The algorithms themselves, which specify the computations within a
process or method.
Component
Components 23
2.1 Modules vs. Classes
24 Components
The properties of modules and classes are summarized in Tab. 2-1.
Components 25
Each instance of a component has its own set of elements, but inherits the
interface and the functional description from the component itself.
Component
contains
inherits
Instance A Instance B
Elements Elements
Component (Module)
contains
Elements Interface Algorithms instantiates
inherits
Module A
Elements
26 Components
Classes, on the other hand, can have multiple instances. Here, the distinction
between definition and instantiation becomes more obvious, since there is no
simple one-to-one relation between template and instance. The relationship
can 1:n. The definition of a class is therefore the definition of a reusable, user-
defined model type.
The instantiation of a component only works in the context of a project. Thus,
when working with components only, a default project is automatically created
to provide the context for instantiating the components.
When using a class in another component (see following section), the class is
instantiated in the context of that component, when that component is instan-
tiated. In contrast to this, modules are always instantiated in a project.
public/private Diagram
modelled in
assigned to
adjoining
methods/processes algorithms
Components 27
class, i.e. the access to the same set of instance variables and parameters,
makes the concept of methods and classes far more pervasive than that of
subroutines. Methods have access to all the elements defined in their class.
The arguments and return value of a method can only be used in the body of
the associated method. In addition, each method has a number of method-
local variables. These variables are temporary and not static, and like argu-
ments, they can only be used in the body of the associated method.
Referenced
class
28 Components
2.3.2 The Interface of Modules
Method
Interface
optional:
Process Process Process
Method
(algorithm) (algorithm) (algorithm)
(Algorithm)
Messages
Module
Components 29
If a class is used in another component, the class will automatically be instan-
tiated and initialized when the containing component is initialized.
There is, however, an exception. When using a class that is imported, i.e the
class is instantiated in some other context, for instance in the project directly,
the usage relation is not a containment but a reference relation. Thus a cyclic
dependency does not lead to an unresolvable containment relation in this case.
Class A Class A
uses
uses
Class B
Class B
Class A
Class B
Class A Class A
uses
...
uses
Class B
Class B
(imported)
Class A
contains
references
30 Components
2.4.1 Hierarchical Class Structure
When using a class inside some other component, the methods of the class
can be used as subroutines in the component.
Module or class
Components 31
In addition, the communication structure in a hierarchical mode can be made
much more transparent, since the dataflow is directly visible in block diagrams.
Module
32 Components
The following diagram shows the components of a state machine.
State Machine
State Diagram
Public Diagram
State
Trigger
Junction
Transi- Public
Action
tion Method
Transition
State Junction
Condi-
Action
tion ActionCondition
Diagram
Condi-
Action
tion
Components 33
The sample diagram contains the relevant graphical components of a state
machine.
Open hierarchy state, Condition
simultaneously start state Transition action
Transition
Segment
Start state with action
within the
hierarchy
Static
action Junction
Exit
action
Closed Conditions
hierarchy state
with history
Transition
with associated trigger
Transition priorities Entry action
States
34 Components
no other states are called base states (State_A_1, State_A_2, State_B in
Fig. 2-11). A hierarchy state can have a history (see page 44). History provides
an efficient means of basing future activity on past activity.
The states are mutually exclusive, i.e. only one base state can be active at any
one time. If the active base state is the substate of a hierarchy, all hierarchy
states that contain the active state are active, too. If, for example, the
State_A_2 state in Fig. 2-11 is active, the hierarchy state State_A is active,
too. If one of the (invisible) substates of State_A_3 is active, State_A_3
and State_A are active, too.
Each state has a unique name. Identical names are forbidden within different
hierarchies. If you use an existing name a second time, _n is added to it. n is
the smallest unissued number for this name (States State_A_1 to
State_A_3 in Fig. 2-11). The following names are forbidden, too:
• names of methods, processes, elements etc. in the entire project
• names from the C language (e.g., static, define, etc.)
Such state names do not always result in an error message, but the
generated code is always wrong.
Besides the names, the state labels contain the various actions (see page 45).
These are processed successively according to their type. The following types
exist: entry action, static action and exit action. All actions are optional.
Transitions
A transition is a graphic object connecting two states. One end of the transi-
tion is attached to the source state where the transition begins. The other is
connected to the destination state where the transition ends. A transition may
be interrupted by one or more junctions (see page 38) and split into several
segments.
A priority is assigned to each transition. The higher the number, the higher the
priority. If more than one transition originate from the same state or junction,
they are evaluated in the order of their priorities. Two transitions from the
same state may not have the same priority.
A transition label describes the circumstances under which the system moves
from one state to another. A trigger event is necessary for a transition to occur.
The name of the trigger is the first part of the transition label. In Fig. 2-11, the
trigger trigger_100ms actuates the transition from State_A_1 to
State_A_2. Optionally, the transitions can also contain a condition (see
page 45) and an action (page 45), the transition action. These are named in
the second and third part of the label. In the state diagram, conditions are
Components 35
represented in square brackets, transition actions with a leading "/". How trig-
gers, conditions and actions are assigned to the segments of a transition with
junctions is described in "Junctions" on page 38.
A transition is valid when its source state is active and its condition—if speci-
fied—is true. There are several kinds of transitions:
1. Transitions between base states
36 Components
3. Transitions between substates of different hierarchies
Components 37
5. Transitions with junctions
All types of transitions can contain junctions (see next section). Here,
just one of the many possible examples is shown.
If state H is active and the trigger event trigger occurs, the system
leaves state H. In the junction, the conditions to the leading transition
segments ([condition_1], [condition_2], [condition_3])
are tested in sequence for their priority. If, for example, the condition
[condition_2] is fulfilled, transition to state J occurs. If none of the
conditions are fulfilled, the system remains in the start state H.
Junctions
38 Components
• Transitions from a starting state to several destination states are clearly
represented.
A B
You can achieve the same functionality modelled with a junction in Part
A of the diagram by direct transitions from the start state
source_state to the destination states (Part B of the diagram).
However, using the junction brings a runtime benefit, as the transition
segment between the start state and the junction is evaluated first. If
this is already invalid, no transition can take place and you need not
consider the segments leading away from the junction.
• Also, transitions from several starting states to a destination state are
clearly represented.
A B
In this case too, both ways of writing have the same meaning. You can
(and should) assign an action shared by all three transitions to the seg-
ment leading away from the junction.
• If none of the transition segments leading away from the junction are
valid, then no transition occurs and the system remains in the starting
state.
Components 39
• Transition segments from a junction into a state can contain actions.
40 Components
• Only one segment of a transition has a trigger. Usually, a trigger is
assigned either to the segments leading towards the first junction of a
transition, or to the segments leading away from the last junction, but
not to all segments.
or
Note
The assignment of triggers to more than one segment of the same tran-
sition is not deactivated. However, in such a case, ASCET outputs an error
message if different triggers are assigned to the segments.
You are therefore responsible for the assignment of triggers.
Triggers activate the execution of the state machines: Each trigger call causes
the execution of one state machine step. They are public methods of the state
machine; you must define each trigger that affects the state diagram. A trigger
can have arguments for communication with other ASCET components (see
also the sections "State Machines as Classes" on page 83 and "The State
Machine Editor" in the ASCET user’s guide).
A state machine can have one or more triggers. Each transition is assigned to
one of the triggers of the state machine. By this assignment, it is possible to
define several substate machines that work on the same states. Each trigger
can be started independently. The state machine is activated whenever a trig-
ger is started: all transitions from the current state are checked in the order of
their priority, and a transition is executed if necessary.
Hierarchy
State machines often have a large number of states. The hierarchy allows the
organization of complex systems by defining higher or lower-level object struc-
tures. A hierarchical design usually reduces the number of transitions and pro-
duces structured and readable diagrams (see also section "Hierarchy States" in
the ASCET user’s guide).
Components 41
ASCET supports the hierarchical organization of states in the form of open and
closed hierarchies (State_A and State_A_3, respectively, in Fig. 2-11). The
only difference between them is the graphical representation.
Each state can contain other states. Those states are called hierarchy states;
states containing no other states are called base states. A state contained in a
hierarchy state is called a substate of the hierarchy state. The system is always
in a base state, and together with that base state also in its associated hierar-
chy states.
The state diagram shown here has a hierarchy state that contains two sub-
states. (Some transitions are left out for clarity.)
The hierarchy state engaged contains the two substates first and second.
This makes engaged the parent state of first and second. When the trig-
ger event clutch_engaged occurs, the system transitions from the neu-
tral state to the hierarchy state engaged.
42 Components
Far more complicated structures are possible, too (see Fig. 2-11). The following
is an example of a hierarchical state machine with two hierarchical substates,
one of which contains a further hierarchy state. The lines between the states
symbolize a containment relation and should not be confused with transitions.
Statemachine
S S
State A1
State A2 State B1 State B2 State B3
The start state specifies which state is to be activated when there are several
possibilities on the same hierarchy level. Thus, the start state of the entire state
machine, or that of a hierarchy level is determined.
Components 43
A common error in the specification of state machines is the generation of
several states without marking one of them as start state. In that case, there is
no indication of which state becomes active by default. Therefore, on code
generation, ASCET outputs an appropriate error message.
The state neutral is the start state of the entire state diagram shown below,
first is the start state of the hierarchy state engaged.
With that, the state neutral becomes active when the state machine is first
activated. If you had not defined a start state, it would be unclear whether
neutral or engaged should be activated. When a transition from neutral
to engaged occurs, the substate first is activated inside the hierarchy state.
History
The history option provides the means to determine the destination substate
of a transition to a hierarchy state based on past activities. If a hierarchy state
has a history, the transition ends in the substate that was most recently active.
The history belongs to the hierarchy state in which the option was set. It takes
priority over the start state within the hierarchy.
The H in the diagram indicates that the hierarchy state engaged has a history.
Whether the first or second substate is activated upon a
transition from neutral to engaged is based on which of them was
most recently active.
The generated code contains a special variable for the history, the history vari-
able.
44 Components
Conditions
In the system shown here, the transition from first to second takes place
if the Boolean condition [speed > threshold] is true.
You can specify conditions as block diagrams (in separate diagrams) or in ESDL
(in separate diagrams or directly at the transition). For more information, see
section "Specifying Conditions and Actions" in the ASCET user’s guide.
Conditions can also have arguments for communication with other ASCET
components. You can find more on this in section "State Machines as Classes"
on page 83 and in the ASCET user’s guide, section "Communication with
Other Components".
Actions
Actions take place as part of the state machine execution. An action can be
executed either as part of a transition from one state to another (e.g.
/transition_action in Fig. 2-11), or based on the activity status of a
state (e.g. static_A2 or exit_A1 in Fig. 2-11).
Components 45
Transitions and transition segments leading away from a junction can have
transition actions. States can have entry, static and exit actions. All actions are
optional. In Fig. 2-11 on page 34, the State_A_1 state has all three action
types, whereas State_A_2 has neither entry nor exit action, only a static
action. The transition from State_A_1 to State_A_2 has no action.
When, in this example, the first state is active, and no transition occurs, the
static action accelerate is executed. At the transition from first to sec-
ond, the transition action switch_gear is executed.
The sections "Semantics: Simple State Machines", "Semantics: Junctions in
State Machines" and "Semantics: Hierarchical State Machines" describe in
detail which actions are executed when. You can specify actions as block dia-
grams (in separate diagrams) or in ESDL (in separate diagrams or directly at the
transition). For more information, see the ASCET user’s guide, section 4.2.3
"Specifying Conditions and Actions".
Actions can also have arguments for communication with other ASCET com-
ponents. You can find more on this in section "State Machines as Classes"
on page 83 and in the ASCET user’s guide, section "Communication with
Other Components".
Data
Data objects are used to store and process numerical values in the state dia-
gram. The following types are available:
• Variables, parameters, constants (see page 96)
• Enumerations (see page 96)
• Arrays, matrices (see page 91, 92)
• Literals (see page 96)
• Temporary variables (see page 98)
• Characteristic curves and maps (see page 92)
• Inputs for data from other ASCET components
• Outputs to other ASCET components
46 Components
• other classes (e.g., timers, counters, comparators)
The state variable sm of type unsigned discrete also belongs to the data.
The variable is created in every state machine.
This variable contains the number of the currently active state. You cannot edit
it in the state machine editor but you can measure it in an experiment. If an
ASAM-MCD-2CM file is generated for a project containing a state machine,
the sm parameter is also saved to the file.
2.5.2 Semantics of State Machines
Note
When a state machine is called for the first time, the entry action of the start
state is not executed.
The static action of a state is executed if the state is active and a trigger event
occurs which does not result in a transition from the state. When a transition
between two substates of the same hierarchy state occurs, the hierarchy state
(which is not left) executes and completes its static action after the source state
was left, but before the transition action is executed.
Components 47
The exit action of a state is executed when a transition from that state occurs.
The state becomes inactive after the execution of the exit action is completed.
The transition action of a transition is executed after the source state has been
left and before the destination state is activated.
The semantics describe how a state diagram is interpreted and executed and
in which order the actions will be executed. Knowledge of the semantics of
state diagram is essential for the creation of suitable state machines and the
generation of efficient code. Different implementation options result in differ-
ent simulation behavior and in the executable code.
The semantics of state machines contain rules for the
• Processing of states,
• Selection of transitions,
• Processing of transitions.
The following sections describe the semantics of state machines using exam-
ples. These cover a wide range of possible implementations and combinations
of the different actions.
Refer to the section "Semantics: Summary" on page 68 for a summary of the
rules.
2.5.3 Semantics: Simple State Machines
This simple state machine models a light switch. At the beginning, the lamp is
off, the state dark is active. The trigger event trigger occurs and initiates
the evaluation of the state machine. The light switch is pressed, so that the
condition switch_on is true. The following steps are executed:
1. The state diagram checks to see if there is a valid transition.
2. The dark state is active so that only the transition from dark to
bright has to be evaluated. The condition [switch_on] is fulfilled,
the transition is valid.
3. The dark state has no exit action that could be executed. It is deacti-
vated.
48 Components
4. The transition action is executed, the counter switch_count is
increased by 1.
5. The bright state is activated.
6. The lamp_on entry action is executed and completed. The lamp is
switched on.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
Every state can have transitions to more than one other state. To make the
behavior of the state machine deterministic, each transition has to be assigned
a priority. The priority determines the order in which the conditions belonging
to the transitions are checked. Once a condition evaluates to true, the asso-
ciated transition takes place, and all other conditions belonging to transitions
with lower priorities are not tested. If no condition evaluates to "true", the
state remains unchanged and the static action is executed.
Example 2: Several possible transitions from one state
Components 49
The state machine is in the speed state. A trigger event trigger_100ms
occurs; the temperature drops from 1.5 °C to 0.5 °C. The switch is not pressed.
The following steps are executed:
1. The system checks to see if there is a valid transition from speed.
2. The transition from speed to distance has the highest priority, and
is evaluated first. However, the [key_pressed] condition is not ful-
filled, the transition is invalid.
3. The transition from speed to temperature has the condition
[t_air < 1 && !frost_warning]. At first, the temperature was
above the threshold of 1 °C and no frost warning was required. Now,
it has dropped to 0.5 °C. Both parts of the condition are true, the tran-
sition is valid.
4. The speed state has no exit action. It is deactivated.
5. The /frost_warning = true transition action is executed, and the
frost warning appears.
6. The temperature state is activated.
7. Since that state has no entry action, the evaluation of the state
machine initiated by this trigger event is finished.
Example 3: Loop
The state machine is the same as in Example 2. However, the entry action
clear_display was added to the states. The state machine is in the tem-
perature state. Otherwise, the starting state is the same as in the previous
example. A trigger event trigger_100ms occurs and the switch is not
pressed. The following steps are executed:
50 Components
1. The system checks to see if there is a valid transition from tempera-
ture.
2. The transition from temperature to speed has a higher priority, but
the condition is not fulfilled. The transition is invalid.
3. The transition from temperature to itself has the condition
[t_air < 1 && !frost_warning]. This is fulfilled, the transition
is valid.
4. The temperature state has no exit action. It is deactivated.
5. The /frost_warning = true transition action is executed, and the
frost warning appears.
6. The temperature state is activated.
7. The entry action clear_display of the temperature substate is
executed and completed.
With that, the evaluation of the state machine initiated by the
trigger_100ms trigger event is finished.
Junctions (see page 38) aid the legibility of state diagrams. The functionality of
all the examples can also be described using direct transitions between the
states.
Example 4: If…Then…Else Construction
Components 51
This state machine models a simple drinks machine which offers four different
drinks. The state machine is in the waiting state. A trigger event
trigger_10ms occurs: someone wants Cola. This sets the select selection
to 2. The following steps are executed:
1. The system checks to see if there is a valid transition or a valid segment
from waiting.
The transition segment from waiting to the left-hand junction is
valid.
2. The transition segments leading away from the junction are examined
in order of their priority, starting with the segment of the junction to
state Orange.
The condition [select==1] is not fulfilled, the segment is invalid.
3. Next, the segment from the junction to state Cola is tested.
The condition [select==2] is fulfilled, the segment is valid. This
means that there is a fully-valid transition available from the state
waiting.
4. Only now does the transition occur. The state waiting has no exit
action and is deactivated.
5. The Cola state is activated.
6. The pour_Cola entry action is executed and completed.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
Example 5: No transition
The state machine is the same as in Example 4. The state machine is in the
speed state. A trigger event trigger_10ms occurs, the selection select is
set to 5 by mistake. The following steps are executed:
1. The system checks to see if there is a valid transition or a valid segment
from waiting.
The transition segment from waiting to the left-hand junction is
valid.
2. The transition segments leading away from the junction are examined
in the order of their priority.
As select was set to 5, none of the conditions are fulfilled, all the
segments are invalid.
52 Components
3. There is no valid transition from waiting. The system remains in the
state waiting. As the state has no static action, nothing happens.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
Components 53
3. The waiting state has no exit action. It is deactivated.
4. The transition from waiting to waiting has no transition action,
and therefore the state waiting is reactivated.
5. The entry action select=0; from waiting is executed and com-
pleted.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
This loop construction corresponds to a direct transition from a state to itself
from Example 3.
Example 7: Transitions from multiple start states to a destination state (one
trigger)
The state machine is the same as in Example 6. The state Cola is active, the
glass has been filled and the logical variable glass_full set to true. A
trigger event trigger_10ms occurs, and the following steps are performed:
1. The system checks to see if there is a valid transition or a valid segment
from Cola available.
The transition segment from Cola to the right-hand junction is valid.
2. The transition segment from the junction to the state waiting has the
condition [glass_full]. As glass_full was set to true, this
segment is also valid and the transition can take place.
3. The Cola state has no exit action. It is deactivated.
54 Components
4. The transition has no transition action and therefore the state wait-
ing is activated next.
5. The entry action select=0; from waiting is executed and com-
pleted.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
This state machine describes a drinks machine which offers different types of
sodas or beers. The actual choice takes place in the hierarchy states soda_on
and beer_on; it is irrelevant for the example. The section "Semantics: Hierar-
chical State Machines" describes the semantics of hierarchical state machines.
The state machine is in the starting state beverage_off. A trigger event
trigger_soda occurs and the machine is switched on (switch_on is
true). The following steps are executed:
1. The system checks to see if there is a valid transition or a segment from
beverage_off.
2. The transition segment from beverage_off to the junctions is valid,
as the condition [switch_on] is fulfilled. As the trigger event
trigger_soda has occurred, the segment from the junction in the
state soda_on is also valid; the transition can occur.
3. The beverage_off state has no exit action. It is deactivated.
4. The transition from beverage_off to soda_on has no transition
action. Therefore, the state soda_on is activated next.
Components 55
5. The entry action start_soda of soda_on is executed and com-
pleted.
6. The necessary steps in the hierarchy state are executed.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
The state machine is the same as in Example 8. The system is in the state
soda_on (or in one of the substates of the hierarchy). A trigger event
trigger_soda occurs, the machine is switched off (switch_off is true).
The following steps are executed:
1. The system checks to see if there is a valid transition or a segment from
soda_on available.
2. The transition segment from soda_on to the junctions is valid, as the
condition [switch_off] is fulfilled. As the trigger event
trigger_soda has occurred, the segment from the junction in the
state beverage_off is also valid; the transition can occur.
3. The necessary steps in the hierarchy state are executed.
4. The exit action shut_down of the state soda_on is executed.
5. The transition from soda_on to beverage_off has no transition
action. Therefore, the state beverage_off is activated next.
56 Components
6. The entry action reset of beverage_off is executed and com-
pleted.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
2.5.5 Semantics: Hierarchical State Machines
Upon activation of the state machine, the conditions of the transitions are
checked. The hierarchical order determines the priority. The highest hierarchi-
cal level has the highest priority, i.e. the conditions on transitions on upper
hierarchy levels are checked first. When a hierarchy state is left, the current
substates are left as well. The innermost substate is left first, the outermost
hierarchy state is left last. When entering a hierarchy state, the order in which
the entry actions are executed is from the outermost hierarchy state to the
innermost (base) state, i.e. the outermost state is entered first, and the inner-
most is entered last. If no transition takes place, the static actions are executed
in an outward sequence, i.e. the static action of the innermost substate is exe-
cuted first, and the static action of the outermost hierarchy state is executed
last.
Note
The examples in this chapter assume no optimization of static actions in hier-
archy states. If this optimization is activated, the semantics change, see
"Optimized for Code Size" on page 76
Components 57
In the state display, this hierarchical state machine contains the display func-
tion from Example 3. display is a hierarchy state. As soon as a temperature
of 3 °C is exceeded, the frost warning is to be reset. The second state on the
highest hierarchy level, reset_frost_warning, is used for that purpose.
Every 10 seconds, a change from display to the reset_frost_warning
state can occur, where the frost warning is switched off.
After the frost warning was displayed (frost_warning = true), the dis-
tance display was selected so that the system was in the distance state. The
temperature rose to 5 °C, and the transition from display to
reset_frost_warning took place when the trigger event trigger_10s
occurred. The system is now in the reset_frost_warning state. A trigger
event trigger_100ms occurs, and the following steps are performed:
1. The system checks to see if there is a valid transition from
reset_frost_warning.
2. The transition from reset_frost_warning to display has no
condition; it is therefore valid at every trigger_100ms trigger event.
3. The reset_frost_warning state has no exit action. It is deacti-
vated.
58 Components
4. The transition from reset_frost_warning to display has no
transition action, and the display hierarchy state is activated next.
5. The reset_count entry action of the display hierarchy state is exe-
cuted and completed.
6. The temperature substate is the start state in the hierarchy. It is acti-
vated.
7. The entry action clear_display of the temperature substate is
executed and completed.
With that, the evaluation of the state machine initiated by the
trigger_100ms trigger event is finished.
The state machine is the same as in Example 10. Now it has a history. The
prehistory and the starting state are the same as in the previous example.
The system is now in the reset_frost_warning state. A trigger event
trigger_100ms occurs, and the following steps are performed:
1. The system checks to see if there is a valid transition from
reset_frost_warning.
Components 59
2. The transition from reset_frost_warning to display has no
condition; it is therefore valid at every trigger_100ms trigger event.
3. The reset_frost_warning state has no exit action. It is deacti-
vated.
4. The transition from reset_frost_warning to display has no
transition action, and the display hierarchy state is activated next.
5. The reset_count entry action of the display hierarchy state is exe-
cuted and completed.
6. Since display has a history ('H' in the above figure), the speed sub-
state is activated. That state was active when the hierarchy state was
left.
7. The entry action clear_display of the speed substate is executed
and completed.
With that, the evaluation of the state machine initiated by the
trigger_100ms trigger event is finished.
60 Components
Example 12: Transition within a hierarchy state
If a transition takes place inside a hierarchy state, the state machine remains in
that hierarchy state. Therefore, the static action of the hierarchy state is exe-
cuted, as well as the static actions of all hierarchy states that contain the state
in question. They are executed after all exit actions, and before the transition
action, from the innermost hierarchy state to the outermost one.
The state machine is the same as in Example 11. The state machine is in the
speed state. The temperature is still 5 °C, the frost warning is switched off
(frost_warning is false). A trigger event trigger_100ms occurs, the
switch is pressed (key_pressed is true). The following steps are executed:
1. The system checks to see if there is a valid transition.
2. The transition from the display hierarchy state to
reset_frost_warning is initiated by another trigger
(trigger_10s); it is of no importance here.
3. The transition from speed to the distance substate is evaluated.
The condition [key_pressed] is fulfilled, the transition is valid.
4. The speed state has no exit action. It is deactivated.
5. The display hierarchy state is not left. Therefore, its static action
count is executed and completed.
Components 61
6. The transition from speed to distance has no transition action, and
the distance substate is activated.
7. The entry action clear_display of the speed substate is executed
and completed.
With that, the evaluation of the state machine initiated by the
trigger_100ms trigger event is finished.
This state machine acts as a data generator. When enable is set to true, a
signal is produced, either a ramp (state ramp, mode = 1) or a sine (state
sinus, mode = 2).
The down substate in the sinus hierarchy state is active. The signal mode
mode is set to 1, enable remains true. A trigger event occurs, and the fol-
lowing steps are performed:
1. The system checks to see if there is a valid transition. Since the transi-
tions from the sinus hierarchy state have higher priorities than those
from down, they are evaluated first.
62 Components
2. The transition from sinus to nothing has the highest priority. It is
invalid, though, because the condition [enable == false] is not
fulfilled.
3. The transition from sinus to ramp is evaluated next. The condition
[(enable ==true) && (mode == 1)] is true, the transition takes
place.
The transition from the down substate to the up substate has the low-
est priority and is not evaluated.
4. The down substate has no exit action, it is deactivated immediately.
5. The exit action stop_sinus of the sinus hierarchy state is executed
and completed.
6. The sinus hierarchy state is deactivated.
7. The transition from sinus to ramp has no transition action, therefore
the ramp hierarchy state is activated next.
8. The entry action start_ramp of ramp is executed and completed.
9. The calc substate is the start state within the hierarchy. It is activated.
10. The entry action value = PMn; output = value; of calc is
executed and completed.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
Components 63
Example 14: Loop
The source and destination states of a transition can be identical. Such loops
are frequently used to specify the reset function of a hierarchy state.
The ramp hierarchy state from the state machine in Example 13 has now a
reset function in the form of a loop, i.e. a transition from ramp to itself. The
rest of the state diagram is left out for clarity.
The recalc substate in the ramp hierarchy state is active. A trigger event
occurs, the reset button is pressed (reset_ramp = true). enable and
mode remain unchanged. The following steps are executed:
1. The system checks to see if there is a valid transition.
2. The loop has the highest priority. The condition [reset_ramp] is ful-
filled, the transition is valid.
Other transitions are not evaluated.
3. The recalc substate has no exit action, it is deactivated immediately.
4. The exit action stop_ramp of the ramp hierarchy state is executed
and completed.
5. The ramp hierarchy state is deactivated.
6. The loop's transition action /reset is executed and completed.
7. The ramp hierarchy state is re-activated.
8. The entry action start_ramp of ramp is executed and completed.
64 Components
9. The calc substate is the start state within the hierarchy. It is activated.
10. The entry action of calc is executed and completed.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
This state machine is the same as the one in Example 13, only the transition
from the up substate in the sinus to the substate calc in ramp was added.
The up substate in the sinus hierarchy state is active. The value value is
lower than the maximum PMx. A trigger event occurs. mode remains 2, and
enable remains true, but the fast-switch is pressed (fast_switch =
true). The following steps are executed:
1. The system checks to see if there is a valid transition.
2. The transitions from sinus to nothing and from sinus to ramp are
evaluated first. They are both invalid because the associated conditions
are not fulfilled.
3. The transition from substate up to substate down is evaluated next. It
is invalid, too, because the condition [value >= PMx] is not fulfilled.
Components 65
4. The transition from up to the calc substate has the lowest priority and
is evaluated last. The condition [fast_switch] is true, the transition
takes place.
5. The up substate has no exit action; it is deactivated immediately.
6. The exit action stop_sinus of the sinus hierarchy state is executed
and completed.
7. The sinus hierarchy state is deactivated.
8. The transition action (/mode = 1; fast_switch = false;) is
executed and completed.
9. The ramp hierarchy state is activated.
10. The entry action of ramp is executed and completed.
11. The calc substate is activated.
12. The entry action of calc is executed and completed.
With that, the evaluation of the state machine initiated by this trigger
event is finished.
66 Components
hierarchy state has a history, either the most recently activated substate or the
start state of the hierarchy is entered. This is another way to realize, for exam-
ple, the frost warning.
The state machine is very similar to the Example 10 only here, the frost warning
is implemented using transitions in the hierarchy state. It is in the state dis-
tance. frost_warning is false. A trigger event trigger_100ms occurs;
the temperature drops to 0.5 °C. The switch is not pressed. The following steps
are executed:
1. The system checks to see if there is a valid transition from distance.
2. Another trigger initiates the transition from display to
reset_frost_warning; it is of no importance here.
3. The transition from distance to average_speed is evaluated. The
condition [key_pressed] is not fulfilled, the transition is invalid.
4. The transition from distance to display has the condition
[t_air < 1 && !frost_warning]. Both parts of the condition
are true, the transition is valid.
5. The distance state has no exit action. It is deactivated.
6. The display hierarchy state has no exit action. It is deactivated.
7. The display hierarchy state is activated again.
Components 67
8. The reset_count entry action of display is executed and completed.
9. The /frost_warning = true transition action is executed, and the
frost warning appears.
10. The temperature state is the start state in the hierarchy. It is acti-
vated as display does not have a history.
11. The entry action clear_display of the temperature substate is
executed and completed.
With that, the evaluation of the state machine initiated by the
trigger_100ms trigger event is finished.
Initialization of the state diagram: The start state of the system is acti-
vated. If the start state is a hierarchy state, the start state within the hierarchy
is also activated. No entry action is executed.
Entering a state:
1. If the state has an inactive higher-level state, steps 1–4 are executed for
that state.
68 Components
2. The state is activated.
3. The entry action is executed.
4. Carry out implicit entry actions as necessary:
4.1 If the state contains a subordinate diagram with a history, and if
one of the substate was active after initialization, this substate is
activated and its entry action executed.
4.2 If the state contains a subordinate diagram with a history, and if
one of the substate was active after initialization, this substate is
activated and its entry action executed. Otherwise, proceed as
described in 4.1.
Executing a (basis) state:
1. The transitions leading away from the state and transitions leading out
of higher-level states are evaluated in order of their priority.
2. If a valid transition is found, it is executed. This ends the execution of
the state.
3. If no valid transition from the state is available, the static action is exe-
cuted.
4. If the state has higher-level states, their static actions are executed.
Leaving a state:
1. If the state contains active substates, their exit actions are executed.
The exit action of the innermost basis state is executed first.
2. The exit action of the state is executed.
3. The state is deactivated.
Executing a transition:
The transitions are evaluated in the order of their priority. Transitions from a
hierarchy state always have a higher priority than transitions from the sub-
states of this hierarchy state.
1. A transition or transition segment is tested.
2. If the transition/segment is invalid, the transition/segment with the
next-lowest priority is tested.
3. If the transition/segment is valid, the next step depends on where the
transition/segment ends.
Components 69
In a state:
3.1 No additional transitions or transition segments are tested. In the
case of a transition segment from a junction, the segment is
pulled in to the junction in question to obtain a complete transi-
tion.
3.2 The substates of the start state are left (see "Leaving a state").
3.3 The start state is left.
3.4 The transition action is executed.
3.5 The system enters the destination state (see "Entering a state").
In a junction:
3.1 The transition segments leading away from the junction are eval-
uated as described in steps 1 – 3.
4. If all the transition segments leading away from a junction are invalid,
the system returns to the start state from which the junction was
reached. As the segment in the junctions does not belong to any valid
transition, steps 1 – 4 are executed for the transition/segment with the
next-lowest priority.
5. If all of the transitions/segments leading away from a state are valid,
then no transition occurs and the system remains in the state.
The sequence is represented schematically in Fig. 2-13.
70 Components
top-down,
beginning at
check transitions the highest
from all active states hierarchy level
Yes At least No
one condition
true?
execute
transition action
measurement,
display
measure values
Components 71
2.5.7 Simple Code Example
Parts of the generated code are shown here for this simple state machine.
72 Components
2.5.8 Optimizing the State Machine
Usually, there are several ways to specify the same functionality or to adjust the
code generation/build process settings.
When code is generated for a state machine, parts of actions and conditions
specified at the state or transition are either inserted on the spot (inlining) or—
on certain conditions—generated as separate methods (outlining). The prereq-
uisites for outlining are:
1. The state machine optimization option Outline Generated Methods
(may be changed locally) is activated in the "Project Properties" win-
dow, "Statemachine" node, of the project that contains the state
machine.
This options applies to all state machines contained in the project, and
to all experiments (physical, quantized, implemented).
2. The option Outline automatically generated methods for State
Machines is activated in the implementation editor of the state
machine.
Note
When the first prerequisite is not met, outlining is not done for any state
machine in the project.
When the first prerequisite is met, but not the second, outlining is not
done for this particular state machine.
If both prerequisites are met, code size with and without outlining is checked
during code generation. If code with outlining is smaller, outlining is done.
If actions and conditions (or parts thereof) are specified in separate diagrams,
the corresponding code is either generated in separate private methods (out-
lining), or it is inserted on the spot automatically during code generation (auto-
inlining).
The following prerequisites must be met so that auto-inlining can take place:
1. The state machine optimization option Auto-inline private methods
(Smaller code-size - may be changed locally) is activated in the
"Project Properties" window, "Statemachine" node, of the project that
contains the state machine.
This options applies to all state machines contained in the project, and
to all experiments (physical, quantized, implemented).
Components 73
2. The option Auto-inline private methods (Smaller code-size) is acti-
vated in the implementation editor of the state machine.
Note
When the first prerequisite is not met, auto-inining is not done for any
state machine in the project.
When the first prerequisite is met, but not the second, auto-inining is
not done for this particular state machine.
If both prerequisites are met, code size with and without auto-inlining is
checked during code generation. If code with auto-inlining is smaller, auto-
inlining is selected. This is usually the case for small private functions, or for
functions with only a few calls. Each function is checked separately, so that
only those functions are inlined whose inlining saves code size.
Depending on the possibilities you choose, you can optimize a state machine
under three aspects:
• Response time
• Runtime
• Code size
Optimized for Response Time
If response time is the most important criterion, take advantage of the hierar-
chical structure and the transition priorities. Speed-critical actions are best built
into the highest possible hierarchical level to produce efficient code and the
quickest possible reaction.
This is illustrated by an example:
74 Components
If the emergency stop button is pressed (emergency_stop = true), the
system should stop as fast as possible, i.e. reach the Stop state. By drawing
the associated transition from the Run hierarchy state to the Stop state, the
transition has the highest priority in the hierarchy and is evaluated first.
If any of the substates is active and the emergency button is pressed, the tran-
sition from Run to Stop is always evaluated and the transition occurs.
Direct transitions from each of the substates to Stop are as efficient regarding
time, but they require higher maintenance effort because four transitions are
specified instead of one.
A separate trigger for time-critical events (emergency_stop = true in the
example) also optimizes response time. The drawback is additional program
code for the separate trigger.
Optimized for Runtime
If the total runtime is the most important criterion, you can use several optimi-
zation possibilities, individually or in combination, to generate efficient code.
Actions/Conditions: If actions or conditions are specified with partly or
totally the same functionality, this can be done either runtime-optimized or
size-optimized. Runtime-optimized means that the code for each action and
condition is inserted on the spot during code generation. No additional func-
tion call is required. The disadvantage is the repeatedly generated code and
thus increased memory requirement.
This can be achieved by specifying the code explicitly at the state or condition
and deactivating the options Outline Generated Methods (may be
changed locally) and Outline automatically generated methods for
State Machines (see prerequisites for outlining on page 73).
The optimization becomes even more effective if auto-inlining (see page 73) is
activated. In that case, even actions/conditions specified in separate diagrams
are inserted on the spot, if applicable.
Components 75
With the Inline option in the implementation editor of an action/condition
specified in a separate diagram, you can enforce inlining.
Junctions: If several transitions with partially identical conditions lead away
from a state, the use of junctions can bring runtime savings. Identical sections
of the conditions are assigned to the transition segment from the start state in
the first junction. If these are not fulfilled, the other segments are not evalu-
ated.
76 Components
This can be achieved by specifying the repeatedly used parts as methods in a
separate diagram, which are then called from the actions (see figure).
As an alternative, you can enter the code directly at the state or transition and
use the outlining functionality.
For both alternatives, the code is generated only once. The price to be paid are
additional function calls.
In some cases (small private functions, few calls), it may be advantageous,
regarding code size, to insert the code on the spot. You can activate auto-
inlining (cf. page 73) with the Auto-inline private methods (Smaller code-
size - may be changed locally) and Auto-inline private methods (Smaller
code-size) options; with that, you have selected the most effective optimiza-
tion of actions and conditions for code size.
Static actions of hierarchy states: For static actions in hierarchy states, an
additional optimization option exists.
By default, code for the static action of a hierarchy state is generated for each
transition that does not lead out of the hierarchy, as well as once for each
substate of the hierarchy. In large hierarchies, this can result in a noticeable
part of the entire code.
When you activate the Optimize Static Actions (Restricted Modeling) code
optimization option in the project that contains the state machine, code for
the static action of a hierarchy state is generated only once for each substate.
Thus, code size can be reduced.
Components 77
A disadvantage of this optimization is that it does not work for some models.
If a state machine contains a substate with a direct transition out of it’s hierar-
chy state, this transition must have the highest priority of all transitions from
that substate. Otherwise, code generation aborts with the following error mes-
sage:
ERROR(YSm72): higher priority transitions do not exit
hierarchy state "HState", but this transition does.
The changes in code generation change the state machine semantics as fol-
lows:
Note
The changes can alter the behavior of the state machine. If you activate the
option for an existing state machine, check it’s behavior carefully.
• The static action of the hierarchy state is executed before the condi-
tions of the transitions from the substate are evaluated.
• If no transition occurs, the static action of the hierarchy state is exe-
cuted before the static action of the substate.
• If a transition occurs, the static action of the hierarchy state is executed
before the exit action of the substate.
Two examples illustrate the effect of this optimization. In both examples, the
state machine consists of the hierarchy state HState containing the substates
Start and InnerState1, and the base state OuterEnd. Two transitions
leave Start, one of them (Start → OuterEnd) also leaves the hierarchy
state HState.
In the first example, the transition from State to OuterEnd has a higher
priority than the transition from State to InnerState1. This means that
code can be generated both with activated and deactivated Optimize Static
Actions (Restricted Modeling) option.
78 Components
The following table shows the generated C code for both cases. Code for the
static action of HState is set in boldface.
Components 79
In the second example, the transition from State to OuterEnd has a lower
priority. With activated Optimize Static Actions (Restricted Modeling)
option, code cannot be generated.
80 Components
Hierarchical Code Generation: Two possibilities exist to generate code for
a hierarchical state machine:
With flat code generation, the hierarchy is flattened, i.e. a single switch
statement is generated for all (basis) states and transitions.
With hierarchical code generation, several switch statements are generated,
nested according to the hierarchy. To activate this kind of code generation, the
following options must be activated:
1. project settings, "statemachine" node: Hierarchical Code Genera-
tion (may be changed locally)
2. implementation editor of the state machine, "Settings" tab:Hierarchi-
cal code generation for State Machines
When the first option is not activated, no hierarchical code generation is done.
When the first option is activated, the second option activates/deactivates hier-
archical code generation for a particular state machine.
With hierarchical code geenration, code for transitions from hierarchy states is
generated only once, instead of once for each affected basis state with flat
code generation. Thus, code size is reduced. The reduction can be considerable
(up to 30%). In the experiment, hierarchical and flat codegeneration behave
identcal for identical state machines.
Note
For hierarchy states without transitions and/or static actions, code size is not
reduced, but slightly (1–2%) increased.
Note
The reduced code size does not show in the generated C file, but in the
generated executable file.
Components 81
The transition from top_1 to top_2 is set in boldface.
82 Components
return; self->x->val = self->x->↵
} val + 1.0;
self->y->val = self-> ↵ return;
y->val + 1.0; }
self->x->val = self-> ↵ case top_2 :
x->val + 1.0; {
return; if (self->log_t->val)
} {
case middle_2 : self->x->val = 0.0;
{ self->sm->val = middle_1;
if (!self->log_m->val) return;
{ }
self->x->val = self-> ↵ return;
x->val + 1.0; }
self->sm->val = ↵ }
middle_1;
return;
}
self->x->val = self-> ↵
x->val + 1.0;
return;
}
}
}
}
Triggers and trigger arguments: If trigger arguments are used for com-
munication with other ASCET components, instead of inputs and outputs, the
static RAM requirements are reduced. You can find more information on this
in the next chapter.
2.5.9 State Machines as Classes
A state machine is a class with special description means. The trigger, condition
and actions are modelled as special methods:
• A trigger is a public method without a return value. The state machine
is executed whenever a trigger is started.
• A condition is a private method with a return value of type logical.
• An action is a private method. An action has, as standard, no argu-
ments and no return value.
If necessary, you can add arguments to any of these methods, for communica-
tion with other ASCET components.
Components 83
Inputs and outputs serve for the integration of the state machine with other
components. The input values are buffered to internal variables and can there-
fore be used in all computations of the state machine (in contrast to arguments
of a method, that can only be used in the method itself). The outputs are also
buffered, so they can be read without invoking the computation of the state
machine. Each input and output needs its own sequence call (see section 6.3).
84 Components
• Arguments and conditions are private methods. Their arguments are
therefore not available outside the state machine. In the Layout Editor,
they are represented by white argument connections.
If a trigger argument is to be used in an action or condition specified as
a block diagram, an argument of the same type and the same name as
the trigger argument must be added to each corresponding method.
Trigger
Return values
arguments
from
conditions
Arguments from
actions/conditions
(t_air is used in
two methods)
The arguments are depicted according to their name and their type. If,
in the trigger and the action/condition, there are arguments with the
same names but with different types, a warning is issued. If the argu-
ment is only defined in an action or a condition but not in the opening
trigger, an error message is output.
Also, there are the following rules for the use of trigger arguments in actions
and conditions:
• All trigger arguments which are to be used in the entry action of a state
must be defined in the action and in every trigger belonging to the
transition leading into the state, as it will be started by these triggers.
• All trigger arguments which are to be used in the exit action of a state
must be defined in the action and in every trigger belonging to the
transition leading out of the state, as it will be started by these triggers.
• All trigger arguments which are to be used in the static action of a state
must be defined in the action and in each trigger of the state machine.
Each trigger event which does not cause a transition from the active
state, starts the execution of its static action.
• You must define all trigger arguments which are to be used in the con-
dition or transition action of a transition, in the action/condition and in
the triggers belonging to the transition, as they will be started by this
trigger.
If one of these rules is violated, an error message is issued.
Components 85
After the integration into another components, you can assign values to the
trigger arguments. In contrast to the inputs and outputs, only a sequence start
(see section 6.3) is required for all the arguments.
Additionally, 'normal' public methods can be defined for a state machine like
with all other classes. These public methods offer several additional possibili-
ties. They can be started from outside the state machine, e.g., as well as from
the states and transitions. Their arguments and return values can replace
inputs and outputs in the communication with other components. In this case
too, only a single sequence start is required for the complete method (this does
not, however, bring any runtime savings). You also have the option of prepar-
ing the input values, should they be needed in the state machine.
86 Components
different time frame. You can integrate a second state machine into the first
and - without an additional trigger - computed in a different time frame, too,
by starting it via a public method.
Components 87
88 Components
3 Types and Elements
Every algorithm in a component works on elements. An element contains a
piece of data, and makes available an interface for accessing its data or return-
ing the value of a computation (e.g. interpolation of a characteristic line). Ele-
ments are strongly typed, i.e. each element is of a fixed type. Since there can
be more than just a single element of a given type, an element is referred to as
an instance of a given type.
ASCET has a number of basic types, that can be used directly, such as discrete
or continuous variables, arrays, matrices or characteristic lines and fields. New,
user-defined types can be added to the system in the form of classes. Classes
are complex types, they have a complex structure, because they are usually
build up from other types (basic as well as other complex ones). The types can
be classified as in the following diagram:
Types
Value types
Reference types
Scalar Composite
The most important of the basic model types are the scalar ones. ASCET sup-
ports four basic scalar types, which are represented in the various ASCET win-
dows by their respective symbols:
• Continuous is used for continuous physical values that can be infinitely
large and have an arbitrarily fine resolution. This type is suitable for
modelling variables like temperature, speed, etc.; it is referred to as
model type cont.
• Signed discrete is used to model integral numbers of arbitrary size; it is
referred to as model type sdisc.
• Unsigned discrete is used to model non-negative integral numbers of
any size. This type is suitable for modelling things like the number of
cylinders of an engine; it is referred to as model type udisc.
• Logical is used to model logical information, e.g. whether a particular
system is active or not; it is referred to as model type log.
The four basic scalar types are value types. Whenever an element of such a
type is used, not the element itself as an object, but its value is used. Automatic
typecasting between the arithmetic types cont, sdisc and udisc is per-
formed if necessary.
Like complex types (classes), each basic type has an interface, i.e. methods to
access it. For the basic model types these methods are fixed, the interface can-
not be modified.
Scalar types have two simple access methods for the value stored in an ele-
ment of the basic scalar type, i.e. for writing a new value to and reading the
current value from the element:
• set (type a): This method takes one value, e.g. the value a, and
overwrites the value of the element with that value. If the type of the
value does not fit to the type of the element, a type conversion is per-
formed automatically.
• get(): This method returns the current value of the element. The
value returned is of the same type as the element itself
Composite types are basic types that are built up from basic scalar types. The
following composite types are available in ASCET:
• array ( )
• matrix ( )
• characteristic line ( )
• characteristic map ( )
• distribution ( )
Composite types consist of basic scalar types. Arrays and matrices can consist
of all four scalar types, characteristic lines, maps, and distributions only of the
three arithmetic types. Unlike basic scalar types, composite types are reference
types. When assigning two variables of reference types to each other, not the
values are assigned (and copied), but the references to the variable.
All reference types have access methods for their elements:
• set (reference type a): This is an assignment of the reference
to reference type a. After such an assignment, both elements (the
assigned as well as the assigning) are the identical element!
• get: This returns a reference to the element of composite type.
Parameter passing in method calls works in the same manner as assignments.
A reference is passed to the element. As a consequence, a change to the
parameter, for instance by assigning a value to it, is also reflected outside the
method. This mechanism is equivalent to a "call by reference" in programming
languages like C.
Array
An array is a basic type, holding a number of scalar values of the same basic
scalar type, e.g. continuous or logical. The position of a scalar value
within an array is indicated by its associated index value which must be of the
model type unsigned discrete. The size of an array is limited to 2048,
and must be defined statically. The array index takes values between 0 and
size-1.
The interface of an array consists of the following methods:
Send Message
Send & Receive Message
Receive Message
Messages form the input and output variables of processes and are used for
interprocess communication in the same way as basic scalar types. Unlike glo-
bal variables, messages are protected variables in preemptive scheduling. If
two concurrent processes both access the same message, data consistency is
guaranteed, because each process works on its own copy. Messages are only
available in modules. Depending on their usage, there are three different types
of messages:
• Receive messages can only be read. Receive messages are used as
inputs to a module.
• Send messages can only be written to. They are used for the results of
the computations of a module.
• Send & Receive messages can be read from and written to.
Note
The name dT is reserved for the system parameter. You can create no other
element with that name; since reserved keywords so not distinguish
between upper and lower case, DT, dt, and Dt are reserved, too.
Several other types exist besides those already described. They are discussed
here.
Enumerations (type symbol ) are unique types with values taken from a
group of known constants called enumerators.
Literals
Literals are strings that represent a fixed value of a basic scalar type which can
be used in any expression. The value of a literal is either a number (discrete or
continuous), a character string, or one of the values true or false (logical).
In the block diagram editor the values string, true, false, 0.0, and 1.0
are predefined.
Scope
imported exported local dependent virtual
variablesa b
messages
parametersc *d
(system) constants
implementation casts
dT
Tab. 3-2 Symbols for the various element kinds and scopes
Temporary Variables
Note
Dependent variables do not exist.
4.1 Data
The data of a component describes how the elements of a component are to
be initialized. Thus data refers to the elements of a component.
Component
Data
Data
Elements Data
A C
b:cont d:cont
c:C e:log
d:cont d 5 d 7
e:log e true e false
C1 C2
b:cont b 3 b 5
c:C C C1 C C2
d:cont d 5 d 7
e:log e true e false
A1 A2
The data for the basic types can be specified directly. For the scalar types the
data consists of one value. For composite types, like arrays or characteristic
lines, the data consists of a table of values, or a table of sample points and
sample values.
4.2 Implementations
Implementations describe how the elements of a component are to be realized
in code. Here the same scheme as for data is followed:
Component
DataData
Elements Implementation
For composite types like arrays, matrices or characteristic tables, the implemen-
tation is specified for the interface elements of the composite types, which
themselves are of a scalar type.
For arrays, for instance, the implementation for the elements held in the array
must be given. This implementation is valid for both, the input and the output
of the array. The implementation for the index is fixed, since the index is a
discrete model type.
For characteristic tables, the implementation of the x-points and y-points and
the values of the table can be specified separately from each other.
4.2.3 The Implementation of User-Defined Types
Note
Implementation casts cannot be used in conjunction with logical elements.
Component
Implementation Body
Elements
of Elements Specification
specified by user
automatically generated
Implementation (= code) of body
specification
The data stored with an element always contains the "model data", i.e. the
physical values, but the implementation must also be reflected in the data. In
the above example, the physical (model) data for variable a was 1, the data for
the implementation variable A however was 100.
Component
automatically generated
Data (= values) for implementation
variables
The basic elements of a functional description in ESDL are methods and pro-
cesses. A method consists of a method header, which servers as an identifier,
and the method body which describes the operations to be performed.
ESDL syntax is entirely the same as that of the Java programming language.
Every statement in ESDL is terminated by a semicolon (;).
Timer.calculate();
x = a + b;
tmp = Timer.out();
Compound statements or blocks are contained in curly braces { … }.
if (x > 0) {
y = f(x);
z =1; }
Method parameters and expressions are contained in parentheses ( … ).
while (z > 4) {
z--;}
Integrator.reset(15);
Limiter.out(0, 15, 100);
The equals sign (=) is used for assignments.
low = -1;
xVar = a * (b-5);
tmp = xVar.max(15);
5.2.3 Variable Names
In ESDL, variables names are made up of letters and digits. The first element of
a variable name must be a letter. The underscore character counts as a letter.
Variable names must not contain spaces.
The following are valid ESDL variable names:
i, j2a, aVar, a_Var
The names of all variables must be unique within the scope of the current
element. This limitation is important when working with imported classes or
modules. ESDL does not, at this stage, resolve name conflicts.
Reserved Keywords:
The following keywords are reserved and may not be used as variable names.
auto, break, case, char, cond, const, continue,
default, df, do, double, dt, else, enum, exit, extern,
false, float, for, get, getat, getatat, goto, header,
if, inactive, int, interpolate, long, monitorprocess,
normal, null, receive, register, return, search,
ESDL is strongly typed and variables must be declared. The procedure here is
the same as when editing block diagrams. Variables are added to the elements
list and can then be edited as needed.
There are four data types available in ESDL, namely udisc, sdisc, cont
and log. They can be added to a class or module by selecting the correspond-
ing element from the editor toolbar.
The ESDL method or process body itself does not contain variable declarations.
Only if a variable is local to the current method/process can it be declared and
initialized in the method body using a statement like the following:
cont set = 12.34;
cont temp = 0.78e4;
udisc i = 3, j, k;
sdisc aVar = -12;
log trigger = true;
5.2.5 Type Conversion
Every arithmetic type has a predefined interface which covers a set of basic
math functions. The following messages are available for all arithmetic types:
Literals are values like 12, 6.1e4 or true. Every primitive type (boolean and
arithmetic), can occur as a literal in an ESDL method. The data type of literals
is implicit.
Constants are named values, such as g = 9.81. They are added to a class
and declared in the same manner as variables. The Element Editor can be used
to assign a value and flag a variable as a constant.
Some examples:
• x = g.abs();
The absolute value of the constant g is assigned to the variable x.
• out1 = myvar.max(g); or out1 = g.max(myvar);
The larger of the values myvar (a variable) and g is assigned to the
variable out1.
• out2 = myvar.min(.04); or out2 = (.04).min(myvar);
The smaller of the values myvar and 0.04 is assigned to the variable
out2.
5.2.8 Comments
A comment explains the purpose of a particular piece of ESDL code. There are
two types of comments, commonly referred to as single- and multi-line com-
ment.
In EDSL, method calls take precedence over all other operators. The order of
precedence can be manipulated by adding parentheses to an expression.
Unary Operators:
The unary operators are +, - and ! (not); the latter is used for boolean types.
In addition, the increment and decrement operators ++ and -- are available.
They can be used as prefix or postfix operators.
Unary operators take precedence over all other operators. They associate right
to left.
Arithmetic Operators:
The four arithmetic operators +, -, * and / can be used in ESDL. The mod-
ulus operator %, which calculates the remainder of an integer division, is also
available.
The *, / and % operators take precedence over the binary + and - operators.
Arithmetic operators associate left to right.
Comparison and Equality Operators:
The comparison operators are >, >=, < and <=. They are applied to arith-
metic types and take precedence in this group.
The equality operators == and !=, which can be applied to both value and
reference types, range next in the order of precedence.
Comparison and equality operators are binary. They associate left to right.
Logical Operators:
The logical operators && and || (AND and OR) follow next in the order of
precedence with the AND operator taking precedence over an OR.
Logical expressions are evaluated only until the truth or falsehood of the entire
expression is determined. If, for example, the expression a && b is evaluated
and a evaluates to false, it is redundant to evaluate the remainder of the
expression. The evaluation of b has no impact on the result.
Logical operators are binary. They associate left to right.
Operator Associativity
++ -- right to left
+ - (unary) right to left
! right to left
* / % left to right
+ - (binary) left to right
< <= left to right
> >= left to right
== left to right
!= left to right
&& left to right
|| left to right
?: right to left
= right to left
*= /= %= += -= right to left
Note
An implementation cast in ESDL always refers to the value in the code that
immediately follows the implementation cast.
It is important to note here, that the use of the syntax as described above is
limited to implementation casts. The parentheses must contain an existing
implementation cast; if you specify a standard type, such as uint8 (a), an
error message is displayed.
When using implementation casts, remember that they are not available for
use with logical variables. If an implementation cast is applied to a logical vari-
able, the code generator generates an error message.
Note
The decision whether optimization is performed is made locally at the if
statement. If previous program parts would have to be considered to make
the decision, no optimization takes place.
5.4.2 Switch…Case…Default
The while loop is used to model a simple loop. It has the general form:
while (expressionLog) {
loopStatement; }
The loop condition expressionLog is evaluated. If it is true, the
loopStatement block is executed and expressionLog is evaluated again.
The loop exits when expressionLog evaluates to false.
In ESDL, the loop condition expressionLog must be of type logical.
5.4.4 For
The for loop stands out as one of the modelling features that are available in
ESDL only. There is no equivalent in block diagrams.
The for loop has the general form
for ( initExpression; expressionLog; incrExpression )
{
loopStatement; }
This is equivalent to
initExpression;
while (expressionLog) {
loopStatement;
incrExpression; }
In the for loop, every component of the loop head, initExpression,
expressionLog, and incrExpression, is optional. The loop condition
expressionLog must be of type logical. It is set to true if omitted which
results in an infinite loop.
Note
In ESDL, the components of the loop head must be simple expressions,
comma-separated lists of expressions, such as i=0, j=1; or i++, j--;,
are not accepted. In other words, it is not possible to use more than a single
statement in either the initExpression or the incrExpression.
The break statement can be used to exit immediately from each of the con-
trol elements listed above and return to another enclosing statement or to the
remainder of the model.
Since ESDL does not support labels in the model description, there is no labeled
break statement that returns control to a label.
5.5 Methods
The functional description of a software model in ESDL is contained in meth-
ods. The methods perform calculations and manipulate data. They are invoked
(or called) as operations on objects.
A method call has the general form
receiverClassName.doSomething(parameterList)
where receiverClassName is the name of the receiver object, which ’exe-
cutes’ the doSomething method. Parameters can be passed on as either a
comma-separated list or a single parameter in the parameterList. Any
expression can be a parameter, including method calls.
The following are valid method calls in ESDL:
loader.resolve(false, 1.76);
//do not use characteristic, calculate value for 1.76
numbers.setAt(10*index, index);
//set array numbers to 10*index at index
(12.4)between(valA, valB);
//check if 12 is between valA and valB
Note
If a method has no parameters, the parentheses at the end of the method
name still have to be supplied for the statement to be interpreted as a
method call.
A method call can return a value, which can in turn be assigned to a variable
in the method call. The variable must be of the same type as the return value.
aNumber = anArray.getAt(index);
//assign value from index position
anOffset = loader.resolve(true, 2.14);
//assign value for 2.14, calculate using characteris-
tic
If a method has a return value, the method body must be terminated with a
return statement. The return statement can be followed by any expression
that evaluates to the return type of the method.
return in.between(ub, lb);
// returns a logical value
return intVar;
//returns the value of intVar
A method call can return only a single value. If more than one value is to be
passed on between modules or objects, an object can be used to hold these
values (see section "Structures" on page 134).
Method calls cannot be nested in ESDL. The following statement is illegal:
loader.resolve(true, 2.14).sqrt();
It must be replaced with the following, legal statement:
aNumber = loader.resolve(true, 2.14);
aNumber.sqrt();
Only if direct access methods are enabled for access to an object’s variable, can
a method call be nested. Hence, the following nested statement is legal if aa
is a variable defined in anObject:
anObject.aa().sqrt()
The pseudo-identifier this can be used in ESDL to call a method at the current
component. If, for example, you want to call the private method
initCounter at the current object, you can use the following statement:
this.initCounter();
If the initCounter method has a return value, you can assign it as follows:
aValue = this.initCounter();
The reference to the current object using the this identifier is optional in both
these cases because it is implicit in the context. Hence, the above statements
can be written as follows:
initCounter;
aValue = initCounter();
Only if the current object is to be passed on as a parameter to another method,
is the reference using this needed.
OtherObject.evaluate(this);
Here, the identifier this passes on a reference to the current object.
Note
While ESDL accepts both the self and the this identifier, it is recom-
mended to use this to ensure compatibility with Java syntax.
In ESDL, both the methods and variables of a class can be declared as either
public or private to control access to these elements and hide their implemen-
tation from other objects.
Private methods can be called and private variables manipulated only from
within the current object. By contrast, public methods can be called and public
variables accessed from both within and outside the current object.
Methods are declared public or private by assigning them to a corresponding
diagram in the ESDL Editor. The default for new objects is to have a single
public diagram Main which contains the calc method.
Users can create additional public methods in the same diagram or add a new
diagram. Private methods must be created as part of a private diagram. The
access rights to a method can be changed by moving it from one diagram to
another.
Every public variable automatically adds two methods to the current object’s
interface, which are referred to as direct access methods. A direct access
method can be called to access the data in a public variable. It can be used for
both read and write access to that variable.
In the following example, suppose that the VisibleObject has two public
variables named free and all respectively. Method calls from outside can be
as follows:
sdisc tmp = VisibleObject.all();
VisibleObject.free(120);
Direct access methods are generated automatically and added to the public
interface of an object whenever a variable is declared public. These methods
do not have to be coded explicitly.
In ESDL, elements of an array can be read and written to using the following
syntax:
val = myArray[index];
myArray[index] = val;
The first statement reads the value of the array element at position index
and assigns it to the variable val, which must be the same type as the array.
Since the array index count starts from 0, myArray[3] returns the fourth
element of an array.
The second statement sets the value of the array element at position index
to val, which must be the same data type as the array.
Public Interface:
Tab. 5-3 summarizes the public methods available of arrays.
Characteristic lines and fields can be related to each other by using the same
set of sample points. In ASCET, such a shared set of sample point is modelled
as a distribution, tables that use the sample points in a distribution are referred
to as group tables.
A distribution is an array of sample points. The sequence must be strictly
monotone increasing. Distributions can be used for both types of tables (one-
and two-dimensional). Two-dimensional tables require a distribution for each
dimension.
Using distributions and group tables can significantly reduce the time and
memory required for computations since interpolation factors are computed
only once and can be reused over a set of tables.
Adding a group table in the ESDL Editor consists of first adding a distribution
and then a group table. When the group table is added, the system prompts
for the corresponding distribution. Since the ESDL Editor cannot be used to
reassign distributions to existing group tables, distributions should always be
created before adding the tables.
The Table Editor can be used to edit the data of both distributions and tables.
It does not accept distributions which violate strict monotony. Data can also be
filed in from tab-delimited ASCII files.
Public Interface:
Unlike plain tables, group tables do not have a getAt method. Instead, the
public interface is "split" between the distribution, which has a search
method, and the group table, which has an interpolate method.
A two-dimensional table requires sample points to be set for both distributions
before the corresponding value can be interpolated.
5.7 Structures
In ESDL, structures (or records) are modelled using classes. A class can be used
as a complex container element which holds any number of variables. If a vari-
ables in a class is public, it can be read and written to from ESDL using direct
access methods.
Classes that are used as container elements are accessed in the same manner
as other classes in ESDL. The first step is always to add the class to the Elements
list of the ESDL Editor to make it available in the context of the current class.
Variables can be declared public in the Layout Editor for the parent object.
The variables can then be accessed from within ESDL using the simple direct
access method syntax:
theVar = VisibleObject.aVar()
VisibleObject.aVar(5.12);
// read/write access to primitive variable
theVar = VisibleObject.anArray().getAt(2)
VisibleObject.anArray().setAt(2.14, 3);
// read/write access to array variables
For group tables and distributions, this procedure does not work.
Note
A complex assignment such as VisibleObject.anArray(myArray) is
not legal in ESDL, it does not assign the values in the myArray parameter to
the anArray element. Complex statements can, however, be used to pass
on a reference to another object.
5.8 Messages
In ASCET, an additional concept of messages as real-time language constructs
is used for interprocess communication. Messages, in this sense, are used as
protected global variables in the real-time environment.
Messages are available only in modules. From within a module, a message is
merely a variable that can be read, written to or both. Whenever a process
runs, the operating system creates copies of all its messages. These copies are
accessible only to that instance of the process that created them.
Hence, if the same message is used by various processes, each process gets its
own copy of the message. This strategy is used by the real-time operating sys-
tem to ensure data consistency over multiple processes.
Messages are fully supported in ESDL, they can be used in all modules. A mes-
sage is added like all other elements in the Elements list by selecting the corre-
sponding icon from the ESDL Editor toolbar. Messages can be added as
• send messages—the current module can write to this variable,
• receive messages—the current module can read this variable, or
• send and receive messages—the current module can read and write
to this variable.
In ESDL, messages are accessed through assignment statements:
theVar = receiveMsg + 1.24;
sendMsg = 12;
theMessage = 3 * tmpVar;
Public Interface:
Tab. 5-9 summarizes the public methods available for messages.
Method Operation
pi() returns 3.141592654
sin(x) sine of x
cos(x) cosine of x
tan(x) tangent of x
asin(x) sin-1(x) (arc sine)
-1
acos(x) cos (x) (arc cosine)
atan(x) tan-1(x) (arc tangent)
sinh(x) hyperbolic sine of x
cosh(x) hyperbolic cosine of x
tanh(x) hyperbolic tangent of x
sch(x) hyperbolic secant of x
csch(x) hyperbolic cosecant of x
coth(x) hyperbolic cotangent of x
exp(x) exponential function ex
log(x) natural logarithm loge(x), x > 0
log10(x) base 10 logarithm log10(x), x > 0
pow(x, y) xy
sqrt(x) square root of x
abs(x) absolute value |x|
sign(x) sign function returns: -1 if x < 0; 0 if x = 0; 1 if x > 0
limit(m, x, n) limiter returns: m if x <= m; x if m < x < n; n if x => n
max(x, y) returns the greater value of x and y
min(x, y) returns the smaller value of x and y
fmod(x, y) floating point remainder of x/y, same sign as x
ceil(x) returns smallest integer value not smaller than x
floor(x) returns largest integer value not larger than x
The transitions between states can be edited in the Transition Editor. Again,
conditions and actions can be specified in the text field in ESDL after the
<ESDL> option has been activated and all items in the elements list can be
accessed.
The following table presents an overview of the main differences between the
ESDL modelling language and the ANSI C programming language.
ESDL ANSI C
bit data type, shift operations o x
string data type, string operations o x
continue statement o x
pointer arithmetic o x
preprocessing o x
The following table presents an overview of the main differences between the
ESDL modelling language and the Java programming language.
ESDL Java
inheritance o x
dynamic instantiation o x
polymorphism o x
method overloading o x
explicit type casting o x
error handling o x
garbage collection o x
Argument Pin
Return Pin
Method Pin
Elements are represented as rectangular blocks with the arguments and return
values represented as pins. Each element has a name that is placed underneath
the block by default, but this position can be changed.
All basic types have a fixed interface and their graphical representation is also
fixed.
Messages are the input and output variables of processes. Depending on the
message type, they are displayed with one or two pins. The figure shows mes-
sages with the attributes Calibration and volatile; changing one or both
attributes makes the display change as shown for variables in Fig. 6-3.
Literals are represented by small blocks, with the value of the literal inside the
block:
An array or matrix has two methods, one for setting the content of a specific
element and one for retrieving it. The read and write operations can occur
independently of each other. The value to be written to the array is represented
by the left (argument) pin, the corresponding index by the bottom left pin. The
result of reading from the array is represented by the return pin and the index
by the bottom right argument pin.
Matrices are represented similarly, but each method takes two index argu-
ments. The x-index is represented by the bottom left pin, like the index of an
array. The y-index is represented by the pin at the top of the block with the top
left pin being the index for writing to the matrix, and the top right pin the
index when reading from it.
Fig. 6-4 Get and Set ports for arrays and matrices
The Get port provides a pointer to the entire data content of the respective
element; by the Set port directs the element to access a certain memory area.
An example: In Fig. 6-4, array reads from the memory area used by
arg_array, while matrix reads from the memory area used by
arg_matrix. The pointers to the respective memory areas are passed via the
Get and Set ports. It is important that writing to the Set port is performed as
the first step of the method; otherwise, inconsistencies arise.
Note
The same mechanism is used to pass classes, too.
A distribution has one argument pin for the sample value on the left side of the
distribution. A group table has one return pin on the right side. It contains no
own sample point distribution, but references one or two distributions instead.
Group tables and distributions do not have an extended interface.
Note
If you want to pass characteristic tables as method arguments, you have to
embed them in classes, and pass the class via the Get port.
Resources
Resources are represented by a block with the two methods reserve and
release at the top. Both methods have no arguments or return values and
are represented as method pins:
Implementation Casts
6.2 Expressions
Expressions are formed in block diagrams by connecting elements or other
expressions with operators. Like in ESDL, expressions are built up recursively, as
follows:
• An element is an expression.
• The result of an operator is an expression (the operands itself are
expressions).
a+b a + (b + c) a + (b + (c + d))
The meaning of the operators is the same as in ESDL. The following operators
are available: Addition, Subtraction, Multiplication, Division, Modulo. The
addition and multiplication operators can have between 2 and 10 arguments.
The subtraction and division operators have only two arguments.
6.2.2 Comparison Operators
The comparison operators are identical to their counterparts in the textual rep-
resentation with ESDL. The following comparison operators are available:
• Greater Than
• Less Than
• Less or Equal
• Greater or Equal
• Equal
• Not Equal
The Equal and Not Equal operators can also be applied to non-arithmetic ele-
ments.
6.2.3 Logical Operators
The meaning of the logical operators And, Or and Not is identical to their
meaning in ESDL. The And and Or operators can be applied to more than two
operands.
Multiplex Operator
The multiplex operator can also be used directly with several arguments (left
image); the right image shows the identical functionality built as a cascade of
several Mux operators:
The case operator is a special case of the conditional operator. It does not take
a logical value but a switch value of type unsigned discrete. The Case operator
selects one of the arguments depending on the switch value. If the switch
value is 1, the first argument is selected, if it is 2 the second is returned and so
on. If the switch value falls outside the range, the last argument is selected.
Besides the operators described so far, the following operators are also avail-
able:
• Max and Min
• Between
• Abs
• Negation
Max and Min Operators
The Max and Min operators return the maximum or minimum of the argu-
ments. Both operators can have 2 to 20 arguments; they can be applied only
to arithmetic elements.
The Between operator checks if the argument value lies between the limiters
min and max. If this is the case, the logical return value out_log is true,
otherwise it is set to false.
This operator returns the absolute value of the argument. Argument and
return value have to be both either cont or discrete.
Negation Operator
The Negation operator returns the negative value of the argument. Argument
and return value can be cont or discrete; if the argument is cont, the type
of the return value should be the same.
6.3 Statements
Graphical specifications of components can be hierarchically distributed over
several diagrams. In a diagram one or more methods or processes can be
described which can be executed independently of each other. The order in
which calculations are executed, as well as the particular method or process a
calculation belongs to is determined by sequence calls.
With the sequence numbers the order of the operations belonging to one
method or process can be determined by the user. A built-in sequencing algo-
rithm can be used to assign sequence numbers that correspond to the evalua-
tion order of standard block diagrams.
A sequence call generally consists of three fields:
• The name of the method called.
• The name of the method or process calling.
• The sequence number determining the position of the called method in
the calling method or process.
In the case of scalar elements, the name of the method called is left blank as
this is always the assignment of a new value.
There are three kinds of statements:
• Assignment statements
• Method calls
• Control Flow Statements, e.g. if…then…else, while
6.3.1 Assignment
The return from a method or process can also be established by the break
statement. This statement does not have to be the last of a method or process.
The only loop construct available in block diagrams is the While loop. Care
has to be taken to avoid infinite loops or loops unsuitable for real-time appli-
cations.
Similarly to the If…Then statement, the control flow is activated when the
value of the logical expression is True. The operation is executed as long as
the value of the logical input remains True. Therefore, the value of the logical
expression should be manipulated in the while loop. In order to avoid infinite
loops, the number of maximal loop iterations can be limited to a fixed, user
definable number.
Implementation Level
(Independent of Software
Architetcure)
Expansion
Implementation Level
Generated (Depending on Software
C-Code
C-Code Architetcure)
7.1 Structure
A component described with C code has the same structure as if it was
described with ESDL or as a block diagram. The C code describes the body of
methods or processes. Each code variant is stored separately.
The variables of a component are held in a data structure that, like the function
heads, is automatically generated. The user has no influence on this data struc-
ture. A part of this data structure consists of the instance variables of the com-
ponent, which can be used in any method. Therefore they have to be passed
to all generated functions. This data structure also depends on the code
expander and the exact naming is therefore hidden from the user.
In the above example, the component has a data structure of its own that is
passed to the generated function for the method calc. The data structure could
look like this:
struct QX040H28HJ8HAMDJ870S4G7MDIBQQLSM_Obj {
ASDObjectHeader objectHeader;
real64_Obj *a;
real64_Obj *b;
real64_Obj *c;
real64_Obj *d;
};
The element names must be valid ANSI C identifiers. In addition to the reserved
keywords of C, the names self and this are reserved.
Note
When specifying components in C code, the user must ensure that the
names of functions called in the method body do not collide with the names
of variables defined in the interface.of that same component.
Accessing Elements:
To allow easy access to the elements of the component, a macro is defined
automatically for each element. Each element can then be accessed simply by
its element name.
The public elements defined in other components can be accessed from within
C functions using the notation DefiningObject.PublicElement.
Access is restricted to basic elements, arrays and matrices. The public interface
of complex elements defined in other components, e.g. using the getAt,
setAt or search and intepolate methods as in ESDL, cannot be accessed
from C functions.
Note
Elements of type logical should not be used as numbers in the C code,
since this depends on the default implementation, which is subject to
change in further releases of ASCET.
} (1)
} (2)
Arguments:
Arguments of methods are mapped to function parameters in the parameter
list of the function generated for the method. These are also accessed by the
name of the argument.
Local variables:
Following the general C rules, function local variables can be declared in the
method body. Here only variables of a C data type can be declared, not how-
ever of an ASCET model type. In particular, no local variables of a user-defined
type can be used in components within body specifications in C.
real64 i;
for (i=0; i < 10; i++)
Besides the description of the methods in the form of C code, a header can be
defined for macros and for included files. This header has a local range
restricted to the component. Therefore, no extra header file is generated, but
the definitions are copied into the generated C code file.
Note
The data in an attached C file is shared between multiple instances of the
component, and not instantiated for each of the instances.
Note
When using include files the user must take care of the correct references
to these files on their own.
C-Code C-Code
Component Component
(Instance1) (Instance2)
Multiple
Instances
Single
Attached Instance
C-Source Code Include Files
or Object Code
Length of Arrays
basic block
y y
F + u y F
yd
- ydd
structure block
inputs: u; inputs: F;
outputs: y; outputs: y, yd, ydd;
states: x1, x2; states: xm, xd_m;
parameters: Td, Ti; parameters: c, d, reib;
variables: delta := 0.0; variables: Fr := 0.0;
state_equations: state_equations:
. . . . . . . . . .
1.
C should be used in imperative, exceptional cases only because ASCET provides
automatic verification functions (semantic checks, computing sequence) only for
ESDL.
CT Structure Block
CT structure block
CT basic block
CT basic block
CT structure block
CT structure
CT basic block CT basic block
block
CT Structure Block
Graphical Hierarchy
graphical
hierarchy
The real-time experiment is defined in a project. Both basic blocks and struc-
ture blocks can be used in a project. Furthermore, it is only in the project where
individual integration methods and their step size can be assigned to each inte-
grated basic block or structure block. This allows allocating more CPU time to
the model part with high dynamics than to other, less dynamic model parts, if
the processor capacity is limited.
Project
ECU simulation
dT=0.01 sec
Mathematical Formula
x(t+h)=x(t)+h*f(x,t)
Its stability range is high, however, at the trade-off of a higher discretion error
that, at the same step size, is typically higher than with the other methods
(lowest order).
Mulstep
The Mulstep integration method is a multi-step method which is used for mod-
els without heavily varying eigenvalues. The cycle time of one integration step
is only slightly higher than for the Euler method since only one function evalu-
ation is performed per integration step. However, the error order is 2.
Mathematical Formula
x(t+h)=x(t)+h(3/2*f(x,t)-1/2f(x,t-h))
Heun
The Heun integration method is used for models without heavily varying eigen-
values. The cycle time is twice as long as with the Euler method.
Mathematical Formula
Predictor: x(t+h)=x(t)+h*f(x,t) (Euler)
Corrector: x(t+h)=x(t)+h/2*(f(x,t)+f(x,t+h))
Mathematical Formula
Predictor: x(t+h)=x(t)+h/2(3f(x,t)-f(x,t-h)) (Adams-Bashforth)
Corrector: x(t+h)=x(t)+h/2(f(x,t)+f(x,t+h))
Runge-Kutta 4
The Runge-Kutta integration method is best suited for models without heavily
varying eigenvalues. This integration method is very robust for this type of
model. It is the slowest, but also the most accurate method at comparable step
sizes. It is therefore possible to increase the step size considerably.
Mathematical Formula
x(t+h)=x(t)+h/6(K1+2K2+2K3+K4)
where
K1 = f(x,t)
K2 = f(x + K1*h/2, t + h/2)
K3 = f(x + K2*h/2, t + h/2)
K4 = f(x + K3*h, t + h)
For experiments that need very precise calculation, the step width usually has
to be reduced. This can increase the time used for calculation significantly.
Models employing stiff differential equations often render the calculation
using fixed-step integration methods infeasible. Adaptive integration methods
are controlled by a target error margin. The step width is only reduced for
those parts of the model where it is needed. Because the step width (and
therefore the time needed for calculation) varies, these integration methods
are not real-time capable.
If the desired precision cannot be reached due to the parameter settings, the
experiment issues a warning in the ASCET monitor window. This happens
when the maximum iteration depth is set too low or the minimal step width is
set too high.
9.1 Basics
Continuous time basic blocks are specified either in C code editor or in the
ESDL editor. The two editors are slightly different for the specification of CT
blocks. The internals of the blocks, i.e., the differential and algebraic equations
as well as the control structures, are described within pre-defined methods.
The proper computing sequence required for correct, continuous time model-
ing is derived automatically (sequencing). The pre-defined method structure
cannot be modified by the user.
Basic blocks are used to describe models by means of nonlinear ordinary first-
order differential equations (ODE) and nonlinear output equations. To describe
a system of higher order, it has to be converted into several differential equa-
tions of first order. The table below illustrates the transformation of a second-
order system into its representation in the state space.
Data Methods
Input Init()
Output Terminate()
Derivatives()
Parameter
Update()
Continuous State
DirectOutputs()
Discrete State NondirectOutputs()
Steplocal Variable StateEvents()
Constant DependentParameters()
Events()
Dependent Parameter
Within a continuous time basic block, the internals of the system to be mod-
eled can be described using the ESDL model description language or directly in
C. The target-independent ESDL modeling language provides advanced
semantic verification ensuring a correct model. Modeling directly in C, there-
fore, should be confined to target-dependent real-time blocks only. In general,
the use of ESDL is recommended.
combinations
dimension scope data type
global
scalar
record
udisc
array
sdisc
logic
local
elements
cont
input x x x x x x x x
output x x x x x x x x
discrete state x x x x x x x
continuous state x x x x
steplocal variable x x x x x x x
parameter x x x x x x x x
dependent parameter x x x x x x x
constant x x x x x x x x
The communication interval is not part of the model but is chosen only at run-
time of the simulation. The following communication occurs during the dT
cycle:
• communication between CT blocks and the experiment environment,
e.g., stimulation and visualization
• communication between CT blocks and controller modules within a
hybrid project
• communication between several CT (structure) blocks within a hybrid
project if several integration methods are used
• calling the update() method
Integration Step Size h
The integration step size is not part of the model but chosen only at run-time
of the simulation. During the h cycle, communication takes place between sev-
eral continuous time blocks within a continuous time structural block. After
t h e i n t e g r a t i o n s t e p h a s b e e n ex e c u t ed a c ro s s al l b l o c k s , t h e
stateEvents() method is executed.
Each value transferred is numerically acknowledged and depends on the
selected integration method. When simulating a highly dynamic model for
which h has to be very small, the speed can be considerably increased by
selecting a much higher value for dT than for h.
Step Size Depending on the Internal Integration Method: h/n
Other than the h cycle, the h/n cycle depends on the selected integration
method; e.g., the Euler integration method uses the cycle time h/l while the
Heun integration method uses h/2.
During the h/n cycle, the intermediate steps of the integration are calculated.
As for the h cycle, communication takes place between the continuous time
blocks of a continuous time structure block. The intermediate steps of the inte-
gration cannot be communicated to the outside.
Numerically, no discontinuities can be handled during this cycle since the
stateEvents() method is not called during this cycle.
There is the following relationship between the different step sizes:
dT >= h >= h/n
nondirectOutputs
Computing Sequence
Reading Inputs
directOutputs
derivatives
stateEvents
update
events
dependentParam.
t
t0 t0 + h/n t0 + h t 0 + dT
Asynchronous
Event (Interrupt)
Start
Tr = 0; i = 1
Init
NondirectOutputs
Read Inputs
h /n Cycle
i = 1; Tr = 0
DirectOutputs
i = i+1
i=1
h Cycle
Derivatives
No
dT Cycle
i=n
DependentParameters
Yes
Asynchronous
StateEvents Event
Processing
Events
Tr = Tr+h
No
Tr = dT
Yes
Update
No
Stop
Yes
In ESDL, each continuous state variable supports the derivation operator ddt.
Differential equations can be described with the ddt operator.
Semantic checks can be performed when using ESDL within a continuous time
method. The verification items ensure that the model matches the fundamen-
tal continuous time simulation framework. For example, it is not permitted to
change the value of a state variable directly (instead, the resetContinu-
ousState() function has to be used to internally reset the integration
algorithm). Fig. 9-5 provides an overview of the access rights to those ele-
ments. The semantic check traps any violation of these rights.
local variable
ddt-operator
element
parameter
constant
output
input
method
init r- rw rw r- -- rw rw r- r- r-
derivatives r- -- r- r- rw rw rw r- r- r-
update r- -- rw -- -- rw rw r- r- r-
directOutputs r- -w r- r- -- rw rw r- r- r-
nondirectOutputs r- -w r- r- -- rw rw r- r- r-
terminate r- -w rw r- -- rw rw r- r- r-
events r- -w rw r- -- rw rw r- r- r-
dependentParameters -- -- -- -- -- -- rw r- rw r-
r = read
stateEvents r- -- rw r- -- rw rw r- r- r-
w = write
For advanced continuous time modeling with ESDL, the system library provides
a number of additional library functions:
• getTime()
• getdT()
• getIntegrationStepsize()
• resetContinuousState()
• resetCTSolver()
The following describes the use of each library function in detail. Access to
these functions in each method is shown in Fig. 9-6.
getdT
getIntegrationStepsize
resetContinuousState
resetCTSolver
additional library
functions
method
init + + + + +
derivatives + + + - - + available
directOutputs + + + - -
nondirectOutputs + + + - -
terminate + + + - -
events + + + - -
dependentParameters + + + - -
stateEvents + + + + +
9.7 Modeling in C
Modeling in C offers the capabilities of the C language but no semantic
checks. Continuous time basic blocks specified in C may be hardware-depen-
dent. If programming is done in ANSI-C, it is possible to create hardware-inde-
pendent models even in C. This is necessary if pointers or C subroutines are to
be used. C basic blocks can be used to model hardware-dependent blocks and
in the same way as ESDL basic blocks. C basic blocks require an explicit speci-
fication whether they have a direct pass-through (output depends directly from
the input) or an indirect pass-through by selecting direct or nondirect in
the "Block Behavior" combo box. This affects the automatic determination of
the execution sequence.
Note
When modeling in C, there are no semantic checks ensuring consistent mod-
eling (as in ESDL). Consistency has to be ensured by the user.
It is recommended to use C for modeling continuous time systems only if
absolutely necessary, e.g., for modeling controller-dependent system por-
tions or if C pointers or C subroutines have to be used.
Additional C routines are available for modeling in C. For generic use of these
routines, the internal data structure of the current block must be specified in
the routine's interface. The CTBlock and self methods are visible in each
method.
The following routines are provided:
• getTime
• getdT
• getIntegrationStepsize
• resetCTSolver
• sizeU
• sizeY
• sizeV
• sizeX
• sizeXK
The get and reset routines provide additional ESDL library routines; the
size routine allows a generic model design if the number or array size of
instance variables has to be changed.
The following describes the use of the additional C routines in more detail.
There are no semantic checks and usage restrictions provided with these rou-
tines. It is the user's responsibility to ensure they are used correctly.
real64 getTime(CTSimExperiment *):
The getTime function returns the current simulation time:
t = getTime (CTBlock);
real64 getdT ():
The getdT function returns the current interval for external communication:
step = getdT ();
global
scalar
array
udisc
sdisc
logic
local
cont
elements
input x x x x x x x x
output x x x x x x x x
global parameter x x x x x x x
constant x x x x x x x x
10.4 Operators
According to the systems theory, only linear operators are required for the
description of structure blocks. Nonlinear elements are encapsulated in basic
blocks. Therefore, only addition and subtraction operators are provided.
out_direct
out_direct = K * in;
in
x' = ((K*in - x)/T;
out_nondirect = x;
out_nondirect
P PT1
nondirectOutput nondirectOutput
in - out
directOutput directOutput
P P
nondirectOutput nondirectOutput
in - out
directOutput directOutput
CT basic CT basic
block block
CT basic CT basic
block block
CT basic CT basic
block block
Fig. 10-6 shows the computing sequence in a small CT structure block with
coupled CT basic blocks. readInputs is not a method in its own right but
belongs to directOutputs; it is shown to emphasize that current values
have to be read first in order to compute the directOutputs method. The
computing sequence is determined by the automatic sequencing algorithm.
The numbers indicate the order of processing. Identical numbers mean that
the execution sequence is arbitrary.
Project
ECU simulation
dT=0.01 sec
Fig. 11-1 Project with two continuous time blocks and one discrete block
A hybrid project (e.g., for the ECU test automation) combines a controller
model (Standard ASCET block) with a control system model (continuous CT
structure blocks). The continuous time model part is itself composed of two CT
structure blocks with different integration methods and different step sizes.
The communication between the CT blocks takes place at 2 msec intervals
while the CT blocks communicate with the discrete standard block every 10
msec.
A C E G B J
CT CT
module
B D block H F block H
C B
module
L M
controller_2
12.1.1 and
On activation of method
and: The result of the binary AND conjunction of
bitArray1 and bitArray2 is returned.
12.1.2 clearBit
clearBit resets the bit at the specified position of the argument. The posi-
tion of the LSB1 is 0.
On activation of method
clearBit: The argument bitArray is returned with a zero-
bit at position position.
1.
Least Significant Bit
getBit returns the value of the bit at the specified position of the argument
as a logical value.
On activation of method
getBit: TRUE is returned, if the bit at position position
is equal to 1, otherwise FALSE is returned.
12.1.4 or
On activation of method
or: The result of the binary OR conjunction of
bitArray1 and bitArray2 is returned.
rotate rotates the bits of the argument to the left by a specified number of
positions.
On activation of method
rotate: The result of the left-rotation of bitArray by k
positions is returned.
12.1.6 setBit
setBit sets the bit at the specified position of the argument. The position of
the LSB is 0.
On activation of method
setBit: The argument bitArray is returned with a one-
bit at position position.
shiftLeft shifts all bits of the argument to the left. The right bits are filled
with zeros.
On activation of method
shiftLeft: The result of the left-shift by k positions is returned.
For k=1 the result corresponds to the multiplication
by two.
12.1.8 shiftRight
shiftRight shifts all bits of the argument to the right. The left bits are filled
with zeros.
On activation of method
shiftRight: The result of the right-shift by k positions is
returned.
On activation of method
toggleBit: The argument bitArray is returned with the bit
at position k toggled.
12.1.10 writeBit
writeBit writes the value of the logical argument to the specified position
of the unsigned discrete argument.
On activation of method
writeBit For aBool = FALSE the argument is returned
with a zero-bit at position position , for aBool
= TRUE the argument is returned with a one-bit at
position position.
writeByte writes the values of eight logical inputs to the eight least signifi-
cant bits of the argument.
On activation of method
writeByte: The argument is returned with the values of b0 to
b7 written to the bit positions 0 to 7. 0 is the posi-
tion of the LSB and the logical values TRUE and
FALSE are mapped to 1 and 0 respectively.
12.1.12 xor
On activation of method
xor: The result of the binary exclusive OR conjunction of
bitArray1 and bitArray2 is returned.
12.2.1 ClosedInterval.
On activation of method
out: TRUE is returned, if A <= x <= B. Other-
wise FALSE is returned.
12.2.2 LeftOpenInterval.
On activation of method
out: TRUE is returned, if A < x <= B. Otherwise
FALSE is returned.
On activation of method
out: TRUE is returned, if A < x < B. Otherwise
FALSE is returned.
12.2.4 RightOpenInterval.
On activation of method
out: TRUE is returned, if A <= x < B. Otherwise
FALSE is returned.
On activation of method
out: TRUE is returned, if x > 0.0. Otherwise
FALSE is returned.
12.3.1 CountDown.
CountDown decrements the counter and signals when the counter has
reached zero.
On activation of method
start: The counter is set to the start value.
compute: The counter is decremented by one.
out: TRUE is returned if the counter is greater than
zero. Otherwise, FALSE is returned.
On activation of method
start: The counter is set to the start value.
compute: If enable is TRUE, the counter is decrement by
one.
out: TRUE is returned if the counter is greater zero.
Otherwise, FALSE is returned.
12.3.3 Counter.
On activation of method
reset: The counter is set to zero.
compute: The counter is increment by one.
out: The counter value is returned.
On activation of method
reset: If initEnable is TRUE, the counter is set to
zero.
compute: If enable is TRUE, the counter is incre-
mented by one.
out: The counter value is returned.
12.3.5 StopWatch.
On activation of method
reset: The time counter is set to zero.
compute: The time counter is increment by dT.
out: The time counter value, i.e. the time elapsed
since the last start, is returned.
On activation of method
reset: If initEnable is TRUE, the time internal
counter is set to zero.
compute: If enable is TRUE, the time counter is incre-
ment by dT.
out: The time counter value, i.e. the time elapsed
since the last start and while enabled was
TRUE is returned.
12.3.7 Timer.
Timer decrements the time counter by dT and signals when the time counter
has reached zero. It is not retriggerable.
On activation of method
start: The time counter is set to startTime if the
time counter value was previously less than or
equal to zero.
compute: The time counter is decremented by dT.
On activation of method
compute: If enable is TRUE, in has a rising edge and
the time counter value is less or equal to zero,
the timer is started,i.e. its counter value is set to
the start time. Otherwise, the time counter is
decremented by dT. If enable is FALSE,
nothing happens.
out: TRUE is returned, if the time counter is greater
than zero.Otherwise, FALSE is returned.
12.3.9 TimerRetrigger.
On activation of method
On activation of method
compute: If enable is TRUE and in has a rising edge,
the timer is started, i.e. its counter value is set
to the start value. Otherwise, the time counter
is decremented by dT (the time frame). If
enable is FALSE, nothing happens.
out: TRUE is returned, if the time counter value is
greater than zero. Otherwise, FALSE is
returned.
12.4 Delay
12.4.1 DelaySignal.
On activation of method
reset: If initEnable is TRUE, initValue is
buffered.
compute: If enable is TRUE, the input signal is buff-
ered.
out: The buffered signal is returned, thus the input
signal is delayed by one step.
12.4.3 DelayValue.
On activation of method
reset: If initEnable is TRUE, initValue is
buffered.
compute: If enable is TRUE, the input value is buff-
ered.
out: The buffered value is returned, thus the input
value is delayed by one step.
12.4.5 TurnOffDelay.
TurnOffDelay delays a falling edge of the input signal. The duration of the
delay can be modified at runtime via the Time variable.
On activation of method
compute: A falling edge of the input signal is delayed. If
the signal flips from TRUE to FALSE, a timer
is started. On being FALSE the timer is incre-
mented by dT and is compared to
delayTime. If the input signal is TRUE, the
timer is reset.
out: TRUE is returned if the input signal is TRUE or
the timer has not exceeded delayTime.
Otherwise, FALSE is returned.
On activation of method
compute: A rising edge of the input signal is delayed. If
the signal flips from FALSE to TRUE, a timer
is started. On being TRUE the timer is incre-
mented by dT and is compared to
delayTime. If the input signal is FALSE,
the timer is reset.
out: FALSE is returned if the input signal is
FALSE, or the timer has not exceeded
delayTime. Otherwise, TRUE is returned.
12.4.8 TurnOnDelayVariable.
On activation of method
compute: A rising edge of the input signal is delayed. If
the signal flips from FALSE to TRUE, a timer
is started. On being TRUE the timer is incre-
12.5 Memory
12.5.1 Accumulator.
On activation of method
reset: The accumulator value is set to initValue.
compute: The accumulator is incremented by the input
value, i.e.accumulator (new) =
accumulator (old) + input
value.
out: The accumulator value is returned.
On activation of method
reset: If initEnable is TRUE, the accumulator
value is set to initValue.
compute: If enable is TRUE, the accumulator is incre-
mented by the input value, i.e.
accumulator(new) =
accumulator(old) + input value.
Additionally, the accumulator value is limited by
mn and mx.
out: The accumulator value is returned.
On activation of method
reset: The accumulator value is set to initValue.
compute: The accumulator is incremented by the input
value, i.e. accumulator(new) =
accumulator(old) + input value.
Additionally, the accumulator value is limited by
mn and mx.
out: The accumulator value is returned.
12.5.4 RSFlipFlop.
RSFlipFlop is a flip flop with a reset and a set input, where the reset input
dominates the set input.
12.6 Miscellaneous
12.6.1 DeltaOneStep.
DeltaOneStep returns the difference of the current input value and the last
input value.
On activation of method
compute: The previous input value is subtracted from the
input value.
out: The difference is returned.
12.6.2 DifferenceQuotient.
On activation of method
compute: The difference quotient (value - previ-
ous value)/dT is computed.
out: The difference quotient is returned.
On activation of method
compute: The input signal is compared to the previous
input signal.
out: TRUE is returned, if the input signal and the
previous input signal differ. Otherwise, FALSE
is returned.
12.6.4 EdgeFalling.
On activation of method
compute: The input signal is compared to the previous
input signal.
out: TRUE is returned, if the input signal is low and
the previous input signal was high. Otherwise,
FALSE is returned.
On activation of method
compute: The input signal is compared to the previous
input signal.
out: TRUE is returned, if the input signal is high and
the previous input signal was low. Otherwise,
FALSE is returned.
12.6.6 Mux1of4.
On activation of method
out: The input value si (index i) is returned
with i = b0 + 2*b1, interpreting FALSE
as 0 and TRUE as 1.
On activation of method
out: The input value si(index i) is returned
with i = b0 + 2*b1+ 4*b2, interpreting
FALSE as 0 and TRUE as 1.
12.7 Nonlinears
12.7.1 Hysteresis-Delta-RSP.
On activation of method
out: TRUE is returned, if x > (lsp + delta).
FALSE is returned, if x < lsp. The return
value is unchanged, if x lies within the open
interval ]lsp, (lsp + delta)[.
12.7.3 Hysteresis-LSP-RSP.
On activation of method
out: TRUE is returned, if x > rsp. FALSE is
returned, if x < lsp. The return value is
unchanged, if x lies within the open interval
]lsp, rsp[.
On activation of method
out: TRUE is returned, if x > (msp +
deltahalf). FALSE is returned, if x <
(msp - deltahalf). The return value is
unchanged, if input x is in the open interval
](msp - deltahalf), (msp +
deltahalf)[.
12.7.5 Limiter.
On activation of method
out: The input x is limited by mn and mx and is
returned, i.e max( min(x, mx), mn).
There is no check if mn <= mx.
On activation of method
out: 1.0 is returned if x > 0.0, 0.0 is returned
if x = 0.0, and -1.0 is returned if x < 0.0.
12.8.1 Control
dT1.
On activation of method
compute: The differentiation value is computed via a P-
function and an I-function which is backcou-
pled.
out: The differentiation value is returned.
On activation of method
out: The return value out = in * K is computed.
PI.
On activation of method
reset: The integrator value is set to initValue.
compute: The value of the PI-function is computed as the
sum of a P-function and an I-function.
out: The value of the PI-function is returned.
PID is a time discrete proportional integrator with differential part with time
constants Tv and Tn and gain constant K.
On activation of method
reset: The integrator value is set to initValue.
compute: The value of the PID-function is computed as a
sum of a P-function, a D-function and an I-
function.
out: The value of the PID-function is returned.
On activation of method
reset: The integrator value is set to initValue.
compute: The value of the PID-function is computed as a
sum of a P-function, a D-function and an I-
function, where the integrator value of the I-
function is limited by mn and mx.
out: The value of the PID-function is returned.
On activation of method
reset: The integrator value is set to initValue.
compute: The value of the PI-function is computed as the
sum of a P-function and an I-function, where
the integrator value of the I-function is limited
by mn and mx.
out: The value of the PI-function is returned.
PT1.
PT1 is a time discrete low pass with time constant T and gain constant K.
PT2 is a time discrete delay function with time constant T, gain constant K,
and damping d.
On activation of method
reset: The two integrator values are set to
initValue.
compute: The value of the PT2-function is computed via
two I-functions in row, which are backcoupled
by a cascade of two P-functions.
out: the value of the PT2-function is returned.
IntegratorK.
On activation of method
reset: The integrator value is set to initValue.
compute: The integrator value is computed via inte-
grator (new) = integrator (old) +
in * dT* K.
out: The integrator value is returned.
IntegratorKEnabled.
On activation of method
reset: The integrator value is set to initValue.
compute: The integrator value is computed via inte-
grator (new) = integrator (old) +
in * dT * K (limited by mn and mx).
out: The integrator value is returned.
On activation of method
reset: The integrator value is set to initValue.
compute: The integrator value is computed via
integrator(new) = integrator(old)
+ in * dT / T.
out: The integrator value is returned.
IntegratorTEnabled.
On activation of method
reset: The integrator value is set to initValue.
compute: The integrator value is computed via
integrator(new) = integrator(old)
+ in * dT / T (limited by mn and mx).
out: The integrator value is returned.
DigitalLowpass.
On activation of method
reset: The mean value is set to initValue.
compute: The mean value is computed via mean value
(new) = mean value (old) + m *(in
-mean value (old) ).
out: The mean value is returned.
LowpassK.
On activation of method
reset: If initEnable is TRUE, the lowpass value is
set to initValue.
compute: If enable is TRUE, the lowpass is computed
via lowpass (new) = lowpass (old)+
(in - lowpass (old) ) * dT* K.
out: The lowpass value is returned.
On activation of method
reset: The lowpass value is set to initValue.
compute: The lowpass is computed via lowpass (new)
= lowpass (old)+ (in - lowpass
(old) ) * dT/ T.
out: The lowpass value is returned.
LowpassTEnabled.
Troubleshooting 257
Unpredictable effects when using complex assignments: U n p r e d i c t -
able effects with the measuring of complex elements occur when complex
assignments are executed in the model. A complex assignment is represented
by an assignment of the respective pointers of the complex elements, that is,
both objects are identical afterwards and one object is ’lost’. E.g. in the assign-
ment A=B, the element A becomes the element B. The measurement and cal-
ibration system however still refers to both as separate objects. You can
measure and calibrate the ’lost’ object (here object A) but this has no effect
and does not take into account the object that represents the complex element
after the assignments (i.e. object B).
The fonts are not displayed properly: The Arial font family is not dis-
played properly under Win97/WinNT, so that some entries are hardly visible.
Use the Microsoft SansSerif Font of size 10 instead. With this font, there are no
display problems.
Problems with the external experimental targets: A potential source of
errors when using the Centronics link cable is that the speed of the parallel
port may be too fast for the Centronics link cable (esp. when using a Pentium
200 or higher). Here it is advisable to reconfigure the parallel port in the setup
of the computer BIOS.
Busy ASCET: While ASCET is busy (e.g. generating code, committing to the
database), do not try to invoke other functions in ASCET, but wait until the
current action of ASCET is finished. Otherwise, the system behavior of ASCET
may lead to unexpected errors (e.g. system errors).
258 Troubleshooting
The compilation returns unexplainable error messages or does not
end: If you click into another window during compilation the priority for the
DOS-box where the compilation takes place is decreased dramatically, so that
the compilation comes to an almost complete stop. in that case you can acti-
vate the DOS-box by double clicking on its icon.
Additionally you should avoid the following keywords, which are used by the
error management system to trace back compiler errors to the ASCET model:
Error, ERROR, Serious, Fatal, illegal, Failed, failed, warning, known format.
ASCET does not compute correctly when using temporary variables:
Automatic temporary variables can be used when the result of an expression is
to be used in several different branches. These temporary variables are only
computed once (upon evaluation of the first branch). When the branches
using the temporary variable are only computed conditionally (e.g. as they are
input to a switch or a MUX operator), the value of that temporary variable may
not be computed correctly. Therefore automatic temporary variables should
not be used, if the branches leading from a temporary variable are fed into a
conditional operator.
L1-Communication Errors often occur during online experiments: I n
this case the priority of the communication process is too low. The priority of
this process can be raised for the target in the file es1130cp.inv,
es1130cp_gnu.inv or es1135cp_gnu.inv in the respective target
directory. The file you have to edit depends on your target/compiler combina-
tion.
This file is used in the configuration of the compiler. Here you can modify the
priority of the communication process by setting the parameter __L1_Prio
= to the desired priority (by default it has the lowest priority, i.e. 0).
The documentation generation in .rtf format does not work prop-
erly. When displaying .rtf files, Word for Windows may not display the
integrated bitmap image files. You may have to update all links to (external)
*.gif files to view the images.
Troubleshooting 259
260 Troubleshooting
14 Code Generation Messages
This chapter contains the warnings and error messages that may appear during
ASCET code generation, together with hints and explanations on how to cor-
rect the mistakes that led to the error. Error messages point to serious faults in
the specification that lead to the code generation process to be terminated.
Warnings point to less serious faults. The code generation process may be suc-
cessful, but the resulting code may not work as desired.
14.1 Components
14.2 Projects
269
accessing objects external ~ 169
direct access methods 127 function parameters 163
library functions 136 header 169
this 126 local variables 166
acos() 137 message 165
Action 45 method 162
see also state machine process 162
Adams-Moulton 181 specification 161
AND 151 variables 163
see logical operators C programming language
application mode 19 see programming languages
argument 113, 166 case operator 153
arithmetic operator 117, 151 ceil() 137
arrays 91, 127, 146 characteristic line 92
access in ESDL 128 see also one-dimensional table
Get/Set Port 147 characteristic map 92
maximum size of ~ 128 see also two-dimensional table
public interface 128 characteristic table 92, 148
Table Editor 128 class 24
asin() 137 hierarchical structure 31
assignment 114 interface 27
shorthand assignment operator 118 state machine 83
atan() 137 vs. module 24
atomic sequences 141 comment 116
auto-inlining 73 ~ in generated code 117
communication
B between processes 20
basic language elements 112 message 20
comparison operator 151
basic types 89
complex element 100
Between operator 154
between() 116 component 23
definition 25
block diagram
instantiation 25
~ vs. ESDL 141
access ~ in ESDL 138 interface 27
reusing 29
semantics 159
specification 23
block statements 114
branching composite data types 127–134
array 127
see control flow
data structures 134
break 155
break 122, 124 distributions 133
group tables 133
matrix 129
C one-dimensional table 129
C code two-dimensional tables 131
access macros 170 compound statements 114
argument 166 Condition 45
charachteristic lines/maps 167 conditional construction
direct access methods 171 see control flow
270
conditional operator 118, 152 data types
constant 96, 116 array 127, 146
system ~ 97 basic ~ 115–116
cont 115 composite ~ 127–134
Continuous Time block continuous 115
see CT block conversion 115
Continuous time models data structures 134
structure 173 distributions 133
control flow 32, 120–124 group tables 133
break 122, 124 logical 115
for 123 matrix 129, 146
if…else 120 messages 135
return 125 one-dimensional table 129
switch…case…default 121 signed discrete 115
while 123 strings 112
conventions two-dimensional tables 131
method names 112 unsigned discrete 115
variable names 114 diagram
conversion item 143
of data types 115 line 143
cooperative scheduling 15 pin 143
cos() 137 diagram item 143
cosh() 137 differential equation 177
coth() 137 in C 195
csh() 137 direct access methods
CT basic block 174, 183–198 C code 171
interfaces 185 ESDL 127
methods 186 distributions 133
CT block 173–181 assigning to group tables 133
computing sequence 187 monotone sequencing in ~ 133
direct output 201 dT parameter 95
input 174 dynamic instantiation 112
modeling in C 195
nondirect output 201 E
output 174
editor
parameter 174
ESDL ~ 113
predefined tasks 211 element 89
state 174
basic 144
structure 199
graphical representation 143, 145
CT structure block 174, 199–207 scalar 145
scope 99, 145
D Entry action 47
data 101 entry action
transformation 109 in state machines 139
data set 101 enumeration 96
data structures equality operator 117
modelling ~ in ESDL 134 ERCOSEK 14, 20, 21
271
ESDL History
access block diagram 138 state machine 44, 57
basic elements 112 hybrid project 173
description 111
direct access methods 127 I
feature list 111
if...then statement 156
general features 111 if...then...else operator 157
implementation cast 119
if…else 120
instantiation 112
If…Then 156
Java syntax in ~ 111 If…Then…Else 157
syntax 114
implementation 103
ESDL editor 113
code generation 108
Euler 180 composite types 105
exit action 48
implementation cast 106
in state machines 139
scalar types 103
exp() 137 transformation 109
expression 114
user defined types 105
external event 15
implementation cast 97, 106–108, 149
external source code 169 ESDL 119
inheritance 112
F instantiation 25
floor() 137 integration method
fmod() 137 Adams-Moulton 181
for 123 Euler 180
fixed step size 178
G Heun 180
Get/Set ports 147 Mulstep 180
Runge-Kutta 181
getAt()
variable step size 178
array elements 128
matrix elements 129 Integration step size 188
interface
table elements 130
of a class 27
two-dimensional table elements 132
graphical representation of a component 27
of a module 29
element 145
Interface Editor 113
expression 145
operators 151 interpolate() 130, 132, 134
interpolation
statement 154
linear 130
group tables 133
assigning distributions 133 rounded 130
interpolation mode
public interface 133
~ of tables 130
linear 130, 132
H interprocess communication 20
Heun 180
hierarchy 41
of classes 31
J
Java programming language
of modules 31
of state machines 57 see programming languages
272
Junction 38 naming conventions 112
state machine 51 nesting method calls 124
overloading 113
K precedence of method calls 117
primitive methods 116
keywords
private 126
reserved ~ in ESDL 114
kind 96 public 126
return value 113, 124
Min operator 153
L min() 116, 137
length() 128 model type
library functions continuous 90
accessing ~ 136 logical 90
limit() 137 signed discrete 90
linear interpolation 130, 132 unsigned discrete 90
Literal 146 module 19, 24
literal 96, 116 hierarchical structure 31
local variable interface 29
C code 166 vs. class 24
log 115 Mulstep 180
log() 137 multi-tasking 15
log10() 137 Mutiplex operator 152
logical operator 117, 151 MUX 118, 152
loops see conditional operator
see control flow
N
M Negation operator 154
mathematical functions non-preemptable scheduling 17
accesing library functions 136 Not 151
primitive methods 116
MathFcn 136
matrix 92, 129, 146
O
access in ESDL 129 object
access control 126
Get/Set Port 147
object reference
maximum size of ~ 129
public interface 129 this in method calls 126
object-oriented concepts 112
Max operator 153
Of state machines 41
max() 116, 137
message 20, 94, 165 one-dimensional table 92, 129
C code interpolation 167
~ in processes 135
interpolation mode 130
accessing ~ in ESDL 135
methods linear interpolation 130
maximum size 130
arguments 113
public interface 130
editing method bodies 112
header 112 operating system
real time ~ 13
interface 112
method calls 124
273
operator 117–118 project 13
Abs 154 hybrid 209
arithmetic 151 module 20
arithmetic ~ 117 process 20
associativity of ~ 118 public
Between 154 see accessing objects
case 153
comparison 151 R
comparison and equality ~ 117
real time operating system 13
conditional ~ 118, 152 real-time
logical 117, 151
dT parameter 95
Max 153
language construct 94
Min 153 message 94
Multiplex 152
resource 95
Negation 154
records
order of evaluation 150 see data structures
precedence levels 118
relational operator 117
shorthand assignment ~ 118
reserved keywords 114
unary ~ 117 resource 95, 149
OR 151
return 125
see logical operators
return value 113, 124
overloading 113 reusing components 29
rounded interpolation 130
P Runge-Kutta 181
parameter 96
dependent ~ 99 S
see also arguments sch() 137
virtual ~ 99
scheduling 15
pi() 137
cooperative 15
PMI 170 non-preemptible 17
pointers 111
pre-emptive 16
pow() 137
scope 99
precedence sdisc 115
~ of operators 117–118
search() 130, 132, 134
pre-emptive scheduling 16
self
priority see this
task 16
Semantics
private
hierarchical state machine 57
see accessing objects simple state machines 48
process 15, 19
state machine with junction 51
using messages 135
state machines 47–71
see also methods 112 sequence call 155
programming languages
sequence number 155
C 161
sequences
C vs. ESDL 111, 141 atomic ~ 141
Java vs. ESDL 112, 142
sequencing 159
Programming Model Interface 170
274
setAt() static action 47
array elements 128 in state machines 139
matrix elements 129 strings 112
shift operators 111 Switch 157
shorthand assignment operator 118 switch…case…default 121
sign() 137 fall through 122
sin() 137 syntax
sinh() 137 ESDL 114
software event 15 method calls 124
specification system constant 97
component 23 System Library
in C code 161 Bit Operators 215
sqrt() 137 Comparators 221
Start state 43 Control 242
State 34 Counter 223
entry action 47 Delay 228
exit action 48 Integrators 248
static action 47 Lowpass 252
State diagram 33 Memory 233
State editor 140 Miscellaneous 236
State machine 32–87 Nonlinears 239
action 45 Timer 223
class 83
condition 45 T
ESDL in ~ 139 table 129–134
function 47
group ~ 133
hierarchy 41, 57
interpolation mode 130
history 44, 57 linear interpolation 130, 132
inlining 73
one-dimensional 129
junction 38, 51
two-dimensional 131
optimize (actions) 75, 76 Table Editor 128
optimize (conditions) 75, 76
tan() 137
optimize (hierarchical code genera-
tanh() 137
tion) 81 task 15, 17
optimize (junctions) 76
priority 16
optimize (static action of hierarchy
this 126
state) 77 timer 15
optimized for code size 76
transformation 109
optimized for response time 74
Transition 33, 35
optimized for runtime 75 action 48
outlining 73
in state machines 140
semantics 47–71
priority 35
start state 43 Transition action 48
transition 33, 35
Transition editor 140
trigger 41
Trigger 41
statements 114
block statements 114
275
two-dimensional table 92
C code interpolation 167
linear interpolation 132
maximum size 131
public interface 132
see also table
type
basic 89, 90
composite 91
scalar 90
user defined 89, 100
type casting
see conversion
U
udisc 115
unary operators 117
V
variable
local 166
variables 96
declaration of ~ 115
direct access methods 127
naming conventions 114
public and private ~ 126
reserved keywords 114
temporary ~ 98
virtual ~ 99
W
while 123
While loop 158
X
xLength() 129
Y
yLength() 129
276