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ELEC4601: self-assessment practice (no submission is required)
Q1. Consider block diagram of a sensor/measurement system as below. Characteristic diagrams of two thermal sensors (MPC9700 and MPC9701) are depicted.
Embedded System (Microcontroller)
This system is used to monitor temperature of a 1000-liter water tank for an industrial process control. Our microcontroller has a 5V power supply and two 10-bit ADCs with maximum sampling rate of 50 kHz. a) If we use an amplifier with A=3, what would be the measurement resolution for MCP9700 sensor? What would be the answer if we use MCP9701? b) Let us assume, we have appropriate amplification rate. What is the minimum required memory size (in bytes) to store 12 hours data of this system if we use MCP9700? What would be the answer if we use MCP9701? c) Specify an appropriate cut-off frequency for the LP filter if we use MCP9700. What would be the answer if we use MCP9701?
Q2. Vehicle detection loops, called inductive-loop traffic detectors, can detect vehicles passing or arriving at a certain point, for instance approaching a traffic light or in motorway traffic. An insulated, electrically conducting loop is installed in the pavement. Detector uses a LC oscillator consist of a wire loop buried in the ground underneath the road surface (L), a capacitor bank (C) to detect vehicles. Presence of a car above the loop buried in the ground changes the inductance of the loop embedded in the road which then alters the operating frequency of the oscillator. The operation frequency is between 10 kHz to 200 kHz, depending on the model and standards.
Using block diagrams, explain in detail how do you design this system using a) A x86 based microprocessor system, b) An ARM Cortex-M4 based microprocessor system.
Q3. Consider the case of an 8-bit CPU with 16-bit address bus. We want to design a system with this CPU and the following memory ICs: 16KB EPROM, 4KB EEPROM, 8KB RAM and 16KB RAM 1. Design and clearly explain the hardware and wiring of the system. 2. Identify address range (without shadows) for each IC. 3. Draw the memory map of the system, which you have designed.
Q4. Consider the case of a 4×8 two-dimensional array of numbers, A. Assume that each number in the array occupies one word and that the array elements are stored column-major order in the main memory from location 1000 to location 1031. The cache consists of eight blocks each consisting of just two words. Assume also that whenever needed, LRU replacement policy is used. We would like to examine the changes in the cache as the following sequence of requests for the array elements are made by the processor:
Q5. What is the average access time of a system having three levels of memory, a cache memory, a semiconductor main memory, and a SD card (flash) secondary memory, if the access times of the memories are 30 ns, 110 ns, and 0.9 ms, respectively? The cache hit ratio is 90% and the main memory hit ratio is 95%.
Q6. Consider the execution of the following program segment on an 8×8 array A.
for i := 0 to 7 do sum := 0 for j := 0 to 7 do sum := sum + a(i,j) end for ave(i) := sum/8 end for
Assume that the main memory is divided into eight interleaved memory blocks and that each cache memory block consists of eight elements. Assume also that the cache memory access time is 10 ns and that the memory access time is ten times the cache memory access time. Compute the average access time per element of the array A.
Q7. Reading results of two thermal sensors are shown in the table below in which reading #1 represents the ideal output value of the sensors and #2 and #3 represent two different readings from same sensor. Considering Sensor 1 and Sensor 2 in the table, explain and prove by numbers (a) Which sensor has a higher sensitivity? (5 marks) (b) Explain how do you compare precision and accuracy of these sensors? (10 marks) (c) Compare offset of these sensors? (5 marks) (d) Using a block diagram, show how do you connect any of these sensors to a microcontroller which has a 5V power supply? What are necessary blocks between your sensor and the microcontroller? (5 marks)
Q8. You have a brilliant design idea and decide to pivot your design and now you are CRUSHING IT on your project. Everyone is jealous. Everyone. You’ve been going to campus, and you’ve been building your own Microprocessor System on a breadboard. Already it’s amazing, but you decide to upgrade the RAM. You use some RAM and connect them up to your address bus and data bus, and you write down the address ranges used by each chip. You go out for a coffee around 4:20PM and when you come back to the lab you fly into a fit of rage when you see what some jerk did to your set-up! Someone has pulled a bunch of wires off your breadboard! Well at least you recorded the memory map for the RAM chips. Using the marked addresses, and recalling that you used linear address decoding, figure out where signal lines A22, A21, A20, A19, and A18 need to connect so the memory mapping is as shown in the figure. Note that not necessarily all lines are used. Fix this and drive the saboteur MAD!
Q9. You’ve been thinking about your design and how it was nearly ruined by some jealous jerk. Now you’re really going to turn up the heat on the other students. You decide to make your design even better by using full address decoding. You ask Nagui for a 3-line to 8-line decoder and he has one in his pocket! So, he gives it to you and also writes out the function table from memory. You confess to him that you’ve never used such a part before. He looks you in the eyes, stares into your soul, and says it’s just quicker for him to do it for you. Humiliated, you watch him rapidly wire up the breadboard. “There that should do it,” he announced and then disappeared. You look over his work and realize he never told you the memory mapping. Oh boy, you don’t dare disturb him again. Instead, you figure out all the connections for the 3- line to 8-line decoder and using the truth table he gave you, you attempt to figure out the memory ranges that when placed on the address bus will activate each RAM chip. You think maybe Nagui made a mistake. Did he? You’re too scared to ask him.
Q10. You want to add a cache to your computer of Q8 and Q9! You’ll build the cache out of SRAM chips. a) You also think about building your CPU with a 36-bit address bus. How many memory locations could be addressed if you did that? b) Suppose you decide instead that 768KB (1KB = 1024 bytes) is more than enough memory for everyone. Assuming byte-addressable memory with full-decoding, how many signal lines are required to address this memory? c) Continuing from the previous question (using the number of address lines required for addressing 768KB of memory), if you want to incorporate a 16KB cache into your design, how many index bits are required, assuming direct mapping? d) Continuing from the previous question, how many bits are used in the tag? e) Continuing from the previous question, how many SRAM cells are required within the cache (counting both tag storage and data storage with a cache line size of one byte)? Use an exact number (don’t round the result). f) Continuing from the previous question, if you decided instead to use fully associative mapping, how many SRAM cells (total) are required within the cache? Use an exact number (don’t round the result). g) Explain the difference between a stack and a heap and give an example of how each would operate. a) You need to clearly explain how an SPI bus with one master and three slaves is connected, and how information is transferred in the system on the bus.
