ADS LNA Simulation Example
ADS LNA Simulation Example
ADS LNA Simulation Example
ADS documentation Apart from the handed-out ADS tour: a lot more info on ADS and simulation tricks, know-how on http://www.agilent.com
Project data
Number of networks: 9 (plus one sub-network) Description: Shows how to simulate all important
specifications of a (common-source cascode) LNA. Output matching is not done, because after the LNA no external (50 Ohm) filter is anticipated: hence no need for matching (which cost 3 dB in gain)
I_Probe IDS
NETLIST INCLUDE
NetlistInclude NetlistInclude1 IncludeFiles[1]=generic025.lib
M eas Eqn
DC
DC DC1 SweepVar="VDS" Start=0 Stop=2.5 Step=0.1 Other=
V ar Eqn
Set gate and drain voltage sweep limits as needed. If the transistor instance name changes (for example, M OSFET2 instead of M OSFET1), then the M OS_Gm equation must also be changed. If a library part is used on this schematic, then the M OS_Gm equation will have to be set to something like A1.Device.Gm.
Schematic: FET_curve_tracer
IDS .i, mA
25
VGS=1.100
20
VGS=1.000
15 m1 10
VGS=0.800 VGS=0.900
DC_Fe e d DC_Fe e d1
S -P AR AMETER S
S _P a ra m SP1 S ta rt=10 MHz S top=3.0 GHz S te p=10 MHz Mu mu1 mu_s ourc e =mu(S )
MuP rime
DC
DC DC1
Mu
Stability measures
Vdra in 1.19 V
Dc conditions
m2
gain
Reverseisolation
0.0 0.5 1.0 1.5 fre q, GHz 2.0 2.5 3.0
-20
-40
-60
S-parameters
S (2,2) S (1,1)
N E T L IS T IN C L U D E
Cascode LNA for improved stability and isolation and less miller effect
V_ D C SRC2 Vd c = 0 .7 5 V
Vo u t
MO S F E T _ N MO S MO S F E T 2 Mo d e l= n fe t Le n g th = 0 .2 5 u m W id th = 1 0 0 u m T ris e =
S -P A R A M E T E R S
S _P a ra m SP1 S ta r t= 1 0 M H z S to p = 3 .0 G H z S te p = 1 0 M H z
V_ D C SRC3 Vd c = 1 .8 V
I_ P r o b e ID
Mu
D C _F e e d D C _F e e d1
Vd r a in
MuP rime
Te rm Te rm1 N um= 1 Z = 50 O hm
MO S F E T _ N MO S MO S F E T 1 Mo d e l= n fe t Le n g th = 0 . 2 5 u m W id th = 1 0 0 u m T ris e =
DC
DC DC1
T h e S p a r a m e te r s a r e s im u la te d to c h e c k g a in a n d s ta b ility.
M u P r im e mup1 m u _ lo a d = m u _ p r im e ( S )
Me a s Eq n
Meas Eq n Meas 1 Vd s _ c a s c a d e = Vo u t- Vd r a in
Schematic: DC_and_Sparams_cascode
Smith chart component first disabled and shorted to see unmatched S11
m2
-80 -100
m3
Coil in source has right value, but inductive matching network needed
DC and S-parameter simulation: cascode LNA Same schematic but smith-chart component enabled
NET LIS T INCLUDE
Netlis tInclude Netlis tInclude1 IncludeF iles [1]=generic025.lib V_DC S RC1 Vdc= 2.5 V Term Term2 Num= 2 Z=100 O hm Vout
MOSFET_NMOS MOSFET2 Mode l=nfe t Le ngth=0 .2 5 u m Width =10 0 um Tris e =
S -P ARAMET ERS
S _P aram S P1 S tart= 10 MHz S top= 3.0 G Hz S tep= 10 MHz
DC_Feed DC_Feed1
Vdrain
MuPrime
DA_SmithChartMatch_DC_and_Sparams _cas code DA_SmithChartMatch1 F= 1 G Hz Zs = (50+ j*0) O hm L Zl= (50+ j*0) O hm L1 Z0= 50 O hm L= 1.05 nH R=
DC
DC DC1
Meas E qn
Schematic: DC_and_Sparams_cascode
Click On Zl
S11
49.1-j128.95
After entry, press enter
Lumped Element Low P as s Filter Des ign As s is tant Need Help? P leas e s ee the appropriate Des ignGuide Us er Manual
Va r Eqn
VAR VAR1 P arameters ="#1.9 GHz#50 Ohm#(49.10-j*128.9) Ohm#50 Ohm" L L1 L=10.756248 nH R=1e-12 Ohm
P ort P1 Num=1
P ort P2 Num=2
20 0 -20 dB(S (2,1)) dB(S (1,2)) -40 -60 -80 -100 0.0 0.5 1.0 1.5 freq, GHz
m3
2.0
2.5
3.0
Improved gain (4 dB) and minimum return loss due to input matching.
fre q (10.00MHz to 3.000GHz)
Vout
MOS FET _NMOS MOS FET 2 Mode l=nfe t Le ngth=0.25 um Width=100 um T ris e =
S -P ARAMETERS
S _P a ra m SP1 S ta rt=10 MHz S top=3.0 GHz S te p=10 MHz
Vdra in
MOS FET _NMOS MOS FET 1 Mode l=nfe t Le ngth=0.25 um Width=100 um T ris e =
DC
DC DC 1
MuP rime
L L1 L=1.05 nH R=
Me a s Eqn
Schematic: DC_and_Sparams_cascode_match
V_ D C SRC1 Vd c =2 .5 V
Vo u t
V_ D C SRC3 Vd c =1 .8 V
M O S F E T _N M O S MOSFET2 M o d e l= n fe t Le n g th = 0 .2 5 u m W id th = 1 0 0 u m T r is e =
AC
AC AC 1 S w e e p V a r= "f r e q " S t a rt = 1 0 0 M H z S to p =3 G H z S te p =1 0 0 MH z C a lc N o is e = y e s N o is e N o d e [ 1 ]= "V o u t " N o is e N o d e [ 2 ]= "V in " S o r t N o is e = S o r t b y v a lu e I n c lu d e P o rt N o is e = y e s
I_ P r o b e ID V_ D C SRC2 Vd c =0 . 7 5 V
D C _F eed D C _F eed1
V d ra in
V in D C _ B lo c k D C B lo c k 1 P _ AC P O R T1 N u m =1 Z =5 0 O h m P a c = p o la r( d b m t o w (0 ), 0 ) F re q = f re q L L2 L= 1 0 . n H R=
Vg a te
M O S F E T _N M O S MOSFET1 M o d e l= n fe t Le n g th = 0 .2 5 u m W id th = 1 0 0 u m T r is e =
L L1 L= 1 . 0 n H R=
Schematic: LNA_noise
NF
2.0
2.5
3.0
fre q, GHz
NETLIST INCLUDE
Ne tlis tInc lude Ne tlis tInc lude 1 Inc lude File s [1]=ge ne ric 025.lib T e rm T e rm2 Num=2 Z=100 Ohm
Vout
MO S F ET_NMO S MO S F ET2 Model= nfet Length= 0.25 um Width= 100 um Tris e=
AC
AC AC1 S we e pVa r="fre q" S ta rt=100 MHz S top=3 GHz S te p=100 MHz Ca lc Nois e =ye s Nois e Node [1]="Vout" Nois e Node [2]="Vin" S ortNois e =S ort by va lue Inc lude P ortNois e =ye s
Vdra in
Vga te
Both Induc tors now ha ve a s e rie s re s is tor ma king the qua lity fa c tor of the c ompone nt a pprox 7
L L1 L=1 nH R=1.7
Schematic: LNA_noise_real_Q
NF
m1
fre q, GHz
Notice tha t the nois e figure ha s de gra de d s ignifica ntly due to the the rma l nois e of the s e rie s re s is ta nce s in the inductors
NETLIST INCLUDE
Ne tlis tInc lude Ne tlis tInc lude 1 Inc lude File s [1]=ge ne ric 025.lib Te rm Te rm2 Num=2 Z=100 Ohm Vout
MOSFET_NMOS MOSFET2 Mode l=nfe t Le ngth=0.2 5 um Width =1 00 um Tris e =
AC
AC AC1 S we e pVa r="fre q" S ta rt=100 MHz S top=3 GHz S te p=100 MHz Ca lc Nois e =ye s Nois e Node [1]="Vout" Nois e Node [2]="Vin" S ortNois e =S ort by va lue Inc lude P ortNois e =ye s
Var E qn
Vdra in
Vga te
PARAMETER SWEEP
P a ra mS we e p S we e p1 S we e pVa r="s ourc e ind" S imIns ta nc e Na me [1]="AC1" S imIns ta nc e Na me [2]= S imIns ta nc e Na me [3]= S imIns ta nc e Na me [4]= S imIns ta nc e Na me [5]= S imIns ta nc e Na me [6]= S ta rt=1e -9 S top=15e -9 S te p=0.5e -9
L L1 L=1.0 nH R=
Schematic: LNA_noise_sweep
NF
m1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
fre q, GHz
V_ D C SRC1 Vd c =2 . 5 V
From sources-freq. domain: P_1 tone source. RF_power is the sweep variable
V_ D C SRC2 Vd c =0 . 7 5 V
Vo u t
I_ P ro b e ID DC _F e e d DC _F e e d1
Vd ra in
Va r Eq n
Vg a te
Me a s Eq n
Me a s E q n Me a s 1 Vo u t_ d Bm =d Bm (Vo u t[1 ])
L L1 L=1 n H R =1 . 7
Schematic: LNA_1dB_by_power_sweep
m1
Vout_dBm
0 -10 -20
m1 RF_power=-4.000 20 Vout_dBm=9.265
10
Line Vout_dBm
-10
RF_power
-20
Voltage gain ~ 15 dB
-30
RF_powe r
Simulation of IIP3
NE T LIS T INCLUDE
N e tlis tIn c lu d e N e tlis tIn c lu d e 1 In c lu d e F ile s [1 ]=g e n e r ic 0 2 5 .lib Te rm Te rm 2 N u m=2 Z=1 0 0 O h m
V_ D C SR C 1 Vd c =2 .5 V
Vo u t
MO S FE T_N MOS MO S FE T2 Model=nfet Le ngth=0.25 um W idth=100 um Tris e=
V_ D C SR C 3 Vd c =1 .8 V
I_ Pr o b e ID
D C _ Fe e d D C _ Fe e d 1
Vd r a in
Va r Eq n
Vg a te
Me a s Eq n
L L1 L=1 n H R =1 .7
P0
Pin
IP 3in
Me as Eq n
Predefined equations
O u tp u t IP 3 (O IP3 )
Pin
P0
Pin
IP 3out
IP 3out
Schematic: LNA_IIP3
IP 3in1 1.333
ipo_lower 16.332
ipo_upper 16.333
freq 0.0000 Hz 1.000MHz 2.000MHz 1.898GHz 1.899GHz 1.901GHz 1.902GHz 3.798GHz 3.799GHz 3.800GHz 3.801GHz 3.802GHz 5.698GHz 5.699GHz 5.700GHz 5.702GHz 7.598GHz 7.599GHz 7.600GHz 7.601GHz 7.602GHz
Notice tha t the uppe r a nd lowe r third orde r inte rce pt points a re a lmos t s ymme trica l (ipo_uppe r a nd ipo_lowe r). The input IP 3 (IP 3in1) is s imply 15 dB lowe r (the s ma ll s igna l ga in) tha n the output IP 3
dBm(mix(Vout,tones ))
m1
-20 -40 -60 -80 -100 1.8985
m2
freq, GHz
This is the s o-ca lle d mix ta ble of the ha rmonic ba la nce s imula tion. Numbe r 1 re pre s e nts the RF tone (with s pa cing). Ze ro me a ns tha t no tone is pre s e nt (DC). And two re pre s e nts two time s the RF s imula tion tone (of Fre q[1] or Fre q[2]).