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Von Neumann Architecture
Von Neumann architecture was first published by John von

Neumann in 1945.
His computer architecture design consists of a Control

Unit, Arithmetic and Logic Unit (ALU), Memory Unit, Registers and
Inputs/Outputs.
Von Neumann architecture is based on the stored-program

computer concept, where instruction data and program data are
stored in the same memory. This design is still used in
most computers produced today.
Central Processing Unit (CPU)

The Central Processing Unit (CPU) is the electronic circuit responsible
for executing the instructions of a computer program.
It is sometimes referred to as the microprocessor or processor.
The CPU contains the ALU, CU and a variety of registers.
Registers
Registers are high speed storage areas in the CPU. All data must be
stored in a register before it can be processed.
Memory Address Holds the memory location of data that

MAR
Register needs to be accessed
Holds data that is being transferred to or

MDR Memory Data Register
from memory
Where intermediate arithmetic and logic

AC Accumulator
results are stored
Contains the address of the next instruction

PC Program Counter
to be executed
Current Instruction Contains the current instruction during

CIR
Register processing
Arithmetic and Logic Unit (ALU)
The ALU allows arithmetic (add, subtract etc) and logic (AND, OR,
NOT etc) operations to be carried out.
Control Unit (CU)
The control unit controls the operation of the computer’s ALU,

memory and input/output devices, telling them how to respond to the
program instructions it has just read and interpreted from the memory
unit.
The control unit also provides the timing and control signals required
by other computer components.
Buses
Buses are the means by which data is transmitted from one part of a
computer to another, connecting all major internal components to the
CPU and memory.
A standard CPU system bus is comprised of a control bus, data

bus and address bus.
Carries the addresses of data (but not the data) between

Address Bus
the processor and memory
Carries data between the processor, the memory unit

Data Bus
and the input/output devices
Carries control signals/commands from the CPU (and

Control Bus status signals from other devices) in order to control and
coordinate all the activities within the computer
Memory Unit
The memory unit consists of RAM, sometimes referred to as primary
or main memory. Unlike a hard drive (secondary memory), this
memory is fast and also directly accessible by the CPU.
RAM is split into partitions. Each partition consists of an address and

its contents (both in binary form).
The address will uniquely identify every location in the memory.
Loading data from permanent memory (hard drive), into the faster and
directly accessible temporary memory (RAM), allows the CPU to
operate much quicker.
Harvard Architecture

In a normal computer that follows von Neumann architecture, instructions, and

data both are stored in the same memory. So same buses are used to fetch
instructions and data. This means the CPU cannot do both things together (read
the instruction and read/write data). Harvard Architecture is the computer
architecture that contains separate storage and separate buses for instruction
and data. It was basically developed to overcome the bottleneck of Von
Neumann’s Architecture. The main advantage of having separate buses for
instruction and data is that the CPU can access instructions and read/write data at
the same time.
Structure of Harvard Architecture:
Structure of Harvard Architecture
Buses
Buses are used as signal pathways. In Harvard architecture, there are separate
buses for both instruction and data. Types of Buses:
 Data Bus: It carries data among the main memory system, processor, and I/O
devices.
 Data Address Bus: It carries the address of data from the processor to the
main memory system.
 Instruction Bus: It carries instructions among the main memory system,
processor, and I/O devices.
 Instruction Address Bus: It carries the address of instructions from the
processor to the main memory system.
Operational Registers
There are different types of registers involved in it which are used for storing
addresses of different types of instructions. For example, the Memory Address
Register and Memory Data Register are operational registers.
1. Program Counter: It has the location of the next instruction to be executed.
The program counter then passes this next address to the memory address
register.
Arithmetic and Logic Unit: The arithmetic logic unit is part of the CPU that
operates all the calculations needed. It performs addition, subtraction,
comparison, logical Operations, bit Shifting Operations, and various arithmetic
operations.
Control Unit: The Control Unit is the part of the CPU that operates all processor
control signals. It controls the input and output devices and also controls the
movement of instructions and data within the system.
Input/Output System: Input devices are used to read data into main memory
with the help of CPU input instruction. The information from a computer as
output is given through Output devices. The computer gives the results of
computation with the help of output devices.
INSTRUCTION SET ARCHITECTURE: RISC and CISC
The ISA defines the types of instructions to be supported by the

processor.
Based on the type of operations they perform MIPS Instructions are
classified into 3 types:
 Arithmetic/Logic Instructions:
These Instructions perform various Arithmetic & Logical
operations on one or more operands.
 Data Transfer Instructions:
These instructions are responsible for the transfer of instructions
from memory to the processor registers and vice versa.
 Branch and Jump Instructions:
These instructions are responsible for breaking the sequential
flow of instructions and jumping to instructions at various other
locations, this is necessary for the implementation
of functions and conditional statements.
1. The ISA defines the maximum length of each type of instruction

and data.
MIPS (Microprocessor without Interlocked Pipelined Stages) is a

family of reduced instruction set computer (RISC) instruction set
architectures (ISA) developed by MIPS Computer Systems, now
MIPS Technologies, based in the United States. MIPS.
Since the MIPS is a 32 bit ISA, each instruction must be
accommodated within 32 bits.
2. The ISA defines the Instruction Format of each type of instruction.

The Instruction Format determines how the entire instruction is
encoded within 32 bits
There are 3 types of Instruction Formats in the MIPS ISA:
 R-Instruction Format
 I-Instruction Format
 J-Instruction Format
Microarchitecture
Microarchitecture, also known as computer organization, is the way

a computer’s central processing unit (CPU) is designed and
constructed at the level of logic gates, circuits,
multiplexers and electrical components. It includes the CPU’s
instruction set architecture (ISA), data path, and control unit, as
well as other components such as caches and buses.
The microarchitecture of a CPU plays a crucial role in determining

its performance and efficiency. It affects factors such as the
speed of execution, the amount of power consumed, and
the instructions that the CPU can execute.
Some popular microarchitectures used in modern CPUs

include:
1. x86: This is a widely used microarchitecture used in Intel and

AMD CPUs. It is based on the original 8086 processor from
Intel, and has evolved over time to include more advanced
features.
2. ARM: This is a popular microarchitecture used in mobile devices,

embedded systems, and other low-power applications. It is
known for its energy efficiency and is used in many popular
smartphones and tablets.
3. PowerPC: This is a microarchitecture used in many high-

performance computing systems, including servers and
supercomputers. It was developed by IBM and is used in many of
their systems.
4. RISC-V: This is an open-source microarchitecture that is gaining

popularity in the industry. It is designed to be simple, efficient,
and customizable, and is used in many embedded systems and
other applications.
Overall, the micro architecture of a CPU is a key factor in its

performance and efficiency, and different microarchitectures are
suited to different applications and use cases.
Register Denotations
The letter R and a number are used to identify a register.
R0-R3 are used to hold variables or temporary values and are also
involved in subroutine calls.
R4 through R12 are all-purpose.
The stack pointer, R13, also known as SP. The programme can store data
that it will need to retrieve later at a memory address that is contained in
the stack pointer.
The link register, R14, is utilised with branching instructions to go back in

time in the programme.
The address of the following instruction to be executed is stored in R15,

also known as PC for programme counter. As it decides which
instructions are executed on the CPU, this places a great deal of
responsibility on the PC. Your programme might abruptly cease functioning
if you enter the incorrect value into the PC; this is known as a crash.
Register Flags
A variety of flags that can be set when an instruction executes are found in
the current programme status register (CPSR), which was previously
described.
The N, Z, C, and V flags are those mentioned here:
 When the outcome of an instruction is negative, the letter N, which stands

for negative, is used.
 When the outcome is zero, Z, for zero, is set.
 When an instruction results in a carry out, the letter C, which stands for
carry, is set.
 When an overflow happens, the overflow variable, V, is set.
 When developing the assembly code, certain condition suffixes (described
in a later article) are added to the instructions to check for these flags.
Key Components of Microarchitecture

Key components of microarchitecure are:
Instruction Fetching: How instructions are retrieved from memory and
readied for execution is determined by the microarchitecture. Pipeline
stalls, when the processor remains idle while waiting for instructions, can
be reduced with the use of methods like instruction prefetching and branch
prediction.
Instruction Decoding: The process of decoding instructions involves

converting obtained instructions into a form that the processor can
comprehend. The complexity and effectiveness of this operation are
influenced by the instruction decoder’s architecture.
Execution Units: The microarchitecture consists of a variety of units that

carry out arithmetic, logical, and other functions. To handle numerous sorts
of instructions at once, processors might have multiple execution units.
Register File: For rapid access during calculation, the register file saves
temporary data. Reduced data risks and efficient register management are
essential for error-free instruction execution.
Pipeline Design
By segmenting the processing of instructions into distinct phases, the

pipeline design method can improve the speed at which instructions are
executed. The throughput and performance are increased since each stage
tackles a distinct task and many instructions may be handled
simultaneously. But while constructing a pipeline, possible risks that can
occur from relationships between instructions must be carefully taken into
account.

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Von Neumann Architecture

Von Neumann architecture was first published by John von

His computer architecture design consists of a Control

Von Neumann architecture is based on the stored-program

Central Processing Unit (CPU)

It is sometimes referred to as the microprocessor or processor.

The CPU contains the ALU, CU and a variety of registers.

Memory Address Holds the memory location of data that

Holds data that is being transferred to or

Where intermediate arithmetic and logic

Contains the address of the next instruction

Current Instruction Contains the current instruction during

Arithmetic and Logic Unit (ALU)

The control unit controls the operation of the computer’s ALU,

A standard CPU system bus is comprised of a control bus, data

Carries the addresses of data (but not the data) between

Carries data between the processor, the memory unit

Carries control signals/commands from the CPU (and

RAM is split into partitions. Each partition consists of an address and

The address will uniquely identify every location in the memory.

In a normal computer that follows von Neumann architecture, instructions, and

The ISA defines the types of instructions to be supported by the

1. The ISA defines the maximum length of each type of instruction

MIPS (Microprocessor without Interlocked Pipelined Stages) is a

2. The ISA defines the Instruction Format of each type of instruction.

Microarchitecture, also known as computer organization, is the way

The microarchitecture of a CPU plays a crucial role in determining

Some popular microarchitectures used in modern CPUs

1. x86: This is a widely used microarchitecture used in Intel and

2. ARM: This is a popular microarchitecture used in mobile devices,

3. PowerPC: This is a microarchitecture used in many high-

4. RISC-V: This is an open-source microarchitecture that is gaining

Overall, the micro architecture of a CPU is a key factor in its

The link register, R14, is utilised with branching instructions to go back in

The address of the following instruction to be executed is stored in R15,

The N, Z, C, and V flags are those mentioned here:

 When the outcome of an instruction is negative, the letter N, which stands

Key Components of Microarchitecture

Instruction Decoding: The process of decoding instructions involves

Execution Units: The microarchitecture consists of a variety of units that

By segmenting the processing of instructions into distinct phases, the

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