Final - ADC

Download as pdf or txt
Download as pdf or txt
You are on page 1of 40

1

SHREENIVASA ENGINEERING COLLEGE


B.Pallipatti, Bommidi, Pappireddipatti (Tk), Dharmapuri (Dt) – 635 301
.

BONAFIDE CERTIFICATE

Certified that this a Bonafide record of work done by


Selvan/Selvi .................................. Reg.No……………………. of
First Semester POWER ELECTRONICS AND DRIVES
Branch of M.E Degree Examination in the subject PX4111
ANALOG AND DIGITAL CONTROLLERS FOR PE
CONVERTERS LABORATORY

Staff In-charge Head of the Department

Submitted for University practical Examination held on -------------------------

INTERNAL EXAMINER EXTERNAL EXAMINER

2
TABLE OF CONTENTS

S. N O DATE NAME OF THE EXPERIMENT PAGE MARKS STAFF


NO INITIAL

3
Ex No. 1:
DATE:

Performance evolution of a summing amplifier circuit for R1= 10KΩ, R2=47KΩ and RF= 10
K Ω and calculate the output for different input voltages.

Aim: To implement and setup a summing amplifier circuit with OP AMP 741C and verify the
output.

List of Equipment /Software

Following equipment/software is required:

• MULTISIM

Category Soft-Experiment

THEORY:
Op-amp can be used to design a circuit whose output is the sum of several input signals. Such a
circuit isR called Ra summing amplifier or an adder. Summing amplifier can be classified as
inverting & non-inverting summer depending on the input applied to inverting & non-inverting
terminals respectively. Circuit Diagram shows an inverting summing amplifier with 2 inputs.
Here the output will be amplified version of the sum of the two input voltages with 180 0 phase
reversal.

PROCEDURE:
1. Check the components.
2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give V1 = +12 V DC and V2 =+5V DC.
5. Observe the output voltage.
6. Repeat the procedure with V1 =1Vpp / 1 KHz sine wave and V2 = +1.5Vdc.
7. Make sure that the CRO selector is in the D.C. coupling position.
8. Observe input and output on two channels of the oscilloscope simultaneously.
9. Note down and draw the input and output waveforms on the graph.

4
CIRCUIT DIAGRAM:

APPARATUS REQUIRED:

Sl. No. Name of the Apparatus Range Quantity


1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V 1
4. Op-Amp IC 741 1
5. DC voltage source 12 V and 5 V
6. Resistors R1= 10K Ω, R2= 47K Ω and RF= 10 K Ω

DESIGN:
The output voltage of an inverting summing amplifier is given by Vo = - (Rf / Ri
) (V1+V2)
Let R1 = 10 KΩ, R2 = 47 KΩ Then RF = 10

Then Vout 1 1V 02 .213V

OBSERVATIONS:
V1= 12 DC, V2= 5 DC, Then Vo=?
V1 =1Vpp / 1 KHz sine wave and V2 = +1.5Vdc. Then Vo=?

5
RESULT:
Observe the input and output voltages on a Multi meter as well as CRO. Compare
the experimental results with the theoretical value.
6
Ex No:2
DATE:

Design of filters using Op-amp

Aim: To design and test the low pass filter and high pass filter using op-amp

Apparatus:
1) Op-Amp (µA - 741) - 2 No’s
2) DC Power Supply ( 1 2 - 0 - 12 ) V
3) CRO (0-20MHz range)
4) Signal Generator (0 to 1MHz range)
5) Bread board
6) Resistors and capacitors

Theory:
(a) Low pass filter:

(a) frequency response

(b) Low pass filter using op-amp

7
Lowpass filter experimental procedure:
1) Vary the input frequency at regular intervals and note down the output response from
the CRO.
2) Calculate the gain in dB.
3) Verify practical and theoretical cutoff frequency
4) Plot the frequency response on semi-log sheet

8
Second order Low pass filter

Where
AF = 1+RF/R1 = Pass band gain of the filter
f = frequency of the input signal
fH = 1/2Π√R2R3C1C2 = high cutoff frequency (Hz)

b). High pass filter:

9
High Pass filter experimental procedure:

1) Vary the input frequency at regular intervals and note down the output response from
the CRO.
2) Calculate the gain in dB.
3) Verify practical and theoretical cutoff frequency
4) Plot the frequency response on semi-log sheet

10
Second order high pass filter

The voltage gain magnitude of the second order high pass filter is

Vo/Vin = AF/√1+ (fL/f) 4

Result:

Practical values
Cut-off Frequency of low pass filter =
Cut-off Frequency of high pass filter =

Theoretical values:
Cut-off Frequency of low pass filter =
Cut-off Frequency of high pass filter =

11
Ex No :3
DATE:

Design of On –Off controller using Opamp

AIM:

To design the circuit of PI controller using op-amp IC.

APPARATUS REQUIRED:

S. NO. COMPONENTS QUANTIT SPECIFICATION


Y S
1. RPS (0 – 30)V

2. CRO 1

4. IC 741 1

5. Resistor 1 100 ohms

6. Capacitor 1 1000μF

THEORY:

A proportional-integral controller (i.e., PI) with feedback can take the place of manual
adjustment of the switching duty cycle to a DC-DC converter and act much more quickly
than is possible by hand. Consider the Transformer, DBR, MOSFET Firing Circuit, DC-DC
Converter, and Load as “a process” shown below. In the open loop mode duty cycle is
manually adjusted.

To automate the process, the “feedback loop” is closed and an error signal (+ or –) is
obtained. The PI controller acts upon the error with parallel proportional and integral
responses in an attempt to drive the error to zero.
12
PC BOARD IMPLEMENTATION OF PI CONTROLLER:

13
CIRCUIT DIAGRAM:

OUTPUT WAVEFORM:

14
Let αVout be a scaled down replica of Vout. When αVout equals Vset, then the error is zero.
A resistor divider attached to Vout produces αVout, which is suitably low for op-amps
voltage levels. The block diagram of Closed Loop Process with PI Controller is shown here.

PROCEDURE:

Step 1: The PCBs

• All chips (DIP and SIP) are double-socketed. One socket is soldered to the PC board,
and the other socket remains connected to the chip. Keeping chips in a socket helps
preserve their leads for future use.
• Place 100kΩ and 1.5kΩ resistors at the top right of the board are the correct ohmic
values and are properly mounted.
• Use nylon hardware to physically connect a MOSFET firing circuit to PI controller.
• For power, solder #22 red and green jumper wires from the MOSFET firing
circuit12V supply to the 12V input of the PI controller.
• Bring a #16 red wire from the output of a buck/boost converter to the PI controller
terminal labeled “CONVERTER VOUT, CAREFUL, WILL EXCEED 100V.”
• Use short #16 red and black wires to connect the “External Duty Input” terminal
block of the MOSFET Firing Circuit to the “Dcont” terminal block of the PI
controller.
• Move the SPDT switch of the MOSFET firing circuit to the left position for “External
Duty Input.”

Step 2: The Set Point


• DO NOT power up the DBR in this step.
• Rotate the Set Point, Proportional Kp, and D Limiter potentiometers to the fully
counterclockwise position.
• Rotate the Integrator potentiometer to the fully clockwise position.

15
• SWITCH OFF the Feedback and Integrator SPDT switches.
• Power up the combined MOSFET Firing Circuit and PI Controller.
• Check the isolated +12V and −12V outputs on the PI controller to make sure they are
OK. Voltages below 11V indicate a short circuit in your wiring, which will burn out
the DC-DC chip in a few minutes.
• View VGS on an oscilloscope and confirm that the waveform is clean and has a
switching of about 100 kHz.
• Raise the Set Point Potentiometer so that the set point voltage (Box 1) is 1.5V. This
will be the “target voltage” of the controller, and it corresponds approximately to the
fraction of V out across the 1.5kΩ resistor when Vout is 100V.
• Except for a minor tune up, the Set Point Potentiometer will remain at this value for
the entire experiment. If the potentiometer knob is accidently bumped later, then
simply re-adjust it as explained above.

Step 3: The D Limiter


• DO NOT power up the DBR in this step.
• View VGS on an oscilloscope.
• SWITCH ON the Integrator SPDT switch to temporarily drive the integrator‟s output
to its 12V rail.
• Raise the D Limiter Potentiometer so that the duty cycle of VGS is approximately
0.80. The objective is to prevent the PI controller from rising to the D = 1 condition
which would short circuit the MOSFET. The resulting Dcont should be approximately
3.1V.
• The D Limiter Potentiometer will remain at this value for the entire experiment. If the
potentiometer knob is accidently bumped later, then simply re-adjust it as explained
above.
• SWITCH OFF the Integrator SPDT switch.
• Step 4: Set the Open Loop Gain to Unity
• Make sure that the Integrator Potentiometer is fully clockwise.
• Connect a 150W incandescent light bulb to the output of the buck/boost converter.
• With a variac, 120/25V transformer, and DBR toggle switch on, slowly raise the
variac until the DBR output voltage is the usual 35-40V.

16
• While viewing VGS, slowly raise the Proportional Kp Potentiometer until the
converter output voltage is 100V. Re-check your DBR voltage to make sure it did not
drop more than 2-3 volts. If it did, re-adjust the variac and Kp to achieve 100Voutput.
• The Proportional Kp potentiometer should be about mid-range. The duty cycle
measurement on the scope should be about 0.65. But D will likely be jumpy and
unstable, and there will probably be noticeable flicker in the light bulb. Small actions
such as touching the MOSFET heat sink or measuring a voltage on the PI controller
board may change the VGS waveform and light brightness. These are signs of
instability.
• SWITCH OFF the DBR toggle switch.
• Measure voltages in Box 4 and Box 5. The quotient −VBox5 / VBox4 is the Kp
required for unity open loop gain. We define this quotient as KP1. Expect KP1 to be
close to −(−10.4 / 1.52) = 6.84.

Step 5: Perform the Open Loop Bump Test to Observe the Process Time Constant T
• Connect channel 1 probe to Vout.
• SWITCH ON the DBR toggle switch.
• Set time scale to 20msec/division, and voltage scale to 20V/division.
• Select averaging, with 1 cycle.
• Set trigger mode to normal, and adjust the trigger voltage to about 10V.
• Set trigger so that triggering occurs on positive-going change.
• Press “single” to freeze the screen on the next trigger.
• SWITCH OFF AND BACK ON the DBR toggle switch and capture the open loop
response of the process and freeze it. Save a screen snapshot for your report.
• Upon careful examination of the saved screen snapshot, using both 20 and 5
msec/division scales on the scope, two time constants can be observed in the
response.

RESULT:

Thus, the design of Temperature Controlled Switch in PIC 16F877A is programmed and tested
using LM35 temperature sensor was successfully completed. The output was thus verified and obtained.

17
Ex No:4
DATE:
Design of Driver Circuit using IR2110

AIM:

To design and implement the driver circuit using IC IR2110.

COMPONENTS REQUIRED:

S.NO COMPONENTS RANG /TYPE QUANTITY

1 Diode 1N4007 1
2 Capacitor 10 µF 1
47µF 3
3 Resistor 22Ω 2
100Ω 2
4 Base 14 pin 1

THEORY:

IR 2110 – High And Low Side Driver:


A gate driver is used when pulse width modulation (PWM) controller cannot provide the
output required driving the gate capacitance of the associated MOSFET.
The IR2110 is a high voltage, high speed power MOSFET driver with independent high and
low side referenced output channels. It is fully operational to +500V or +600V and tolerant to
negative transient voltage dV/dt immune. Logic inputs are compatible with standard CMOS
or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer
stage designed for minimum driver cross-conduction. Propagation delays are matched to
simplify use in high frequency applications.

The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high
side configuration which operates up to 500 or 600 volts.
Some of the features of IR 2110 are:
• Floating channel designed for bootstrap operation
• Gate drive supply range from 10 to 20V
• Fully operational to +500V or +600V
• Tolerant to negative transient voltage

18
PIN DIAGRAM OF IR2110

CONNECTION OF DRIVER IC IR2110 WITH MOSFET/IGBT

19
• Under voltage lockout for both channels
• 3.3V logic compatible
• Separate logic supply range from 3.3V to 20 V
• Logic and power ground + 5V
• CMOS Schmitt-triggered inputs with pull down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
• Outputs in phase with inputs

Description of Pins:

VDD Logic Supply


HIN Logic input for high side gate drive output (HO), in phase
SD Logic input for shut down
LIN Logic input for low side gate driver output (LO), in phase
VSS Logic ground
VB High side floating supply
HO High side gate drive output
VCC Low side supply
LO Low side gate drive output
COM Low side return

Design Calculation:

The bootstrap capacitor (CBOOT) is charged every time the low-side driver is on and the
output pin is below the supply voltage (VDD) of the gate driver. The bootstrap capacitor is
discharged only when the high-side switch is turned on. This bootstrap capacitor is the supply
voltage (VBS) for the high circuit section. The first parameter to take into account is the
maximum voltage drop that we have to guarantee when the high-side switch is in on state.
The maximum allowable volt- age drop (VBOOT) depends on the minimum gate drive volt-
age (for the high-side switch) to maintain. If VGSMIN is the minimum gate-source voltage,

the capacitor drop must be:

where:
VDD = Supply voltage of gate driver [V];
and VF = Bootstrap diode forward voltage drop [V]

20
The value of bootstrap capacitors is calculated by:

where Q is the total amount of the charge supplied by the capacitor.


TOTAL

The voltage drop due to the external diode is nearly 0.7V. Assume the capacitor charging
time is equal to the high-side on-time (duty cycle 50%). According to different bootstrap
capacitor values, the following equation applies:

ILKDIODE = Bootstrap diode leakage current. The capacitor leakage current is important
only if an electrolytic capacitor is used; otherwise, this can be neglected.

RESULT:
Thus the design of driver circuit using IR2110 for MOSFET was successfully completed.
The output was thus verified and obtained.

21
Ex No :5
DATE:

Interface Hall effect voltage and current sensor with microcontroller and display the
current waveform in the IDE and validate with actual waveform in DSO

AIM:

To interface Hall Effect sensor with microcontroller and display the current waveform in IDE
and validate with actual waveform in DSO.

APPARATUS REQUIRED:

1. ACS712 sensor
2. PIC18 module
3. IDE and DSO

THEORY:
A Hall Effect sensor is a device that detects the presence of magnetic field. It is based on the
Hall Effect. The Hall Effect was discovered by Edwin hall in 1869. When current is passed
through the conductor and the same conductor is placed in magnetic field perpendicular to the
current flow then a voltage called the hall voltage is generated perpendicular to both the
current and magnetic field. This is known as Hall Effect. The advantages of Hall Effect
sensors are:
• Non- contact operation so there is no wear and friction. Hence unlimited number of
operating cycles.
• High speed operation - over 100 kHz possible. Whereas at high frequencies the
inductive or capacitive sensor output begins to distort.
• Can measure zero speed
• Wide temperature range
• Capable of measuring large current
The ACS712 from Allegro provides precise solutions for AC or DC current sensing which is
suitable in industrial, commercial, and communications systems. The device package allows
for easy implementation by the customer. Typical applications include motor control, load
detection and management, switch mode power supplies, and over current fault protection.

22
PIN DIAGRAM OF HALL EFFECT SENSOR ACS 712

INTERFACING ACS712 WITH PIC MICROCONTROLLER

23
The device is not intended for automotive applications. The device consists of a precise, low-
offset, linear Hall circuit with a copper conduction path located near the surface of the die.
Applied current flowing through this copper conduction path generates a magnetic field
which the Hall IC converts into a proportional voltage. Device accuracy is optimized through
the close proximity of the magnetic signal to the Hall transducer. A precise, proportional
voltage is provided by the low-offset, chopper- chopper-stabilized BiCMOS Hall IC, which is
programmed for accuracy.

PROCEDURE:
1. T1 and T2 of the sensor should be connected in series with the current path which is need
to sense.
2. Connect the +5VDC, GND and Signal Pins of current sensor to microcontroller.
3. Measure the output voltage at zero current value.
4. Increase the current value and then observe the readings.

ALGORITHM:
Output Sensor Voltage = analog Read (sensor Pin)*5.0/1023.0
From the graph and the datasheet,
At zero current, Output Sensor Voltage = 2.5
Gradient of the graph = 185mV/A (given in datasheet as sensitivity)
So the equation of the graph is
Output Sensor Voltage = 0.185*Current + 2.5
Therefore current can be expressed as
Current = (Output Sensor Voltage – 2.5)/0.185
If the current flows in negative direction, current value will be negative.

RESULT:

Thus, the Interface Hall effect voltage and current sensor with microcontroller was successfully
completed. The output was thus verified and obtained.

24
Ex No 6:
DATE:

Duty Cycle control using a POT connected to ADC peripheral in a standalone mode

AIM:
To generate PWM gate pulses with duty cycle control using a POT connected to ADC
peripheral of microcontroller PIC 18.

SOFTWARE AND COMPONENTS REQUIRED:


2. PIC Microcontroller
3. PIC Kit

THEORY:
A Pulse Width Modulation (PWM) Signal is a method for generating an analog signal using a
digital source. A PWM signal consists of two main components that define its behavior: a
duty cycle and a frequency. The duty cycle describes the amount of time the signal is in a
high (on) state as a percentage of the total time of it takes to complete one cycle. The
frequency determines how fast the PWM completes a cycle (i.e. 1000 Hz would be 1000
cycles per second), and therefore how fast it switches between high and low states. By
cycling a digital signal off and on at a fast enough rate, and with a certain duty cycle, the
output will appear to behave like a constant voltage analog signal when providing power to
devices.
PWM signals are used for a wide variety of control applications. Their main use is for
controlling DC motors but it can also be used to control valves, pumps, hydraulics, and other

mechanical parts. The frequency that the PWM signal needs to be set at will be dependent on
the application and the response time of the system that is being powered.

25
PWM SIGNALS WITH DIFFERENT DUTY CYCLES:

PWM WAVEFORM WITH 25% DUTY CYCLE

PWM WAVEFORM WITH 50% DUTY CYCLE

PWM WAVEFORM WITH 75% DUTY CYCLE

26
RESULT:
Thus the result is ability to change the brightness of an LED by varying the POT.

27
Ex No: 7
DATE:

Generation of PWM gate pulses with duty cycle control using PWM peripheral of
microcontroller

AIM:
Generation of PWM Gate pulse with duty cycle control using PWM peripheral
microcontroller using PIC18F4550.

SOFTWARE AND COMPOMENTS REQUIRED:


➢ MICKRO C
➢ 18F4550
➢ PIC KIT 2 or PIC KIT 3

THEORY:
Pulse width modulation (PWM) is a widely used modulation technique not only in
communication systems but also high current driving applications like motor drivers, LED
drivers etc.
PWM is a digital modulation technique widely used for coding a digital data into a pulsating
signal which usually looks like a square wave. PWM find applications including motor speed
control, for encoding messages in telecommunication systems and for controlled switching in
switch mode power supplies and for sound synthesis in audio amplifiers. PWM uses a
rectangular pulse train whose modulation results in the average value of the pulse sequence.
Therefore,
Duty cycle = (Ton/T) x 100 percentage
where Ton = ON time and T = period

PWM IN PIC MICROCONTROLLER

PIC18F4550 devices all have two CCP (Capture/Compare/PWM) modules. Each module
contains a16-bit register, which can operate as a 16-bit capture register, a 16-bit compare
register or a PWM master/slave duty cycle register which is primarily controlled by timers
modules.

28
OUTPUT:

PWM SIGNALS WITH DIFFERENT DUTY CYCLES:

PWM SIGNAL WITH 25% DUTY CYCLE

PWM SIGNAL WITH 50% DUTY CYCLE

29
• CCP Module CCP stands for capture/compare and PWM. CCP module is a hardware
module inside the PIC microcontroller helps to trigger events based on time.
• Capture mode allows us a duration based timing of an event. This circuit gives
information regarding the current state of a register which constantly changes its
value. In this case, it is the timer TMR1 register.
• Compare mode compares values contained in two registers at some point. One of
them is the timer TMR1 register. This circuit also allows the user to trigger an
external event when a predetermined amount of time has expired.
• PWM module generates the rectangular pulses whose duty cycle and frequency can be
varied by altering the PWM registers. Here in PIC18F4550, Port C pins RC1 and RC2
acts as PWM output pins.

PWM operation steps


Following steps are needed to setup the PWM module in PIC18F4550.
1. Set the PWM Period
2. Set PWM duty cycle
3. Output pin configuration
4. Presacral value and timer configuration
5. PWM Module configuration
Switch 1: To increase the Duty Ratio of PWM produced by CCP1
Switch 2: To decrease the Duty Ratio of PWM produced by CCP1
Switch 3: To increase the Duty Ratio of PWM produced by CCP2
Switch 4: To decrease the Duty Ratio of PWM produced by CCP2

Interpretation of important
codesPWM1_Init (5000):
There are two CCP modules inside PIC16F877A. Our program is manipulating the 1st
module, thus „PWM1′ is used here. „_Init‟ means initializing the PWM1 for 5KHz.
PWM1_Start ():
Start PWM1 signal.
PWM1_Set_Duty(duty1):
Set current duty cycle for PWM1, using this code we are varying the pulse width.

30
PROGRAM

In this program two input switches are used to control the Duty cycle of PWM signal. S1 for
increasing duty cycle and S2 for decreasing the same. Frequency of PWM signal is set to
5KHz [cc lang=”C”]

void main ()
{
short duty1 = 16; // initial value for Duty cycle
TRISD = 0xFF; // Set PORTD as input
TRISC = 0x00; // Set PORTC as output
PWM1_Init (5000); // Initialize PWM1 for 5Kh
PWM1_Start (); // start PWM1
PWM1_Set_Duty(duty1); // Set current duty for PWM1

while (1) // endless loop


{
if (PORTD.F0==0) //Checking the button pressed or not
{
Delay_ms (1);
duty1++; // increment duty cycle
PWM1_Set_Duty(duty1); //Change the duty cycle
}
if (PORTD.F1==0) // Checking the button pressed or not
{
Delay_ms (1);
duty1–; // decrement duty cycle
PWM1_Set_Duty(duty1);
}
Delay_ms(10);
}
}

31
RESULT:
Thus, the generation of internal PWM with CCP register with fixed duty cycle of 25%, 50%,75%
and 100% from PIC microcontroller was successfully completed. The output was thus verified and obtained.

32
Ex No: 8
DATE:

Generation of Sine-PWM pulses for a single and three phase Voltage Source
Inverter with control of modulation index using PWM peripheral of microcontroller

AIM:

To simulate the three phase PWM inverter using MATLAB/SIMULINK software.

SOFTWARE REQUIREMENTS:
1. MATLAB/SIMULINK software

THEORY:
Pulse width modulated (PWM) inverters are among the most used power-electronic circuits
in practical applications. These inverters are capable of producing ac voltages of variable
magnitude as well as variable frequency. The quality of output voltage can also be greatly
enhanced, when compared with those of square wave inverters discussed in Lesson-35.The
PWM inverters are very commonly used in adjustable speed ac motor drive loads where one
needs to feed the motor with variable voltage, variable frequency supply. For wide variation
in drive speed, the frequency of the applied ac voltage needs to be varied over a wide range.
The applied voltage also needs to vary almost linearly with the frequency. PWM inverters
can be of single phase as well as three phase types. Their principle of operation remains
similar and hence in this lesson the emphasis has been put on the more general, 3-phase type
PWM inverter.
There are several different PWM techniques, differing in their methods of implementation.
However in all these techniques the aim is to generate an output voltage, which after some
filtering, would result in a good quality sinusoidal voltage waveform of desired fundamental
frequency and magnitude.
The SPWM technique treats each modulating voltage as a separate entity that is compared to
the common carrier triangular waveform. A three-phase voltage set (Va, Vb, and Vc) of
variable amplitude is compared in three separate comparators with a common triangular
carrier waveform of fixed amplitude as shown in the same figure. The output (Vao, Vbo, and
Vco) of the comparators form the control signals for the three legs of the inverter composed
of the switch pairs (S1, S4), (S3,S6), and (S5,S2), respectively. From these switching signals
33
PWM SIGNAL GENERATION

34
and the DC bus voltage, PWM phase-to-neutral voltages (Van, Vbn, and Vcn) are obtained.
In the Simulink model, the simulation is performed under the following conditions:

a. Generation of PWM signal

b. Switching pulses for inverter switches:

35
OUTPUT CURRENT WAVEFORMS

OUTPUT VOLTAGE WAVEFORMS

36
c. SPWM Technique:
SPWM techniques are characterized by constant amplitude pulses with different duty cycles
for each period. The width of these pulses are modulated to obtain inverter output voltage
control and to reduce its harmonic content. Sinusoidal pulse width modulation is the mostly
used method in motor control and inverter application. In SPWM technique three sine waves
and a high frequency triangular carrier wave are used to generate PWM signal. Generally,
three sinusoidal reference waves are used for three phase inverter. The sinusoidal waves are
called reference signal and they have 1200 phase difference with each other. The frequency
of these sinusoidal waves is chosen based on the required inverter output frequency (50/60
Hz). The carrier triangular wave is usually a high frequency (in several KHz) wave.
The switching signal is generated by comparing the sinusoidal waves with the triangular
wave. The comparator gives out a pulse when sine voltage is greater than the triangular
voltage and this pulse is used to trigger the respective inverter switches. In order to avoid
undefined switching states and undefined AC output line voltages in the VSI, the switches of
any leg in the inverter cannot be switched off simultaneously. The phase outputs are mutually
phase shifted by 1200 angles. The ratio between the triangular wave & sine wave must be an
integer N, the number of voltage pulses per half-cycle, such that, 2N= fc/fs.

PROCEDURE:
1. In MATLAB software open a new model in File->New->model.
2. Start SIMULINK library browser by clicking the symbol in toolbar
3. And Open the libraries that contain the blocks you will need. These usually will include the
sources, sinks, math and continuous function block and possibly other.
4. Drag the needed blocks from the library folders to that new untitled Simulink window. You
must give it a name using the Save As menu command under the File menu heading. The
assigned filename is automatically appended with an mdl extension.
5. Arrange these blocks in orderly way corresponding by MATLAB Model.
6. Interconnect the blocks by dragging the cursor from the output of one block to the input of
another block.
7. Double click on any block having parameters that must be established and set these
parameters.

37
SIMULINK MODEL OF THREE PHASE PWM INVERTER:

SUBSYSTEM OF PWM GENERATION

38
INPUT VOLTAGE WAVEFORM THREE PHASE INVERTER

OUTPUT VOLTAGE WAVEFORM THREE PHASE INVERTER

39
8. It is necessary to specify a stop time for the simulation; this is done by clicking on
the simulation parameters entry on the simulation-> parameters entry on the
simulation toolbar.
9. Press start icon to start the simulation. After simulation is done, double click the
scope block to display the output. Click the auto scale icon in the display window to
scale the axis as per variable range.
10. Finally Save the Output.

RESULT:
Thus, the generation of PWM with CCP registers with variable duty cycle that varies
depending on the ADC input from POT in PIC micro controller was successfully completed.
The output was thus verified and obtained.

40

You might also like