Microprocessors & Microcontrollers

Aurabindo J
[email protected] Class of 2013, Dept. of Electrical & Electronics Engg., Government Engineering College - Thrissur

February 15, 2012

About the Book

This book is specially written for the use of students of the Calicut University, compliant with the latest syllabus revision 2009, for the course EE09-601 MICROPROCESSORS & MICROCONTROLLERS. If you feel there is something lacking in this book, please let us know, or contribute yourself and be a part of this project. The sources are kept at my Github repository http://github.com/aurabindo/mp-and-mc-book

The rst chapter is not in the syllabus. But you should be thorough with that part if you want the upcoming chapters to really make some sense. If you plan to skip the rst part, then there is no special benet you get out of this book. Happy reading!!!

Copyright c 2012 Aurabindo J This book is a free software, released under the GNU Free Documentation License (GNU FDL). It is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU FDL terms at www.gnu.org/copyleft/fdl.html for more details.

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Contents
About the Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 An informal Introduction 1.1 Microprocessors and Microcontrollers 1.2 How does a processor work ? . . . . . 1.2.1 Instruction Code Formats . . . 1.3 A Simple Computer . . . . . . . . . . 1.3.1 Instruction Fetch Cycle . . . . 1.3.2 Execution of Instructions . . . 1.3.3 Design of computer . . . . . . Architecture of Intel 8086 & Pentium Assembly Language Programming Interfacing Peripherals with 8086 The Intel 8051 Microcontroller i 1 1 2 2 3 5 6 8 11 13 15 17

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Chapter 1

An informal Introduction
Youve been hearing the word microprocessor for quiet a long time. Before we move on, i would like to quote that, microprocessors are the most complex thing mankind has ever made. If you were to represent the circuit diagram of a modern desktop processor like the Intel Core i7 on an A4 sheet, on a scale of 10 transisitors per page, youll need more than 20 million sheets!!! To be precise, there are 2.27 billion transisitors, and that too in 434 mm2 of area! The total population of the world is 7 billion. Not bad, the transisitor is closing in :-) Even the whole blueprint of burj khalifa wouldnt take more that 500 sheets! Look around you. Try to enumerate a few things that didnt need any help of a microprocessor to make it look like the way it is. In almost everything you see, hear or use, is associated with a processor - whether directly or indirectly. That means living in a world without a microprocessor is same as living in the stone age! There is a one-liner which says, Behind every successful man, there is a lady. Now, I would like to make a small change to it: Behind every success, there is a processor!!! :-P Now that processor based systems are inevitable part of our lives, its a shame if we know nothing much in detail about it. There is a signicant dierence between a pure electrical system, like a machinery, and a microprocessor (obviously, not the way you thought :-P). Consider the old days when Faraday invented that a moving coil in a magnetic eld created an EMF. Even if Faraday didnt invent that, that magnetic led will denitely produce EMF in that coil. But the processor, on the other hand, was totally created by humans. That means if someone didnt invent it, then someone else must have invented it. Else, it wont exist today. What i mean is that this little complex thing was created by humans, and if you can learn all those complex stu that the humans didnt create, then you can easily learn what a human created!

1.1

Microprocessors and Microcontrollers

Before you start leanring about p and c, you should know the dierece between a controller and a processor. You already know what a microprocessor is the ones like Intel Core i7 , AMD Athlon, etc. To understand what a microcontroller is, consider the components inside a CPU. There is a motherboard which holds the important components like RAM, processor, BIOS, various ports for input & output, etc. So, if core i7 is the microprocessor, then the motherboard is the microcontroller. But, a motherboard is never called a microcontroller, as it is much more complex and general purpose thing. So when we call something a microcontroller, it will be very small, and its capabilities will be very much limited and xed. To make it clear, a microcontroller is a system comprising of a microprocessor, the primary memory (similar to RAM), a rmware (similar to BIOS), some input/output pins (similar to ports like USB, VGA, etc), and many other 1

CHAPTER 1. AN INFORMAL INTRODUCTION

additional stu (Analog to Digital Converters, etc.), on a single platform, say an IC (similar to the PCB of the motherboard).

The Pre-Requisites
Inorder to learn how a p works, you just need to know some digital electronics stu like ip ops, various types of registers (parallel load, shift, counter, etc.). For a reference, use Digital Logic & Computer Design, Computer System Architecture both by Morris Mano and Computer Organization & Design by Patterson & Hennesey.

1.2

How does a processor work ?

Considering the complexity of a modern computer, its hard to explain how your Core i7 works at this point. So, well rst see the working of a really basic p. You know very well that a p understands nothing other than a 0 & 1. Yet it manages to do all those complex stu. The key concept behind thes working is its ability to treat a group of bits as instruction or data. The instruction tells the p what it should do whether to do an arithmetic operation, a logic operation, a memory read/write operation, power o, or even a do nothing. The same instruction may tell the p to treat a group of bits as data and operate on them. In essence, the only thing (this) p does is, it continuously fetches some binary data from memory (which will be treated as instruction), decodes it so as to understand what to do next, and then executes it. It does this in sequence, not everything together. First it will read the instruction from memory. It will then decode. At this point, it will understand whether it has to fetch more bits, or to execute the instruction. After it nishes the execution, it will then go to the next memory location to fetch the next group of bits, which will be treated as instruction. Consider a computer that has 1000001010 stored in the very rst address of the memory location 0000. The former is called the instruction code. Consider that this instruction performs an addition of two numbers stored in two register. So when the computer starts, it fetches the bits at 0000. Basically, the group of fetched bits have two parts The Operation Code or the OpCode and Data. This data may be considered as an operand or the address of an operand. In the example code, the rst 4 bits, 1000 is the OpCode. The subsequent group of 3 bits, 001 and 010 are called operands. Here, the OpCode species the ADD instruction. The operands 001 and 010 will represent two registers, A (the accumulator) and B (a general purpose register). In short, the above instruction is similar to ADD B instruction in 8085.

1.2.1

Instruction Code Formats

The instructions in a p can be classied on dierent basis. Basically, we can classify them into 3 categories: Operation Code Operation Code Operation Code Operand Address of Operand (a) Implied (b) Immedeate Operand (c) Direct Address

1.3. A SIMPLE COMPUTER

Examples from 8051 for the implied categories include HLT, XCHG. As they dont need any further information like additional operands, they can easily t inside a 1 byte instruction code. Consider the instruction MVI A, 05h. This might need more space to accomodate all the information. MVI might be represented by 01010, A by 000 and 05h by itself (00000101). So, it takes excatly 16 bits. Hence, its a 2 byte instruction. Consider LDA 2500h. LDA takes 5 bits, and it accomodates the remaining 16 bits of 2500h in the next 2 locations of 1 byte each. Hence, its a 3 byte instruction.

1.3

A Simple Computer

The processor core of a computer is having a lot of registers. They may be general purpose register, that the users (programmers) can read and write, or special registers that only the processor can access. We shall see some of the basic registers found in all processors. Program Counter Its simlpy a counter. It is perhaps the most important part of the computer. It initiates the fetch operation. While the computer is powered on, PC is reset to a default value, which vary with processors, say 0000. The fetching circuit takes this output of PC and goes to that memory location. At the end of a fetch cycle, PC will be incremented. After executing the current instruction, the fetch circuit again does the same thing fetches the next group of bits at the address specied by PC and this cycle continues. It is mandatory that the next clock tick arrives only AFTER the current operation is complete. Else, you wont get the expected result as the next execution may depend on the vaules of the current execution. The tiny elementary operations that a p can do are called micro operations. A group of such operations that do complete a basic operation, like reading from memory, writing to memory, etc. is called a macro operation. The number of clock cycles taken to fetch, decode, execute and store is called a machine cycle. A note for the Geeks: You might have heard of processor overclocking. The maximum clock speed you can run your p is the value limited by the time it takes to complete one such cycle as mentioned above. So if you increase the clock frequency too much, it will trigger an operation before an ongoing operation is completed. This can have very adverse eects on the system, as the operation being read cannot be predicted. In fact, it can be anything. It may be corresponding to a memory erase operation. And if that happens to be on your Master Boot Record, then, Govinda!!!. It can even burn out the processor, as overclocking is done by increasing the processor supply voltage. Then, Gooovindaaa!!! :-P Memory Address/Buer Register Memory Opeartions are the basic things any computer should do. For this purpose, there are two register, MAR and MBR. During a read operation, the address that should be read is sent to the MAR. The MBR will hold the contents of the memory word read from or written into memory. Instruction Register When an instruction is read from the memory, it is rst placed in the MBR and later to the IR. It decodes the OpCode of the instruction and provides a unique output for each instruction, similar to the one hot assignment in sequential circuit design using state diagrams. Thus if q1 = 1 if the OpCode is equivalent to binary 1, q2 = 1 if OpCode is binary 2, and so on.

4 Timing Counter

CHAPTER 1. AN INFORMAL INTRODUCTION

This is an important component of a computer, but this is inaccessible to the programmer. It synchronizes the fetch, decode and execute cycles of the p with the clock pulse. The clock pulse of a digital system is like what the heart beat is, for a human. From the input clock pulse, a set of phase shifted clock pulses are derived as shown in the gure. Each ouput of the derived clock pulse will be connected to a particular circuit which does a particular micro operation. Registers There will be a lot of general & special purpose registers in a p. One such special register is the Accumulator, usually denoted as A. There may be other registers, like R,B, etc.

Figure 1.1: Timing Signals from Clock Pulses The simple computer shown contains a memory unit, 7 registers & 2 decoders. The memory unit stores an 8 bit data in a particular address. Even though all the data is stored in the memory, all the processing happens in the registers. The PC, IR, & T are the part of the control unit. IR recieves the OpCode of instructions. The decoder supplies one output for each operation. The T counter is also decoded to supply eight timing variables t0 thro t7 similar to the above gure. This counter is incremented every clock pulse (edge triggered). It can also be cleared at any time by the processor to start a new cycle. The PC goes thro a step-by-step counting sequence and causes the computer to read successive instructions previously stored in memory. The PC always holds the address of the next instruction in memory. To read an instruction, the contents of PC are transferred into MAR and a memory-read cycle us initiated. The PC is then incremented by 1 so that it holds the next address in the sequence of instructions. An OpCode read from memory into MBR is then transferred into IR. If the memory-address part of an instruction is read into MBR, this address is transferred into MAR to read the operand. Thus, MAR can recieve address either from PC or from MBR.

1.3. A SIMPLE COMPUTER

Figure 1.2: Overview of a simple computer

1.3.1

Instruction Fetch Cycle

The PC must be intialzed to contain the rst address of the program stored in memory. Every processors have a Power On Reset that initializes the registers in it to some default value. When a Start switch is activated, the computer sequence follows a basic pattern. An OpCode whose address is in PC is read from memory into MBR. The PC is incremented by 1 to prepare it for the next address in sequence. The OpCode is transferred from MBR to IR, where it is decoded. This sequence is called the instruction fetch cycle, since it fetches the OpCode from memory and places it in a control register. In this example, the timing variables t0 , t1 and t2 , out of the timing decoder are used as control functions to sequence the microoperations for reading an OpCode and place it into IR. Its representation, called Register Transfer Language (RTL) is shown below: t0 : t1 : t2 : MAR PC MBR M, PC PC + 1 IR MBR Transfer OpCode Address Read OpCode, Increment PC Transfer OpCode to IR

The timing counter T will start from the value 000 which produces a t0 timing variable. The T register is incremented with every clock tick and automatically produces the next timing variables, t1 , t2 , t3 , etc. in sequence. The rst three timing variables execute the microoperation sequence which may be symbolized

6 with the macrooperation statement

CHAPTER 1. AN INFORMAL INTRODUCTION

IR M[PC], PC PC + 1 . This states that the memory word specied by the address in PC is transferred into IR and then the PC is incremented. The hardware constraint in the simple computer is that only MAR and MBR can access the memory. Since PC and IR cannot communicate directly with the memory, the above microoperation must be executed with a sequence of 3 microoperations. Another hardware constraint is that PC cannot be incremented when its value is being used to supply the address for a memory read. By transferring the contents of PC into MAR, the PC can be incremented while the memory reads the word addressed by MAR. The fetch cycle is common to all instructions. This means that whenever a timing variable, t0 through t2 are in action, it will be a fetch cycle. The microoperations and control functions that follow the fetch cycle are determined in the control section from the decoded OpCode. This is available as outputs qi , where i = 1, 2, 3, .... The 8085 has 246 instructions. Hence, the it internally has the decoded outputs q1 through q246 . Latest x86 architectures have well above 1000 instructions.

1.3.2

Execution of Instructions

Execution start from the timing variable t3 , during which, the OpCode in IR and one output of the operation decoder is equal to 1. The control uses the qi variables to determine the next microoperations in sequence. Let MOV R instruction has an OpCode that makes q1 = 1. The execution of this instruction requires the microoperation: q1 t3 : A R, T 0 Thus when q1 = 1 at time t3 , the contents of R are transferred into register A and the timing register T is cleared. by clearing T, the control goes back to the fetch cycle again to read the next instruction. Remember that PC was incremented during time t1 so that it now holds the address of the very next instruction in sequence. Now lets see how the LDI instruction is implemented. In 8 bit processors (like 8085), this instruction is stored by using two consecutive locations. (Refer section 1.2.1 for more on instruction size and representation). Assume that this instruction is stored in memory like shown below: Memory Address 01256 01257 01258 01259 01260 01261 01262 01263 Data . .. ... 00010000 11001010 ... .. .

The LDI OPRD instruction has an OpCode that makes q2 = 1. The microoperations that execute this instruction are: q2 t3 : q2 t4 : q2 t5 : MAR PC MBR M, PC PC + 1 A MBR, T 0 Transfer OpCode Address Read Operand, Increment PC Transfer Operand, go to fetch cycle

1.3. A SIMPLE COMPUTER

The rst two microoperations are excatly the same for a fetch operation, since this instruction wants to get the operand which is stored in the very next address. But the condition on the left side is dierent. Here, the value read from memory is considered as data. But in a fetch cycle, it was considered as an instruction and was transferred to IR. This time, it is transferred to the register A, as that is what LDI is supposed to do. Now the instruction is completely executed and therefore, the timing register has to be cleared so as to start the next fetch cycle. Again, note that PC was incremented during q2 t4 so that the current value in PC is that of the next instruction in sequence. Now lets see how a 3 byte instruction (Indirect Addressing) is implemented. Consider LDA ADRS . This instruction has an OpCode which makes q3 = 1. The required microoperations are: q3 t3 : q3 t4 : q3 t5 : q3 t6 : q3 t5 : MAR PC MBR M, PC PC + 1 MAR MBR MBR M A MBR, T 0 Transfer OpCode Address Read Address of Operand, Increment PC Transfer Operand address Read operand Transfer Operand to A, go to fetch cycle

The address of the operand, symbolized by ADRS, is place in memory right after the OpCode. As PC was incremented during fetch cycle, it now holds the address of the operand we need. After microoperations during t4 , we get the address of the operand that is to be transferred to A. This address has to be given to the MAR again so that the memory puts the actual operand we need into MBR. We now have to increment PC so that it will point to the next instruction in the memory during the upcoming fetch cycle. Now the nal value from MBR is transferred to the A register to complete the instruction. The timer is now cleared, which initiates the next fetch cycle when t0 arrives. The control functions and microoperations for the simple computer are summarized in table 1.1. The rst 3 timing variables constitute the fetch cycle which reads the OpCode into IR. The microoperations executed during t3 depends on the OpCode value in IR. Either q1 ,q2 or q3 can only be 1 at a time. Hence, only one of q1 t3 , q2 t3 or q3 t3 will occur at a time, since the control function is q x logical AND t3 . FETCH t0 : t1 : t2 : q1 t3 : q2 t3 : q2 t4 : q2 t5 : q3 t3 : q3 t4 : q3 t5 : q3 t6 : q3 t7 : MAR PC MBR M, PC PC + 1 IR MBR A R, T 0 MAR PC MBR M, PC PC + 1 A MBR, T 0 MAR PC MBR M, PC PC + 1 MAR MBR MBR M A MBR, T 0

MOV LDI

LDA

Table 1.1: Register-transfer statements for simple computer

CHAPTER 1. AN INFORMAL INTRODUCTION

1.3.3

Design of computer

A practical computer has many instructions. The one we are discussing is obviously not pretty useful, but by using only 3 instructions, the basic function of a digital computer can be clearly demonstrated. The list of microoperations species the types of registers and associated digital functions that must be incorporated in the system. The rst step in the design is to scan the RTL listed in Table 1.1 and retrieve all the statements that perform the same microoperation on the same register. For example, MAR PC is listed for t0 , q2 t3 , and in q3 t3 . These 3 lines are combined into one statement:

t0 + q2 t3 + q3 t3 : MAR PC

A control function is a boolean function. The + between te control functions denotes a Boolean OR operation and its absence denotes an AND operation. The hardware implementation uses the simplied equations: t0 + (q2 + q3 )t3 . The binary variable x1 is applied to the load input of MAR and the outputs from PC are applied to the inputs of MAR. When x1 = 1, the next clock pulse transfers the contents of PC to MAR. The binary variables that causes x1 to be 1 comes from the operation and timing decoders in the control unit. There are a total of 8 distinct microoperations for this computer. For each microoperation, the associated control functions are accumulated and ORed together as shown below:

x1 x2 x3 x4 x5 x6 x7 x8

= t0 + q2 t3 + q3 t3 : = q3 t5 : = t1 + q2 t4 + q3 t4 : = x3 + q3 t4 : = q2 t5 + q3 t7 : = q1 t3 : = x5 + x6 : = t2 :

MAR PC MAR MBR PC PC + 1 MBR M A MBR AR T0 IR MBR

Table 1.2: Hardware specications for a simple computer

See the gure in the next page, which shows the overall organization of all the stu discussed above. Thatall you need to know about how a p works. The one we will be dealing about in the coming chapter is a very complex one compared to this example. As now you are in a position to understand how it might work, we are ready to jump into the classic 8086!!!

1.3. A SIMPLE COMPUTER

Figure 1.3: Overview of a simple computer

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CHAPTER 1. AN INFORMAL INTRODUCTION

Chapter 2

Architecture of Intel 8086 & Pentium

This chapter explains the overall architecture of the Intels 8086 and Pentium processors, its operations and the interrupts in 8086. TO DO

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CHAPTER 2. ARCHITECTURE OF INTEL 8086 & PENTIUM

Chapter 3

Assembly Language Programming

TO DO

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CHAPTER 3. ASSEMBLY LANGUAGE PROGRAMMING

Chapter 4

Interfacing Peripherals with 8086

TO DO

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CHAPTER 4. INTERFACING PERIPHERALS WITH 8086

Chapter 5

The Intel 8051 Microcontroller

TO DO

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