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    Fetch / Execute Cycle

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    azhi
    The document discusses the fetch-execute cycle in a central processing unit (CPU). It involves 5 steps: 1) instruction fetch, 2) instruction decode, 3) data fetch/operand fetch, 4) instruction execution, and 5) result return/store. Registers like the program counter, instruction register, and memory address register are involved in fetching and decoding instructions from memory addresses and executing the appropriate operations in the arithmetic logic unit. Jump instructions can change the normal sequential execution by copying a new instruction address into the program counter.

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    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd

    Fetch / Execute Cycle

    Uploaded by

    azhi
    367 views19 pages
    The document discusses the fetch-execute cycle in a central processing unit (CPU). It involves 5 steps: 1) instruction fetch, 2) instruction decode, 3) data fetch/operand fetch, 4) instruction execution, and 5) result return/store. Registers like the program counter, instruction register, and memory address register are involved in fetching and decoding instructions from memory addresses and executing the appropriate operations in the arithmetic logic unit. Jump instructions can change the normal sequential execution by copying a new instruction address into the program counter.

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    fetch / execute cycle

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    fetch / execute cycle

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    The document discusses the fetch-execute cycle in a central processing unit (CPU). It involves 5 steps: 1) instruction fetch, 2) instruction decode, 3) data fetch/operand fetch, 4) instruction execution, and 5) result return/store. Registers like the program counter, instruction register, and memory address register are involved in fetching and decoding instructions from memory addresses and executing the appropriate operations in the arithmetic logic unit. Jump instructions can change the normal sequential execution by copying a new instruction address into the program counter.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    367 views19 pages

    Fetch / Execute Cycle

    Uploaded by

    azhi
    The document discusses the fetch-execute cycle in a central processing unit (CPU). It involves 5 steps: 1) instruction fetch, 2) instruction decode, 3) data fetch/operand fetch, 4) instruction execution, and 5) result return/store. Registers like the program counter, instruction register, and memory address register are involved in fetching and decoding instructions from memory addresses and executing the appropriate operations in the arithmetic logic unit. Jump instructions can change the normal sequential execution by copying a new instruction address into the program counter.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 19

    COMPUTER APPLICATION FOR BUSINESS

    UNIVERSITY OF HUMAN DEVELOPMENT


    COMPUTER SCIENCE DEPARTMENT
    COMPUTER ARCHITECTURE

    FETCH/ EXECUTE CYCLE


    Azhi A. Faraj
    Instruction
    22

    Instruction is command given to the computer processor


    typical instruction consists of two parts: Opcode and Operand

    Opcode or operational code is the instruction applied. It can


    be loading data, storing data etc

    Operand is the memory register or data upon which instruction


    is applied.
    Example
    ADD 12,1
    MOV FA,02
    The registers
    3

    A register is simply an area of the processor that stores specific data.


    There are several special registers that play a very specific role in
    regarding the fetch decode execute cycle

    Register Purpose
    PC program counter Holds the address of the next instruction to be
    carried out

    IR - instruction register Holds the instruction that is being executed as it is


    being carried out

    MAR memory address register Holds the address in memory that is currently
    being used

    MDR memory data register Holds the data or instructions that is being stored
    in the address accessed by the MAR

    Accumulator Holds results of processing


    The Fetch/Execute Cycle
    A five-step cycle:
    1. Instruction Fetch (IF)
    2. Instruction Decode (ID)
    3. Data Fetch (DF) / Operand Fetch (OF)
    4. Instruction Execution (EX)
    5. Result Return (RR) / Store (ST)
    ADD 800, 428, 884

    ADD the values found in memory locations 428 and 884 and
    store the result in location 800
    Instruction Fetch (IF)
    Execution begins by moving the instruction at the
    address given by the PC (PC 2200) from memory to the
    control unit

    Bits of instruction are placed into the decoder circuit of


    the CU

    Once instruction is fetched, the PC can be readied for


    fetching the next instruction
    Instruction Fetch

    ADD 800, 428, 884


    Instruction Decode (ID)
    Decoder finds the memory address of the instruction's
    data (source operands)
    Most instructions operate on two data values stored in memory
    (like ADD)
    These addresses are passed to the circuit that fetches them from
    memory during the next step

    Decoder finds the destination address and places the


    address

    Decoder determines what operation the ALU will perform


    (ADD), and sets up the ALU
    Instruction Decode

    + ADD 800 428 884


    Data Fetch (DF)
    The data values to be operated on are retrieved from
    memory

    Bits at specified memory locations are copied into


    locations in the ALU circuitry

    Data values remain in memory (they are not destroyed)


    Data Fetch

    42

    12
    Instruction Execution (EX)
    For this ADD instruction, the addition circuit adds the two
    source operands together to produce their sum

    Sum is held in the ALU circuitry

    This is the actual computation


    Instruction Execution (EX)

    54
    Return Result (RR)
    RR returns the result of EX to the memory location
    specified by the destination address.

    Once the result is stored, the cycle begins again


    RR

    54
    Example of Program Execution
    16

    Instruction Format

    Internal CPU Registers

    List of Opcodes
    Example of Program Execution
    17
    Jump instructions
    18

    Imagine we had the instructions 1,2, 3, 4, 5, 6 etc. The


    computer would normally start at instruction 1 and then go to
    instruction 2 etc

    What
    A JUMP instruction tells the CPU to jump to a specific instruction out of sequence

    How a JUMP instruction works


    It will tell the CPU the address of the new instruction is stored so it can go and fetch
    it. To do this it:

    1. The address part of the instruction from the IR is copied into the PC
    2. This means the address in the PC is the address of the new instruction
    Jump Instruction
    When the jump Central Processing Unit
    instruction is being
    executed: Control Unit

    The address part of the ALU


    PC 00110
    instruction from the IR Accumulator
    is copied into the PC
    IR 001 00110

    This means the address


    in the PC is the address
    of the new instruction MAR

    MDR 00100110

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