This document discusses various second order effects and short channel effects in MOSFET transistors that degrade device performance as transistors are scaled down. It defines and describes subthreshold leakage current, body effect, channel length modulation, drain induced barrier lowering, hot carrier injection, impact ionization, avalanche breakdown, velocity saturation, surface scattering, punch through, and gate induced drain leakage. These effects complicate device operation but can be minimized in SOI and FinFET technologies which have different constructions than planar MOSFETs.
This document discusses various second order effects and short channel effects in MOSFET transistors that degrade device performance as transistors are scaled down. It defines and describes subthreshold leakage current, body effect, channel length modulation, drain induced barrier lowering, hot carrier injection, impact ionization, avalanche breakdown, velocity saturation, surface scattering, punch through, and gate induced drain leakage. These effects complicate device operation but can be minimized in SOI and FinFET technologies which have different constructions than planar MOSFETs.
This document discusses various second order effects and short channel effects in MOSFET transistors that degrade device performance as transistors are scaled down. It defines and describes subthreshold leakage current, body effect, channel length modulation, drain induced barrier lowering, hot carrier injection, impact ionization, avalanche breakdown, velocity saturation, surface scattering, punch through, and gate induced drain leakage. These effects complicate device operation but can be minimized in SOI and FinFET technologies which have different constructions than planar MOSFETs.
This document discusses various second order effects and short channel effects in MOSFET transistors that degrade device performance as transistors are scaled down. It defines and describes subthreshold leakage current, body effect, channel length modulation, drain induced barrier lowering, hot carrier injection, impact ionization, avalanche breakdown, velocity saturation, surface scattering, punch through, and gate induced drain leakage. These effects complicate device operation but can be minimized in SOI and FinFET technologies which have different constructions than planar MOSFETs.
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Presentation On Second Order
Effects and Short Channel effects
Contents
Second order effects and short channel effects.
Second order effects
Effects due to parameters, concentration of doping, oxide t
hickness, channel length variation, high electric field intens ity inside the device channel, oxide breakdown, avalanche breakdown of the pn regions inside the MOS transistors co mes under second order effects. Second Order Effects Subthreshold leakage current Body Effect Channel length modulation DIBL(Drain induced barrier lowering) Hot carrier injection Impact ionization Avalanche breakdown Velocity saturation (mobility degradation) Surface scattering Punch through Gate Induced Drain Leakage Subthreshold leakage current The current between source and drain of a mosfet, when th e transistor is in the weak inversion region, i.e for gate to sour ce voltages below the threshold voltage is called subthreshold leakage current. In lower channel devices, due to space between source an d drain is less, there is more drift current flows under the gate . Gradually this subthreshold current will increase. And it is inversely proportional to channel length and prop ortional to the drain voltage and temperature. Subthreshold leakage current Body Effect Channel length modulation In mosfet, at pinch off region, drain curr ent depends on the more electrical field and also depends on the depletion region where it opposes the drain current. Since depletion region increases, we should have a constant current if Vds increases. But if we comes to lower channel devices, where electric field due to drain voltage dominates the depletio n width opposition current, so more drain c urrent flows. This we called as channel leng th modulation effect. The channel length m odulation factor is lambda and it is inversel y proportional to channel length. Channel lenght modulation DIBL(Drain induced barrier lowering) When drain voltage is more than bulk potentials, due to its r everse biased depletion region, it occupies some part of space in c hannel. So we need little less gate voltage required to invert the re maining channel to turn mosfet ON. So Vt is decreased. This effect can be reduced by changing doping concentrati on of either bulk or drain. And by inserting a low doped n material before the drain. Hot carrier injection This effect occurs when more drain voltage in short channel dev ices. More drain voltage generates the more electic field so that it a ttracts the more electrons from the source and those electrons will r each its maximum velocity and it gets more kinetic energy. The el ectron which gets more kinetic energy called as hot electron. This hot electron collide at the edge of the drain or gate and reflect back and damages the gate oxide which is near to the drain region. If gat e oxide damages then direct current flows from gate to substrate. T his iscalled as hot carrier injection. This can be avioded by using increasing the gate oxide thickness or using high k-materials as a gate oxide. And inserting a low dope d n material before the drain. Impact Ionization
This effect is related to hot carrier effect. T
he hot electron which is reflected from drain also breaks the covalent bonds in depletion re gion. If covalent bond breaks then one electr on and one hole will be generated. If more co valent bond breaks, more free electrons will be collected by drain. Therefore extra unwant ed current Ids flows from source to drain thro ugh substrate . This is called impact ionizatio n effect. If we able to control or decrease the hot carrier effect, impact ionization effect al so decreases. Avalanche Breakdown As the electric field in the channel is increased, avalanche breakdown occurs in th e channel at the drain. This avalanche breakdown increases the current as in a p-n di ode. There is parasitic bipolar action taking place. Holes generated by the avalanche breakdown move from drain to source underneath the inversion layer. This hole curr ent forward biases the source-bulk p-n diodes so that now also electrons are injecte d as minority carriers into the p-type substrate underneath the inversion layer. Thes e electron-hole pairs through avalanche multiplication. The positive feedback betwe en and the parasitic bipolar action results in breakdown at lower drain voltage. As if we control hot carrier effect the avalanche breakdown can be avoided. Velocity Saturation and mobility degradation The electron velocity is related to the electric field through the mobility. For higher fields the velocity doesnot increase with ele ctric field, we have a degradation of mobility because of scatteri ng by vertical field. This leads to earlier saturation of current i.e before Vgs-Vth. Nothing but reduction in drain current. The velocity saturation reduces the transconductance of short c hannel devices in the saturation condition. By using k-materials as gate this can be avoided Velocity saturation Surface Scattering When the carriers travel along th e channel, they are attracted to the surface by the electric field create d by the gate voltage. As a result, they keep crashing and bouncing a gainst the surface, during their tra vel, following a zigzag path. This effectively reduces the surface mo bility of the carriers. This change i n carrier mobility impacts the curr ent-voltage relationship of the tran sistor. Drain Punch Through If Vds is goes on increasing, due to r everse biased pn junction at drain, it will have a significant widths of depletion re gion. Since the gap between the source and drain is very less, the depletion region o f drain will touch with the source depleti on region. If this happen once, the drain current between source and drain can't be contro l by the gate By changing doping concentration of drain or bulk punch through can be avoi ded Gate Induced Drain Leakage This issues comes only at gate voltage less than 0(let’s take for Nmos) and more drain voltage. Basically there is reverse saturation current flows between the drain and bulk (P) and it is very minor. When –ve gate voltage has applied (assume due to noise), it attracts the holes (due to accumulation) and forms the p channel (or P+) between the source and drain. At this case, the thinner depletion region will form between the generated P+ region and drain (N+). So Compare to P.N+ reverse saturation current, P+.N+ reverse saturation current is more and it is considerable leakage current. This leakage we call it as Gate induced drain leakage Conclusion
The second order effects complicates device operation and de
grade device performance, these effects can be eliminated or minimized in SOI and FINFET technology by its different co nstruction. References • https://www.allaboutcircuits.com/technical-articles/mosfe t-channel-length-modulation/ • http://www.onmyphd.com/?p=mosfet.short.channel.effects • http://www.iue.tuwien.ac.at/phd/gehring/node83.html • http://www.iue.tuwien.ac.at/phd/stockinger/node16.html • https://en.m.wikipedia.org/wiki/Short-channel_effect