VLSI DESIGN

MOS TRANSISTOR

1
 MOS Capacitor Structure
MOS capacitor • Most MOS devices today employ:
(cross-sectional view) o degenerately doped polycrystalline
Si (“poly-Si”) as the “metallic” gate-
electrode material
GATE - n+-type for “n-channel” transistors
- p+-type, for “p-channel” transistors
+
VG _ o SiO2 as the gate dielectric
Semiconductor
- band gap = 9 eV
- er,SiO2 = 3.9e0
o Si as the semiconductor material
- p-type, for “n-channel” transistors
- n-type, for “p-channel” transistors
 Bulk Semiconductor Potential, fF

• p-type Si: Ec

qfF
Ei
EF
Ev

• n-type Si:
Ec
EF |qfF|
Ei
Ev
Work Function

Built in potential difference across

the MOS system is

Flat band voltage is

 Accumulation
Electrons
accumulated at
Si surface

Depletion
Electrons depleted from
surface

Inversion
Surface inverted to p-type
Physical structure of the enhancement-type NMOS transistor

6
 MOS Transistors -
Types and Symbols

D D

G G

S S

NMOS Enhancement NMOS Depletion

D D

G G B

S S

PMOS Enhancement NMOS with

Bulk Contact
 Threshold voltage

(i) Work function difference between the gate and channel

(ii) Gate voltage component to change the surface potential
(iii) Gate voltage component to offset the depletion region charge
(iv) Voltage componebt to offset the fixed charges in the gate oxide

8
The Body Effect
L = 0.1 to 3 m cross-section.
Typically, W = 0.2 to 100 m, and the
thickness of the oxide layer (tox) is in
the range of 2 to 50 nm.

10
 Creating a Channel for Current Flow

N-channel MOSFET is formed in a p-type Gate voltage at which a sufficient

substrate: Channel created by inverting the number of mobile electrons
substrate surface from p type to n type. accumulate---- Threshold voltage Vt
Hence the induced channel is also called
an inversion layer.
11
 Applying a Small VDS
..

VDS causes a current lD to flow through source and drain. Conductance

of the channel is proportional to the excess gate voltage VGS above Vt

12
The iD–vDS characteristics of the MOSFET when the voltage applied
between drain and source, vDS, is kept small. The device operates
as a linear resistor whose value is controlled by vGS.

13
Operation as VDS Is Increased

 Channel depth depends on this voltage

 Channel is no longer of uniform depth;
 Channel will take the tapered form shown:
 Deepest at the source end and shallowest at the drain end.
 As VDS is increased, the channel becomes more tapered
. and its resistance increases correspondingly
14
15
 Derivation of the iD-VDS Relationship .

dq = -Cox(W dx)[vGS – v(x) - V t ]

_ dv(x)
E(x) =
dx

S
VGS VDS Electrtric field E(x) causes the
G
D
ID
electron charge dq to drift toward
n+ –
V(x)
+ n+ the drain with a velocity dx/dt
dx
= -n E(x) = n dv(x)
L x

p-substrate
dt dx

i = dq/dt = dq dx
B

MOS transistor and its bias conditions dx dt

i = - nCox W [ VGS – v(x) – Vt ] dv(x)
dx

Cox = ox/tox ox = 3.9 o =3.9 x 8.854 x 10-12 = 3.45 x 1016-11F/ m

 iDdx = nCoxW [VGS- Vt- v(x)] dv(x)
Integrating both sides of this equation from x= 0 to x=L
and, correspondingly, for v(0) = 0 and v(L)=vDS
v DS

L
 0
iDdx = nCoxW [VGS- Vt- v(x)] dv(x)
0

iD = (nCox)
W [ (V - Vt)VDS – 1/2 V2DS 
L
GS

At the beginning of the saturation region substituting VDS = VGS - V t ,

VGS

1 W 
i D   n C ox   v GS  V t 
2 VDS > VGS - VT
G

2  L  S
D

- +
n+ VGS - VT n+

17
 nCox is a constant determined by the process technology
used to fabricate the n-channel MOSFET. It is known as
the process transconductance parameter.
Denoted k'n and has the dimensions of A/V2
k'n = nCox
Aspect Ratio of the MOSFET

(Triode region)

(Saturation region)

Different notations: Kn, K'n n; C"ox Tox ; VT0,VTN,VTP;

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Current-Voltage Relation
-4
x 10
6
VGS= 2.5 V

Resistive Saturation
4
VGS= 2.0 V
Quadratic
ID (A)

3
VDS = VGS - VT Relationship

2
VGS= 1.5 V

1
VGS= 1.0 V

0
0 0.5 1 1.5 2 2.5
VDS (V)
Current-Voltage Relations
Long-Channel Device
A model for manual analysis
 Current-Voltage Relations:
Deep-Submicron FET
-4
x 10
2.5

VGS= 2.5 V
Early Saturation
2

VGS= 2.0 V
1.5
ID (A)

Linear
1
VGS= 1.5 V Relationship

0.5 VGS= 1.0 V

0
0 0.5 1 1.5 2 2.5
VDS (V)
Channel length modulation

23
Velocity Saturation

u n ( m /s)
usat = 105
Constant velocity

Constant mobility (slope = µ)

xc = 1.5 x (V/µm
Velocity Saturation

ID
Long-channel device

V =V
GS DD

Short-channel device

V V -V
DSAT GS T V DS
 ID versus VGS
-4
-4
x 10 x 10
6 2.5

5
2

4 linear
quadratic 1.5
I D (A)

ID (A)
3

1
2

0.5
1
quadratic
0 0
0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
VGS(V) VGS(V)

Long Channel Short Channel

 ID versus VDS

-4 -4
x 10 x 10
6 2.5
VGS= 2.5 V
VGS= 2.5 V
5
2
Resistive Saturation
4 VGS= 2.0 V
VGS= 2.0 V 1.5

ID (A)
ID (A)

3
VDS = VGS - VT 1 VGS= 1.5 V
2
VGS= 1.5 V
0.5 VGS= 1.0 V
1
VGS= 1.0 V
0 0
0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
VDS(V) VDS(V)

Long Channel Short Channel

 A unified model for manual analysis

S D

B
Simple Model versus SPICE
-4
x 10
2.5

VDS=VDSAT
2

Velocity
1.5
Saturated
ID (A)

Linear
1

VDSAT=VGT
0.5

VDS=VGT
Saturated
0
0 0.5 1 1.5 2 2.5
VDS (V)
 Subthreshold conduction

Slope factor (rate of decline of ID

wrt VGS below VT - mv/decade) 30
 A PMOS Transistor
-4
x 10
0
VGS = -1.0V

-0.2
VGS = -1.5V

-0.4
ID (A)

VGS = -2.0V
-0.6

-0.8 VGS = -2.5V

-1
-2.5 -2 -1.5 -1 -0.5 0
VDS (V)
 Transistor Model
for Manual Analysis
 The Transistor as a Switch
VGS  V T
Ron ID
V GS = VD D
S D
Rmid

R0

V DS
VDD/2 VDD
The Transistor as a Switch
5
x 10
7

5
Req (Ohm)

0
0.5 1 1.5 2 2.5
VDD (V)
The Transistor as a Switch