Micro Programmed Control
Micro Programmed Control
Micro Programmed Control
MICROPROGRAMMED CONTROL
• Control Memory
• Sequencing Microinstructions
• Microprogram Example
• Microinstruction Format
Microprogram
M Control Data
e
m
o IR Status F/Fs
r
y
C Control C
Next Address Storage C
S S D P CPU
Generation A (µ-program D
Logic s
R memory) R }
TERMINOLOGY
Microprogram
- Program stored in memory that generates all the control signals required
to execute the instruction set correctly
- Consists of microinstructions
Microinstruction
- Contains a control word and a sequencing word
Control Word - All the control information required for one clock cycle
Sequencing Word - Information needed to decide
the next microinstruction address
- Vocabulary to write a microprogram
Dynamic Microprogramming
- Computer system whose control unit is implemented with
a microprogram in WCS
- Microprogram can be changed by a systems programmer or a user
TERMINOLOGY
- In-line Sequencing
- Branch
- Conditional Branch
- Subroutine
- Loop
- Instruction OP-code mapping
MICROINSTRUCTION SEQUENCING
Instruction code
Mapping
logic
Incrementer
select a status
bit
Microoperations
Branch address
CONDITIONAL BRANCH
Load address
Control address register
Increment
MUX
Control memory
...
Status bits
(condition)
Next address
Conditional Branch
If Condition is true, then Branch (address from
the next address field of the current microinstruction)
else Fall Through
Conditions to Test: O(overflow), N(negative),
Z(zero), C(carry), etc.
Unconditional Branch
Fixing the value of one status bit at the input of the multiplexer to 1
Computer Organization Computer Architectures Lab
Microprogrammed Control 7 Sequencing
MAPPING OF INSTRUCTIONS
Direct Mapping Address
OP-codes of Instructions 0000 ADD Routine
0001 AND Routine
ADD 0000
. 0010 LDA Routine
AND 0001 . 0011 STA Routine
LDA 0010 . 0100 BUN Routine
STA 0011
BUN 0100 Control
Storage
Mapping
Bits 10 xxxx 010 Address
10 0000 010 ADD Routine
Machine OP-code
Instruction 1 0 1 1 Address
Mapping bits 0 x x x x 0 0
Microinstruction
address 0 1 0 1 1 0 0
Mapping memory
(ROM or PLA)
Control Memory
MICROPROGRAM EXAMPLE
Computer Configuration
MUX
10 0
AR
Address Memory
10 0 2048 x 16
PC
MUX
15 0
6 0 6 0 DR
SBR CAR
Microinstruction Format
3 3 3 2 2 7
F1 F2 F3 CD BR AD
F3 Microoperation Symbol
000 None NOP
001 AC ← AC ⊕ DR XOR
010 AC ← AC’ COM
011 AC ← shl AC SHL
100 AC ← shr AC SHR
101 PC ← PC + 1 INCPC
110 PC ← AR ARTPC
111 Reserved
BR Symbol Function
00 JMP CAR ← AD if condition = 1
CAR ← CAR + 1 if condition = 0
01 CALL CAR ← AD, SBR ← CAR + 1 if condition = 1
CAR ← CAR + 1 if condition = 0
10 RET CAR ← SBR (Return from subroutine)
11 MAP CAR(2-5) ← DR(11-14), CAR(0,1,6) ← 0
SYMBOLIC MICROINSTRUCTIONS
• Symbols are used in microinstructions as in assembly language
• A symbolic microprogram can be translated into its binary equivalent by
a microprogram assembler.
Sample Format
five fields: label; micro-ops; CD; BR; AD
SYMBOLIC MICROPROGRAM
• Control Storage: 128 20-bit words
• The first 64 words: Routines for the 16 machine instructions
• The last 64 words: Used for other purpose (e.g., fetch routine and other subroutines)
• Mapping: OP-code XXXX into 0XXXX00, the first address for the 16 routines are
0(0 0000 00), 4(0 0001 00), 8, 12, 16, 20, ..., 60
ORG 4
BRANCH: NOP S JMP OVER
NOP U JMP FETCH
OVER: NOP I CALL INDRCT
ARTPC U JMP FETCH
ORG 8
STORE: NOP I CALL INDRCT
ACTDR U JMP NEXT
WRITE U JMP FETCH
ORG 12
EXCHANGE: NOP I CALL INDRCT
READ U JMP NEXT
ACTDR, DRTAC U JMP NEXT
WRITE U JMP FETCH
ORG 64
FETCH: PCTAR U JMP NEXT
READ, INCPC U JMP NEXT
DRTAR U MAP
INDRCT: READ U JMP NEXT
DRTAR U RET
BINARY MICROPROGRAM
Address Binary Microinstruction
Micro Routine Decimal Binary F1 F2 F3 CD BR AD
ADD 0 0000000 000 000 000 01 01 1000011
1 0000001 000 100 000 00 00 0000010
2 0000010 001 000 000 00 00 1000000
3 0000011 000 000 000 00 00 1000000
microoperation fields
F1 F2 F3
AND
ADD AC
Arithmetic
logic and DR
DRTAC shift unit
PCTAR
DRTAR
From From
PC DR(0-10) Load
AC
Select 0 1
Multiplexers
Load Clock
AR
Clock CAR
Control Storage
MUX-1 selects an address from one of four sources and routes it into a CAR
Input Logic
I0I1T Meaning Source of Address S1S0 L
S0 = I0
S1 = I0I1 + I0’T
L = I0’I1T
MICROPROGRAM SEQUENCER
External
(MAP)
L
I0 3 2 1 0
Input Load
I1 S1 MUX1 SBR
logic
T S0
1 Incrementer
I MUX2 Test
S
Z Select
Clock CAR
Control memory
Microops CD BR AD
... ...
MICROINSTRUCTION FORMAT
Information in a Microinstruction
- Control Information
- Sequencing Information
- Constant
Information which is useful when feeding into the system
Field Encoding
Field A Field B
Field A Field B
2 bits 6 bits
2 bits 3 bits
2x4 6 x 64
2x4 3x8 Decoder Decoder
Decoder Decoder
Decoder and
1 of 4 1 of 8 selection logic
Two-level microprogram
First level
-Vertical format Microprogram
Second level
-Horizontal format Nanoprogram
- Interprets the microinstruction fields, thus converts a vertical
microinstruction format into a horizontal
nanoinstruction format.
11 bits
Control memory
2048 x 8
Microinstruction (8 bits)
Nanomemory address
Nanomemory
256 x 200