PM+CS Summit 2021 Speakers

Stephen Bates, CTO, Eideticom

Stephen Bates is CTO at Eideticom, a developer of leading edge storage, compute, and applications for programmable platforms in the cloud or at the network edge. He focuses on applying emerging technologies such as NVMe, RDMA, new non-volatile memories, and advanced programmable logic to create complex storage and communications systems. He has combined several such technologies to implement computational storage that offers performance well above today’s production systems. He is also an active contributor to the Linux kernel. Before joining Eideticom, he worked in the CTO office at PMC-Sierra and was a professor of computer engineering at the University of Alberta. He holds a PhD in signal processing from the University of Edinburgh, Scotland. He has given presentations at Storage Developer Conference and at past Flash Memory Summits.

Eduardo Berrocal, Sr. Software Engineer, Intel Corporation

Eduardo Berrocal joined Intel Corporation as a cloud software engineer in 2017 after receiving his PhD in computer science from the Illinois Institute of Technology. His doctoral research focused on data analytics and fault tolerance for high-performance computing. Past experience includes working as an intern at Bell Labs (Nokia), a research aid at Argonne National Laboratory, a scientific programmer and web developer at the University of Chicago, and an intern in the CESVIMA laboratory in Spain. He is a contributor to the SNIA Solid State Storage Technical Work Group. 

Tom Coughlin, President, Coughlin Associates

Tom Coughlin, President, Coughlin Associates is a digital storage analyst and business and technology consultant.  He has over 37 years in the data storage industry with engineering and management positions at several companies.  Coughlin Associates consults, publishes books and market and technology reports (including The Media and Entertainment Storage Report), and puts on digital storage-oriented events.  He is a regular storage and memory contributor for forbes.com and M&E organization websites.  He is an IEEE Fellow, President of IEEE-USA and is active with SNIA and SMPTE. For more information on Tom Coughlin and his publications and activities go to www.tomcoughlin.com

Dave Eggleston is the owner and Principal of Intuitive Cognition Consulting, and he provides strategy and business development services to leading NVM and Storage clients. Dave’s extensive background in Flash, MRAM, RRAM, and Storage is built on 30+ years of industry experience serving as VP of Embedded Memory at GLOBALFOUNDRIES, CEO of RRAM pioneer start-up Unity Semiconductor (acquired by Rambus), Director of Flash Systems Engineering at Micron, NVM Product Engineering manager at SanDisk, and NVM Engineer at AMD. Dave is frequently invited as a speaker at international conferences as an expert on emerging NVM technologies and their applications. He holds a BSEE degree from Duke University, a MSEE degree from Santa Clara University, and 25+ NVM related granted patents.

Dr. Charles Fan, CEO and Founder, MemVerge

Charles Fan is co-founder and CEO of MemVerge. Prior to MemVerge, Charles was the CTO of Cheetah Mobile leading its global technology teams, and an SVP/GM at VMware, founding the storage business unit that developed the Virtual SAN product. Charles also worked at EMC and was the founder of the EMC China R&D Center. Charles joined EMC via the acquisition of Rainfinity, where he was a co-founder and CTO. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from the Cooper Union.

Jerome Gaysse, Sr. Technology and Market Analyst, Silinnov Consulting

Jerome Gaysse is senior technology and market analyst at Silinnov Consulting, a consultancy based on emerging data storage technologies. He also drives the Cloud services offering at SPIE ICS, a leading IT French company.He has strong technical expertise in IP, NVM, FPGAs, and ASICs for the data center market. He successfully worked with major corporate companies, startups, and research institutes in both Europe and the USA. He is a regular presenter at international conferences such as those sponsored by IEEE and SNIA, as well as past Flash Memory Summits. Jerome earned an MSEE from the National Institute of Applied Sciences (INSA) in Lyon (France) with a semiconductor specialty.

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com and http://www.TheSSDguy.com

MIke Heumann, Managing Director, G2M Communications

Mike Heumann is Managing Partner at G2M Communications, a market research firm focused on emerging technologies. He heads the development of research reports on NVMe, artificial intelligence, and machine learning.  He was previously VP  North American Sales for QLogic and VP Product Marketing and Alliances for Emulex. He has over 15 years experience in the storage industry with an emphasis on Fibre Channel and storage area networks. Mike earned an MS in Organizational and Industrial Psychology at Purdue University and a BSEE at the University of Wisconsin-Madison.

Jonathan Hinkle, Executive Director and Distinguished Researcher of System Architecture, Lenovo

Jonathan Hinkle is Executive Director and Distinguished Researcher of System Architecture at Lenovo, where he creates and helps foster adoption of new data center systems architectures and technologies. Jonathan is an industry leading technical expert in memory, storage devices, and data center systems architecture with over 20 years of experience. In the JEDEC standards organization, Jonathan serves on the Board of Directors, is Vice-Chair of Marketing, and chairs the Hybrid DIMM Task Group standardizing NVDIMMs. He also invented and drove first development of the EDSFF 1U Short (E1.S) NVMe drive, VLP DIMM, and the NVDIMM Persistent Memory. He has over 30 patents granted or pending.  He earned BS and MS degrees in Computer Engineering from North Carolina State University.

Shyam Iyer is the Chair for SDXI (Smart Data Acceleration Interface), a newly formed SNIA TWG, which aims to develop, extend and drive an extensible, virtualizable, forward-compatible, memory to memory data movement and acceleration interface standard. He is a Distinguished Engineer in Dell's Office of CTO for Servers with many years of experience researching, designing, developing, debugging, validating, leading and driving system and software solutions that have an industry wide impact.

MIchael Kagan, CTO, NVIDIA

Michael Kagan has been NVIDIA's chief technology officer since May 2020. He joined NVIDIA through the Mellanox acquisition. Michael was previously CTO of Mellanox, which he co-founded in April 1999. From 1983 until then, he held a number of architecture and design positions at Intel Corporation. There, Michael was architect of the i860XP vector processor, managed Pentium MMX design, and managed the architecture team of the Basic PC product group. He holds a B.S. in electrical engineering from the Technion Israel Institute of Technology.

Chun Liu, Chief Architect, Futurewei Technologies 

Chun Liu is Chief Architect at Futurewei Technologies, focusing on the persistent memory and storage software stack. His work includes the persistent layer abstraction and design for both persistent memory and storage devices, research and development of indexing engine and transaction engines optimized for persistent memory, many of which are implemented in Huawei’s current storage products.  Prior to joining Futurewei/Huawei in 2017, Chun worked on All Flash Arrays at Nimble Storage and Violin Memory, and microprocessor design in AMD. Chun received his PhD in Computer Science and Engineering from Pennsylvania State University, and MS and BS in CSE from Shanghai Jiao Tong University.

David McIntyre, Director, Product Planning and Business Enablement, Samsung Corporation

David McIntyre focuses on computational storage acceleration solutions development and strategic business enablement for cloud to edge applications including AI inference/video analytics, database processing and blockchain networks. He has held senior management positions with IBM, Samsung, Xilinx, Intel (formerly Altera) and at Silicon Valley startups.  He has consulted for institutional investors including Fidelity, Goldman Sachs and UBS. David is a frequent presenter and chairperson at the Flash Memory Summit and other technical conferences including SNIA.

Jason Molgaard, Co-Chair, SNIA Computational Storage Technical Work Group/Principal Storage Solutions Architect, Arm

Jason Molgaard is the Principal Storage Solutions Architect at Arm, where he works closely with the top storage suppliers globally to define leading-edge processor subsystems and overall system storage controller architectures.  He focuses on determining the best tradeoffs among performance, cost, and area.  An experienced ASIC/SoC design engineer, he has proven architecture, design, verification, and design leadership experience with an emphasis on developing enterprise storage and server ASICs, including microprocessor and microcontroller design and integration. Before joining Arm, Jason architected and designed HDD and SSD storage controllers for SanDisk, Fujitsu, and HP. Jason holds an MSEE and BSEE from the University of Colorado Boulder.

Keith Orsak, Master Technologist, Sustaining Storage Products, Hewlett Packard Enterprise

Keith Orsak is a Master Technologist, Sustaining Storage Products, at Hewlett Packard Enterprise.  He is a contributor to the SNIA Solid State Storage Technical Work Group.

Jim Pappas, SNIA Board of Directors; Director of Technology Initiatives, Intel Corporation

Jim Pappas is a member of the SNIA Board of Directors and the Director of Technology Initiatives at Intel. At Intel, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, and Solid State Storage. Jim has founded, or served on several organizations in these areas including: PCI Special Interest Group, InfiniBand Trade Association, Open Fabrics Alliance, The Green Grid, and several emerging initiatives in his newest focus area of Solid State Storage. Jim has 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at major industry events including the Intel Developer’s Forum (IDF), WinHEC, Storage Networking World, PC Strategy, Microprocessor Forum, Consumer Electronics Show, Server I/O and the Applied Computing Conference. He holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts.

Andy Rudoff, Member, CXL Consortium/Persistent Memory SW Architect, Intel Corporation

Andy Rudoff is a Senior Principal Engineer at Intel Corporation, focusing on Non-Volatile Memory programming. He is a contributor to the SNIA NVM Programming Technical Work Group. His more than 30 years industry experience includes design and development work in operating systems, file systems, networking, and fault management at companies large and small, including Sun Microsystems and VMware. Andy has taught various Operating Systems classes over the years and is a co-author of the popular UNIX Network Programming text book.

Arthur Sainio, Co-Chair, SNIA Persistent Memory & NVDIMM Special Interest Group/Director of Product Marketing, SMART Modular Technologies

Arthur Sainio is Co-Chair of the SNIA Persistent Memory and NVDIMM Special Interest Group, which accelerates the awareness and adoption of Persistent Memories and NVDIMMs for computing architectures. As a Director of Product Marketing at SMART Modular Technologies. Arthur has been driving new product launch and business development activities at SMART since 1998. Prior to Smart, Arthur worked as a product manager at Hitachi Semiconductor America. While there, his focus was on DRAM, SRAM and Flash technologies.  Arthur holds a MBA from San Francisco State University and a MS from Arizona State University.

Brad Settlemyer is a Senior Scientist in Los Alamos National Laboratory's HPC Design group. He received his Ph.D in computer engineering from Clemson University in 2009 with a research focus on the design of parallel file systems. Before coming to Los Alamos he spent 5 years at Oak Ridge National Laboratory performing research into high-performance storage systems. He currently leads the storage systems research efforts within Los Alamos' Ultrascale Research Center and his team is responsible for designing and deploying state of the art storage systems for enabling scientific discovery. He is the primary investigator on projects ranging from ephemeral file system design to archival storage systems using molecular information technology and he has published papers on emerging storage systems, long distance data movement, system modeling, and storage system algorithms. His team’s work has been featured in national media, in 2019 his team won an R&D100 award for their work on DeltaFS, and in 2020 their work on computational storage was recognized with a Government Innovation Award for innovation within the public sector.

 Scott Shadley, Co-Chair, SNIA Computational Storage Technical Work Group/VP Marketing, NGD Systems

Scott Shadley is VP Marketing at NGD Systems where he leads marketing, product management, and product development for the company’s industry-leading computational storage. He has been a key figure in promoting computational storage, being co-chair of the SNIA Technical Working Group on the subject which he helped found, and speaking on the subject at Open Compute Summit, Flash Memory Summit, NVMe Developer Days, and many other events, press interviews, blogs, and webinars. Before joining NGD Systems, Scott managed the Product Marketing team at Micron, was the Business Line Manager for the SATA SSD portfolio, and was the Principal Technologist for the SSD and emerging memory portfolio. He launched four successful innovative SSDs for Micron and two for STEC, all of which were multimillion dollar sellers. Scott earned a BSEE in Device Physics from Boise State University and an MBA in marketing from University of Phoenix.

Eli Tiomkin, Chair, SNIA Computational Storage Special Interest Group/VP Business Development, NGD Systems

Eli Tiomkin chairs the SNIA Computational Storage Special Interest Group, a part of the CMSI, which evangelizes SNIA's technical work in computational storage, including developing white papers and webcasts, and speaking at SNIA and industry events. He is the VP of Business Development at NGD Systems, the leader in Computational Storage.  Prior to that, Eli was Director, Business Development at Western Digital (WD) and previously held executive positions at StorONE, Violin Memory (director of sales), STEC (director of OEM sales), and M-Systems (sales director). A dynamic, creative sales professional with extensive experience in the high-tech storage market, Tiomkin holds an MBA in International Business and Organizational Behavior and BS in Marketing, both from Oakland University, MI.

David Wang, Director, Memory Product Planning, Samsung Semiconductor, Inc.

 David Wang is a Director of Memory Product Planning at Samsung Semiconductor Inc. Currently, David is leading Samsung's efforts in next generation memory system interconnects – OMI, GenZ, and CXL. David is Samsung’s representative to the CXL consortium. Prior to joining Samsung in 2017, David was a Distinguished Engineer and Memory Systems Architect for Inphi Corporation, and before that, lead memory systems architect for MetaRAM. David has co-authored a book on memory systems titled “Memory Systems: Cache, DRAM, Disk”. David holds more than 80 patents issued by the USPTO. David received his PhD from the University of Maryland in 2005, his PhD thesis is on the topic of a high-performance, power-constrained, DRAM-command scheduling algorithm.