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ORCIDRouwaida Kanj
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2020 – today
- 2024
[j18]Jinane Bazzi
, Jana Sweidan, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
Variability-Aware Design of RRAM-Based Analog CAMs. IEEE Access 12: 55859-55873 (2024)- [c51]Jinane Bazzi, Rachid Jamil, Dana El Hajj, Rouwaida Kanj, Mohammed E. Fouda, Ahmed M. Eltawil:
Reconfigurable Precision SRAM-based Analog In-memory-compute Macro Design. ISCAS 2024: 1-5 - [c50]Rouwaida Kanj, Jamil Kawa:
A 5T Half-SRAM Design for Cold CMOS Physical Unclonable Function Applications and Beyond. ISQED 2024: 1-8 - [c49]Zeinab Soueidan, Rouwaida Kanj:
nvXNOR Design with Enhanced Store Capability for BNN Applications. ISQED 2024: 1-7 - 2023
- [j17]Nader Shafi, Joseph Costantine, Rouwaida Kanj, Youssef Tawk, Ali Ramadan, Mazen Kurban, Jihane Abou Rahal, Assaad A. Eid:
A Portable Non-Invasive Electromagnetic Lesion-Optimized Sensing Device for the Diagnosis of Skin Cancer (SkanMD). IEEE Trans. Biomed. Circuits Syst. 17(3): 558-573 (2023) - [j16]Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi:
A Best Balance Ratio Ordered Feature Selection Methodology for Robust and Fast Statistical Analysis of Memory Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 1742-1755 (2023) - [j15]Mariam Rakka, Mohammed E. Fouda, Rouwaida Kanj, Fadi J. Kurdahi:
DT2CAM: A Decision Tree to Content Addressable Memory Framework. IEEE Trans. Emerg. Top. Comput. 11(3): 805-810 (2023) - [c48]Hadi Noureddine, Omar Bekdache, Mohamad Al Tawil, Rouwaida Kanj, Ali Chehab, Mohammed E. Fouda, Ahmed M. Eltawil:
High-Density FeFET-based CAM Cell Design Via Multi-Dimensional Encoding. ACM Great Lakes Symposium on VLSI 2023: 403-407 - [c47]Jinane Bazzi, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
Hardware Acceleration of DNA Pattern Matching with Binary Memristors. ISCAS 2023: 1-5 - [c46]Omar Bekdache, Hadi Noureddine, Mohamad Al Tawil, Rouwaida Kanj, Mohamed E. Fouda, Ahmed M. Eltawil:
Scalable Complementary FeFET CAM Design. ISCAS 2023: 1-5 - [c45]Walaa Amer, Mariam Rakka, Rachid Karami, Minjun Seo, Mazen A. R. Saghir, Rouwaida Kanj, Fadi J. Kurdahi:
Hardware Implementation and Evaluation of an Information Processing Factory. VLSI-SoC 2023: 1-6 - [i6]Mohamad Fakih, Rouwaida Kanj, Fadi J. Kurdahi, Mohammed E. Fouda:
AudioFool: Fast, Universal and synchronization-free Cross-Domain Attack on Speech Recognition. CoRR abs/2309.11462 (2023) - 2022
- [j14]Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi, Ali Chehab:
Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5722-5726 (2022) - [c44]Aya Mouallem, Hussein Fadlallah, Lina Bacha, Dana El Hajj, Rachid Jamil, Dana Bazazo, Rouwaida Kanj:
1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks. ISCAS 2022: 1561-1565 - [i5]Jinane Bazzi, Jana Sweidan, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
Efficient Analog CAM Design. CoRR abs/2203.02500 (2022) - [i4]Mariam Rakka, Mohammed E. Fouda, Rouwaida Kanj, Fadi J. Kurdahi:
DT2CAM: A Decision Tree to Content Addressable Memory Framework. CoRR abs/2204.06114 (2022) - [i3]Jinane Bazzi, Jana Sweidan, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
DNA Pattern Matching Acceleration with Analog Resistive CAM. CoRR abs/2205.15505 (2022) - 2021
- [j13]Mariam Rakka, Mohamed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil, Fadi J. Kurdahi:
Design Exploration of Sensing Techniques in 2T-2R Resistive Ternary CAMs. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 762-766 (2021) - [j12]Hassan N. Noura, Reem Melki, Rouwaida Kanj, Ali Chehab:
Secure MIMO D2D communication based on a lightweight and robust PLS cipher scheme. Wirel. Networks 27(1): 557-574 (2021) - [c43]Mariam Rakka, Rouwaida Kanj:
Importance Splitting Sample Point Reuse for Efficient Memory Yield Estimation. ISCAS 2021: 1-5 - [i2]Ali Shaib, Mohamad H. Naim, Mohammed E. Fouda, Rouwaida Kanj, Fadi J. Kurdahi:
Efficient Noise Mitigation Technique for Quantum Computing. CoRR abs/2109.05136 (2021) - [i1]Mira Hout, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
In-memory Multi-valued Associative Processor. CoRR abs/2110.09643 (2021) - 2020
- [c42]Jinane Bazzi, Mohammed E. Fouda, Rouwaida Kanj, Ahmed M. Eltawil:
Threshold Switch Modeling for Analog CAM Design. ICM 2020: 1-4 - [c41]Mariam Rakka, Rouwaida Kanj, Ragheb Raad:
Hybrid Importance Splitting Importance Sampling Methodology for Fast Yield Analysis of Memory Designs. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j11]Maya H. Safieddine, Fadi A. Zaraket, Rouwaida Kanj, Ali S. Elzein, Wolfgang Roesner:
Verification at RTL Using Separation of Design Concerns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1529-1542 (2019) - [c40]Zainab Swaidan, Rouwaida Kanj, Johnny El Hajj, Edward Saad, Fadi J. Kurdahi:
RRAM Endurance and Retention: Challenges, Opportunities and Implications on Reliable Design. ICECS 2019: 402-405 - [c39]Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi:
Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs. ISCAS 2019: 1-5 - 2018
- [j10]Vahe Seferian, Rouwaida Kanj, Ali Chehab, Ayman I. Kayssi:
Identity Based Key Distribution Framework for Link Layer Security of AMI Networks. IEEE Trans. Smart Grid 9(4): 3166-3179 (2018) - [j9]Maria Malik, Rajiv V. Joshi, Rouwaida Kanj, Shupeng Sun, Houman Homayoun, Tong Li:
Sparse Regression Driven Mixture Importance Sampling for Memory Design. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 63-72 (2018) - [c38]Jean Abou Rahal, Bassel Maamari, Basma Hajri, Rouwaida Kanj, Mohammad M. Mansour, Ali Chehab:
Low power GDI ALU design with mixed logic adder functionality. ICICDT 2018: 9-12 - [c37]Anthony Mattar El Raachini, Hussein Alawieh, Adam Issa, Zainab Swaidan, Rouwaida Kanj, Ali Chehab, Mazen A. R. Saghir:
Double error cellular automata-based error correction with skip-mode compact syndrome coding for resilient PUF design. ISQED 2018: 413-418 - 2017
- [c36]Adam Issa, Rouwaida Kanj, Ali Chehab, Rajiv V. Joshi:
Yield and energy tradeoffs of an NVLatch design using radial sampling. ICICDT 2017: 1-4 - [c35]Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi, Maria Malik, Ali Chehab:
Regularized logistic regression for fast importance sampling based SRAM yield analysis. ISQED 2017: 119-124 - 2016
- [j8]Fa Wang, Paolo Cachecho, Wangyang Zhang, Shupeng Sun, Xin Li, Rouwaida Kanj, Chenjie Gu:
Bayesian Model Fusion: Large-Scale Performance Modeling of Analog and Mixed-Signal Circuits by Reusing Early-Stage Data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(8): 1255-1268 (2016) - [j7]Rajiv V. Joshi, Sudesh Saroop, Rouwaida Kanj, Yang Liu, Weike Wang, Carl Radens, Yue Tan, Karthik Yogendra:
A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 968-978 (2016) - [c34]Mohamed Baker Alawieh, Fa Wang, Rouwaida Kanj, Xin Li, Rajiv V. Joshi:
Efficient analog circuit optimization using sparse regression and error margining. ISQED 2016: 410-415 - [c33]Maya H. Safieddine, Fadi A. Zaraket, Mohamad Jaber, Rouwaida Kanj, Mazen A. R. Saghir:
Automated FPGA implementations of BIP designs. SIES 2016: 165-170 - 2015
- [j6]Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj, Ajay N. Bhoj, Matthew M. Ziegler, Phil Oldiges, Pranita Kerber, Robert Wong, Terence Hook, Sudesh Saroop, Carl Radens, Chun-Chen Yeh:
Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 534-543 (2015) - [j5]Rajiv V. Joshi, Rouwaida Kanj:
Corrections to "Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction". IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1380 (2015) - [c32]Maya H. Safieddine, Rouwaida Kanj, Fadi A. Zaraket, Ali S. Elzein, Mohamad Jaber:
Separation of concerns for hardware components of embedded systems in BIP. ISQED 2015: 337-344 - 2014
- [c31]Gerard Touma, Rouwaida Kanj, Rajiv V. Joshi, Ayman I. Kayssi, Ali Chehab:
Robust bias temperature instability refresh design and methodology for memory cell recovery. ICICDT 2014: 1-4 - [c30]Sabine Francis, Rouwaida Kanj, Rajiv V. Joshi, Ayman I. Kayssi, Ali Chehab:
Statistical methodology for modeling non-IID memory fails events. ISQED 2014: 205-211 - [c29]Keunwoo Kim, Rouwaida Kanj, Rajiv V. Joshi:
Impact of FinFET technology for power gating in nano-scale design. ISQED 2014: 543-547 - [c28]Vahe Seferian, Rouwaida Kanj, Ali Chehab, Ayman I. Kayssi:
PUF and ID-based key distribution security framework for advanced metering infrastructures. SmartGridComm 2014: 933-938 - 2013
- [c27]Kim Baraka, Marc Ghobril, Sami Malek, Rouwaida Kanj, Ayman I. Kayssi:
Low Cost Arduino/Android-Based Energy-Efficient Home Automation System with Smart Task Scheduling. CICSyN 2013: 296-301 - [c26]Rajiv V. Joshi, Rouwaida Kanj, S. Butt, Emrah Acar, Dallas Lea, D. Sciacca:
Hardware-corroborated Variability-Aware SRAM Methodology. VLSI Design 2013: 344-349 - 2012
- [c25]Rouwaida Kanj, Rajiv V. Joshi, Zhuo Li, Jerry Hayes, Sani R. Nassif:
Yield estimation via multi-cones. DAC 2012: 1107-1112 - [c24]Peiyuan Wang, Wei Zhang, Rajiv V. Joshi, Rouwaida Kanj, Yiran Chen:
A thermal and process variation aware MTJ switching model and its applications in soft error analysis. ICCAD 2012: 720-727 - [c23]Rouwaida Kanj, Rajiv V. Joshi:
A novel sample reuse methodology for fast statistical simulations with applications to manufacturing variability. ISQED 2012: 672-678 - [c22]John Barth, Don Plass, Adis Vehabovic, Rajiv V. Joshi, Rouwaida Kanj, Steven Burns, Todd Weaver:
Isolated Preset Architecture for a 32nm SOI embedded DRAM macro. VLSIC 2012: 110-111 - 2011
- [j4]Rajiv V. Joshi, Rouwaida Kanj, Vinod Ramadurai:
A Novel Column-Decoupled 8T Cell for Low-Power Differential and Domino-Based SRAM Design. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 869-882 (2011) - [j3]Rouwaida Kanj, Rajiv V. Joshi, Sani R. Nassif:
The Impact of Statistical Leakage Models on Design Yield Estimation. VLSI Design 2011: 471903:1-471903:12 (2011) - [c21]Rajiv V. Joshi, Rouwaida Kanj, Peiyuan Wang, Hai Li:
Universal statistical cure for predicting memory loss. ICCAD 2011: 236-239 - [c20]Rouwaida Kanj, Tong Li, Rajiv V. Joshi, Kanak Agarwal, Ali Sadigh, David Winston, Sani R. Nassif:
Accelerated statistical simulation via on-demand Hermite spline interpolations. ICCAD 2011: 353-360 - 2010
- [j2]Rajiv V. Joshi, Rouwaida Kanj, Anthony Pelella, Arthur Tuminaro, Yuen H. Chan:
The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane. IEEE Des. Test Comput. 27(6): 36-45 (2010) - [c19]Rouwaida Kanj, Rajiv V. Joshi, Sani R. Nassif:
Statistical leakage modeling for accurate yield analysis: the CDF matching method and its alternatives. ISLPED 2010: 337-342 - [c18]Jeanne Bickford, Nazmul Habib, John Goss, Robert McMahon, Rajiv V. Joshi, Rouwaida Kanj:
Use of scalable Parametric Measurement Macro to improve semiconductor technology characterization and product test. ISQED 2010: 315-319 - [c17]Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj:
FinFET SRAM Design. VLSI Design 2010: 440-445
2000 – 2009
- 2009
- [c16]Rouwaida Kanj, Rajiv V. Joshi, Chad Adams, James D. Warnock, Sani R. Nassif:
An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects. ICCAD 2009: 497-504 - [c15]Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das:
Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636 - [c14]Rouwaida Kanj, Rajiv V. Joshi, Jente B. Kuang, J. Kim, Mesut Meterelliyoz, William R. Reohr, Sani R. Nassif, Kevin J. Nowka:
Statistical yield analysis of silicon-on-insulator embedded DRAM. ISQED 2009: 190-194 - [c13]Nancy Ying Zhou, Rouwaida Kanj, Kanak Agarwal, Zhuo Li, Rajiv V. Joshi, Sani R. Nassif, Weiping Shi:
The impact of BEOL lithography effects on the SRAM cell performance and yield. ISQED 2009: 607-612 - 2008
- [c12]Rouwaida Kanj, Rajiv V. Joshi, Zhuo Li, Jente B. Kuang, Hung C. Ngo, Nancy Ying Zhou, Weiping Shi, Sani R. Nassif:
SRAM methodology for yield and power efficiency: per-element selectable supplies and memory reconfiguration schemes. ISLPED 2008: 87-92 - [c11]Rouwaida Kanj, Rajiv V. Joshi, Keunwoo Kim, Richard Williams, Sani R. Nassif:
Statistical Evaluation of Split Gate Opportunities for Improved 8T/6T Column-Decoupled SRAM Cell Yield. ISQED 2008: 702-707 - [c10]Rouwaida Kanj, Zhuo Li, Rajiv V. Joshi, Frank Liu, Sani R. Nassif:
A Root-Finding Method for Assessing SRAM Stability. ISQED 2008: 804-809 - 2007
- [c9]Vinod Ramadurai, Rajiv V. Joshi, Rouwaida Kanj:
A Disturb Decoupled Column Select 8T SRAM Cell. CICC 2007: 25-28 - [c8]Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang:
A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. ISLPED 2007: 8-13 - [c7]Rouwaida Kanj, Rajiv V. Joshi, Jayakumaran Sivagnaname, Jente B. Kuang, Dhruva Acharyya, Tuyet Nguyen, Chandler McDowell, Sani R. Nassif:
Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs. ISQED 2007: 33-40 - [c6]Amin Khajeh Djahromi, Ahmed M. Eltawil, Fadi J. Kurdahi, Rouwaida Kanj:
Cross Layer Error Exploitation for Aggressive Voltage Scaling. ISQED 2007: 192-197 - 2006
- [c5]Rouwaida Kanj, Rajiv V. Joshi, Sani R. Nassif:
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events. DAC 2006: 69-72 - [c4]Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park, Rouwaida Kanj, Sani R. Nassif:
System-Level SRAM Yield Enhancement. ISQED 2006: 179-184 - [c3]Praveen Elakkumanan, Jente B. Kuang, Kevin J. Nowka, Ramalingam Sridhar, Rouwaida Kanj, Sani R. Nassif:
SRAM Local Bit Line Access Failure Analyses. ISQED 2006: 204-209 - 2004
- [b1]Rouwaida Kanj:
SOI Circuit Design Styles and High-Level Circuit Modeling Techniques. University of Illinois Urbana-Champaign, USA, 2004 - [j1]Rouwaida Kanj, Elyse Rosenbaum:
Critical evaluation of SOI design guidelines. IEEE Trans. Very Large Scale Integr. Syst. 12(9): 885-894 (2004) - [c2]Rouwaida Kanj, Timothy Lehner, Bhavna Agrawal, Elyse Rosenbaum:
Noise characterization of static CMOS gates. DAC 2004: 888-893 - 2002
- [c1]Rouwaida Kanj, Elyse Rosenbaum:
A critical look at design guidelines for SOI logic gates. ISCAS (3) 2002: 261-264
Coauthor Index
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last updated on 2024-10-07 21:22 CEST by the dblp team
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