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ORCIDJ. Greg Nash
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2010 – 2019
- 2014
[c12]J. Greg Nash:
High-throughput programmable systolic array FFT architecture and FPGA implementations. ICNC 2014: 878-884
2000 – 2009
- 2007
- [c11]J. Greg Nash:
A New Class of High Performance FFTs. ICASSP (2) 2007: 21-24 - [c10]J. Greg Nash:
A High Performance Scalable FFT. WCNC 2007: 2367-2372 - 2005
- [c9]J. Greg Nash:
Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs. FCCM 2005: 305-306 - 2002
- [c8]J. Greg Nash:
Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays. FCCM 2002: 299-300
1990 – 1999
- 1993
- [j5]Mary Mehrnoosh Eshaghian, J. Greg Nash, Muhammad E. Shaaban, David B. Shu:
Heterogeneous Algorithms for Image Understanding Architecture. Parallel Algorithms Appl. 1(4): 273-284 (1993) - 1991
- [c7]David B. Shu, J. Greg Nash, K. Kim:
Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks. IPPS 1991: 216-223 - 1990
- [c6]David B. Shu, J. Gregory Nash, Charles C. Weems:
A multiple-level heterogeneous architecture for image understanding. ASAP 1990: 615-627 - [c5]Charles C. Weems, Deepak Rana, Allen R. Hanson, Edward M. Riseman, David B. Shu, J. Gregory Nash:
An overview of architecture research for image understanding at the University of Massachusetts. ICPR (2) 1990: 379-384 - [c4]David B. Shu, J. Gregory Nash, Mary Mehrnoosh Eshaghian, K. Kim:
Straight-line detection on a gated-connection VLSI network. ICPR (2) 1990: 456-461 - [c3]David B. Shu, J. Gregory Nash, Charles C. Weems:
A multiple-level heterogeneous architecture for image understanding. ICPR (2) 1990: 629-634
1980 – 1989
- 1989
- [j4]Charles C. Weems, Steven P. Levitan, Allen R. Hanson, Edward M. Riseman, David B. Shu, J. Gregory Nash:
The image understanding architecture. Int. J. Comput. Vis. 2(3): 251-282 (1989) - [j3]K. Wojtek Przytula, J. Greg Nash:
Parallel implementation of synthetic aperture radar algorithms. J. VLSI Signal Process. 1(1): 45-56 (1989) - 1988
- [j2]J. Greg Nash, Siegfried Hansen:
Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations. IEEE Trans. Computers 37(2): 129-137 (1988) - 1987
- [j1]J. Greg Nash, K. Wojtek Przytula, Siegfried Hansen:
The Systolic/Cellular System for Signal Processing. Computer 20(7): 96-97 (1987) - 1985
- [c2]J. Greg Nash, C. Petrozolin:
VLSI Implementation of a linear systolic array. ICASSP 1985: 1392-1395 - [c1]J. Greg Nash:
A systolic/cellular computer architecture for linear algebraic operations. ICRA 1985: 779-784
Coauthor Index
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