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2020 – today
- 2024
- [c67]Hanzhi Xun, Moritz Fieback, Sicong Yuan, Hassen Aziza, Mottaqiallah Taouil, Said Hamdioui:
Device-Aware Diagnosis for Yield Learning in RRAMs. DATE 2024: 1-6 - [c66]Hanzhi Xun, Moritz Fieback, Mohammad Amin Yaldagard, Sicong Yuan, Hassen Aziza, Mottaqiallah Taouil, Said Hamdioui:
Online Detection of Unique Faults in RRAMs. ETS 2024: 1-2 - [c65]Hassen Aziza, Jérémy Postel-Pellerin, Moritz Fieback, Said Hamdioui, Hanzhi Xun, Mottaqiallah Taouil, Karine Coulié, Wenceslas Rahajandraibe:
Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing. LATS 2024: 1-5 - 2023
- [j23]Karine Coulié, Hassen Aziza, Wenceslas Rahajandraibe:
Investigation of Single Event Effects in a Resistive RAM Memory Array by Coupling TCAD and SPICE Simulations. J. Electron. Test. 39(3): 275-288 (2023) - [c64]Hanzhi Xun, Moritz Fieback, Sicong Yuan, Hassen Aziza, Mathijs Heidekamp, Thiago Copetti, Letícia Maria Veiras Bolzani Poehls, Mottaqiallah Taouil, Said Hamdioui:
Characterization and Test of Intermittent Over RESET in RRAMs. ATS 2023: 1-6 - [c63]Wafa Zitouni, Rémy Vauché, Hassen Aziza, Laila Ayache, Alaa Makdissi:
Cortex-M0+-based Pacemaker: CMOS Technologies Benchmark to Achieve Ultra-Low Power Operations. DTTIS 2023: 1-5 - [c62]Hanzhi Xun, Sicong Yuan, Moritz Fieback, Hassen Aziza, Mottaqiallah Taouil, Said Hamdioui:
Device-Aware Test for Ion Depletion Defects in RRAMs. ITC 2023: 246-255 - [c61]Hassen Aziza, Cristian Zambelli, Said Hamdioui, Sumit Diware, Rajendra Bishnoi, Anteneh Gebregiorgis:
On the Reliability of RRAM-Based Neural Networks. VLSI-SoC 2023: 1-8 - 2022
- [j22]Moritz Fieback, Guilherme Cardoso Medeiros, Lizhou Wu, Hassen Aziza, Rajendra Bishnoi, Mottaqiallah Taouil, Said Hamdioui:
Defects, Fault Modeling, and Test Development Framework for RRAMs. ACM J. Emerg. Technol. Comput. Syst. 18(3): 52:1-52:26 (2022) - [c60]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Pascal Masson, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel:
A Schmitt trigger to benchmark the performance of a new zero-cost transistor. ICECS 2022 2022: 1-4 - [c59]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel:
Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor. ISCAS 2022: 761-764 - [c58]Hassen Aziza, Jérémy Postel-Pellerin, Hussein Bazzi, Mathieu Moreau, Adnan Harb:
STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability. ISCAS 2022: 3532-3536 - 2021
- [j21]Hussein Bazzi, Hassen Aziza, Mathieu Moreau, Adnan Harb:
Performances and Stability Analysis of a Novel 8T1R Non-Volatile SRAM (NVSRAM) versus Variability. J. Electron. Test. 37(4): 515-532 (2021) - [j20]Pablo Ilha Vaz, Patrick Girard, Arnaud Virazel, Hassen Aziza:
Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1122-1131 (2021) - [c57]Hassen Aziza, Said Hamdioui, Moritz Fieback, Mottaqiallah Taouil, Mathieu Moreau:
Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation. DATE 2021: 1877-1880 - [c56]Zoran Stamenkovic, Hassen Aziza, Ernesto Sánchez, Alberto Bosio:
Tutorial: Silicon Systems for Wireless LAN. DDECS 2021: 157-158 - [c55]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sébastien Haendler, Arnaud Régnier, Stephan Niel:
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology. DTIS 2021: 1-5 - [c54]Romeric Gay, Vincenzo Della Marca, Hassen Aziza, Arnaud Régnier, Stephan Niel, Abderrezak Marzaki:
Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology. DTIS 2021: 1-4 - [c53]Moritz Fieback, Guilherme Cardoso Medeiros, Anteneh Gebregiorgis, Hassen Aziza, Mottaqiallah Taouil, Said Hamdioui:
Intermittent Undefined State Fault in RRAMs. ETS 2021: 1-6 - [c52]Hassen Aziza, Karine Coulié, Wenceslas Rahajandraibe:
Design Considerations Towards Zero-Variability Resistive RAMs in HRS State. LATS 2021: 1-5 - [c51]Karine Coulié, Hassen Aziza, Wenceslas Rahajandraibe:
Investigation of Single Event Effects in a Resistive RAM memory array by SPICE level simulation. LATS 2021: 1-6 - 2020
- [j19]Hassen Aziza, Mathieu Moreau, Moritz Fieback, Mottaqiallah Taouil, Said Hamdioui:
An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs). IEEE Access 8: 137263-137274 (2020) - [c50]Hussein Bazzi, Jérémy Postel-Pellerin, Hassen Aziza, Mathieu Moreau, Adnan Harb:
Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation. DFT 2020: 1-4 - [c49]Basma Hajri, Mohammad M. Mansour, Ali Chehab, Hassen Aziza:
A Lightweight Reconfigurable RRAM-based PUF for Highly Secure Applications. DFT 2020: 1-4 - [c48]Hussein Bazzi, Hassen Aziza, Mathieu Moreau, Adnan Harb:
Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology. DTIS 2020: 1-6 - [c47]Pablo Ilha Vaz, Patrick Girard, Arnaud Virazel, Hassen Aziza:
A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications. IOLTS 2020: 1-6
2010 – 2019
- 2019
- [j18]Basma Hajri, Hassen Aziza, Mohammad M. Mansour, Ali Chehab:
RRAM Device Models: A Comparative Analysis With Experimental Validation. IEEE Access 7: 168963-168980 (2019) - [j17]Hassen Aziza, Christian Dufaza, Annie Pérez, Said Hamdioui:
Configurable Operational Amplifier Architectures Based on Oxide Resistive RAMs. J. Circuits Syst. Comput. 28(13): 1950216:1-1950216:14 (2019) - [c46]Hassen Aziza, Hussein Bazzi, Jérémy Postel-Pellerin, Pierre Canet, Mathieu Moreau, Adnan Harb:
An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits. DTIS 2019: 1-5 - [c45]Moritz Fieback, Lizhou Wu, Guilherme Cardoso Medeiros, Hassen Aziza, Siddharth Rao, Erik Jan Marinissen, Mottaqiallah Taouil, Said Hamdioui:
Device-Aware Test: A New Test Approach Towards DPPB Level. ITC 2019: 1-10 - [c44]Hassen Aziza, Mathieu Moreau, Annie Pérez, Arnaud Virazel, Patrick Girard:
A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks. NEWCAS 2019: 1-4 - [c43]Jérémy Postel-Pellerin, Hussein Bazzi, Hassen Aziza, Pierre Canet, Mathieu Moreau, Vincenzo Della Marca, Adnan Harb:
True random number generation exploiting SET voltage variability in resistive RAM memory arrays. NVMTS 2019: 1-5 - 2018
- [j16]Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard:
An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories. J. Low Power Electron. 14(1): 157-169 (2018) - [j15]Hassen Aziza, Basma Hajri, Mohammad M. Mansour, Ali Chehab, Annie Pérez:
A lightweight write-assist scheme for reduced RRAM variability and power. Microelectron. Reliab. 88-90: 6-10 (2018) - [c42]Hassen Aziza, Christian Dufaza, Annie Pérez:
A configurable operational amplifier based on oxide resistive RAMs. DTIS 2018: 1-2 - [c41]Hussein Bazzi, Adnan Harb, Hassen Aziza, Mathieu Moreau:
Novel RRAM CMOS Non-Volatile Memory Cells in 130nm Technology. ICCA 2018: 390-393 - [c40]Basma Hajri, Mohammad M. Mansour, Ali Chehab, Hassen Aziza:
Memristor models optimization for large-scale 1T1R memory arrays. ICICDT 2018: 109-112 - [c39]Hussein Bazzi, Adnan Harb, Hassen Aziza, Mathieu Moreau:
Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology. ICM 2018: 228-231 - [c38]Hassen Aziza, Karine Coulié, Wenceslas Rahajandraibe, Remy Vauche:
Using short-term fourier transform for particle detection and recognition in a CMOS oscillator-based chain. LATS 2018: 1-5 - [c37]Mathieu Moreau, Eloi Muhr, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Bastien Giraud, Jean-Philippe Noel:
Reliable ReRAM-based Logic Operations for Computing in Memory. VLSI-SoC 2018: 192-195 - 2017
- [j14]Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard:
A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps. J. Low Power Electron. 13(4): 595-604 (2017) - [c36]Basma Hajri, Mohammad M. Mansour, Ali Chehab, Hassen Aziza:
Oxide-based RRAM models for circuit designers: A comparative analysis. DTIS 2017: 1-6 - [c35]Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza:
An Ultra-Low Power and High Speed Single Ended Sense Amplifier for Non-Volatile Memories. NGCAS 2017: 209-212 - [c34]Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza:
Power efficiency optimization of charge pumps in embedded low voltage NOR flash memory. NORCAS 2017: 1-5 - [c33]Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza:
High voltage recycling scheme to improve power consumption of regulated charge pumps. PATMOS 2017: 1-5 - 2016
- [j13]Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal:
Optimization of a Particles Detection Chain Based on a VCO Structure. J. Electron. Test. 32(1): 21-30 (2016) - [j12]Pierre Canet, Jérémy Postel-Pellerin, Hassen Aziza:
Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories. Microelectron. Reliab. 64: 36-41 (2016) - [j11]Hassen Aziza, Jean-Michel Portal:
Resistive RAM variability monitoring using a ring oscillator based test chip. Microelectron. Reliab. 64: 59-62 (2016) - [c32]Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet:
Multilevel operation in oxide based resistive RAM with SET voltage modulation. DTIS 2016: 1-5 - 2015
- [j10]Loic Welter, J. L. Scotto di Quaquero, Philippe Dreux, Laurent Lopez, Hassen Aziza, Jean-Michel Portal:
Improvement of MOSFET matching characterization with calibrated multiplexed test structure. Microelectron. Reliab. 55(9-10): 1328-1333 (2015) - [c31]Karine Coulié-Castellani, Wenceslas Rahajandraibe, Hassen Aziza, Jean-Michel Portal, Gilles Micolau:
Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment. LATS 2015: 1-5 - [c30]Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver. LATS 2015: 1-4 - 2014
- [j9]Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Coulié-Castellani, Jean-Michel Portal:
Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation. J. Low Power Electron. 10(1): 173-181 (2014) - [j8]Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert:
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. 74(6): 2484-2496 (2014) - [j7]Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert:
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 443-454 (2014) - [c29]Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Jean-Michel Portal, Mathieu Moreau, Marc Bocquet:
Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability. DFT 2014: 81-85 - [c28]Loic Welter, Philippe Dreux, Jordan Innocenti, Hassen Aziza, Jean-Michel Portal:
Accurate multiplexed test structure for threshold voltage matching evaluation. DTIS 2014: 1-6 - [c27]Elena I. Vatajelu, Hassen Aziza, Cristian Zambelli:
Nonvolatile memories: Present and future challenges. IDT 2014: 61-66 - [c26]Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal:
An innovative standard cells remapping method for in-circuit critical parameters monitoring. IOLTS 2014: 206-209 - [c25]Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal:
Improvement of a VCO concept for low energy particule detection and recognition. LATW 2014: 1-4 - 2013
- [j6]Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Mathieu Moreau, Christophe Muller:
A novel test structure for OxRRAM process variability evaluation. Microelectron. Reliab. 53(9-11): 1208-1212 (2013) - [c24]Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal, Jamel Nebhen, Hervé Barthélemy:
Low-cost auto-calibration of passive polyphase filter in image reject receiver. ICECS 2013: 699-702 - [c23]Hassen Aziza, Marc Bocquet, Mathieu Moreau, Jean-Michel Portal:
Single-ended sense amplifier robustness evaluation for OxRRAM technology. IDT 2013: 1-5 - [c22]Loic Welter, Philippe Dreux, Jean-Michel Portal, Hassen Aziza:
Embedded high-precision frequency-based capacitor measurement system. IOLTS 2013: 116-121 - [c21]Karine Castellani-Coulié, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Wenceslas Rahajandraibe, Christophe Muller:
SPICE level analysis of Single Event Effects in an OxRRAM cell. LATW 2013: 1-5 - [c20]Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver. LATW 2013: 1-4 - [c19]Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao:
Analytical study of complementary memristive synchronous logic gates. NANOARCH 2013: 70-75 - [c18]Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller:
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS 2013: 1-4 - [c17]Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
On the investigation of built-in tuning of RF receivers using on-chip polyphase filters. VTS 2013: 1-6 - 2012
- [j5]Karine Castellani-Coulié, Hassen Aziza, Gilles Micolau, Jean-Michel Portal:
Optimization of SEU Simulations for SRAM Cells Reliability under Radiation. J. Electron. Test. 28(3): 331-338 (2012) - [c16]Karine Castellani-Coulié, Hassen Aziza, Wenceslas Rahajandraibe, Gilles Micolau, Jean-Michel Portal:
Investigation of a CMOS oscillator concept for particle detection and diagnosis. LATW 2012: 1-5 - [c15]Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring. LATW 2012: 1-5 - [c14]Gilles Micolau, Karine Castellani-Coulié, Hassen Aziza, Jean-Michel Portal:
SITARe: A simulation tool for analysis and diagnosis of radiation effects. LATW 2012: 1-5 - [c13]Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller:
Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH 2012: 85-92 - 2011
- [j4]Fabrice Rigaud, Jean-Michel Portal, Hassen Aziza, Didier Née, Julien Vast, Fabrice Argoud, Bertrand Borot:
Back-end soft and hard defect monitoring using a single test chip. Microelectron. Reliab. 51(6): 1136-1141 (2011) - [j3]Y. Joly, Laurent Lopez, Jean-Michel Portal, Hassen Aziza, Jean-Luc Ogier, Y. Bert, Franck Julien, Pascal Fornara:
Matching degradation of threshold voltage and gate voltage of NMOSFET after Hot Carrier Injection stress. Microelectron. Reliab. 51(9-11): 1561-1563 (2011) - [c12]Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Christophe Muller:
Bipolar OxRRAM memory array reliability evaluation based on fault injection. IDT 2011: 78-81 - [c11]Y. Joly, L. Truphemus, Laurent Lopez, Jean-Michel Portal, Hassen Aziza, Franck Julien, Pascal Fornara:
Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area. ISCAS 2011: 2549-2552 - [c10]Karine Castellani-Coulié, Jean-Michel Portal, Gilles Micolau, Hassen Aziza:
Analysis of SEU parameters for the study of SRAM cells reliability under radiation. LATW 2011: 1-5 - [c9]Gilles Micolau, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Impact of SEU configurations on a SRAM cell response at circuit level. LATW 2011: 1-5 - 2010
- [c8]Remi Pulicani, Olivier Goducheau, Hubert Degoirat, Hassen Aziza, Annie Pérez, Emmanuel Bergeret:
Simulation of intrinsic bipolar transistor mechanisms for future capacitor-less eDRAM on bulk substrate. ICECS 2010: 966-969
2000 – 2009
- 2009
- [c7]Olivier Ginez, Jean-Michel Portal, Hassen Aziza:
An on-line testing scheme for repairing purposes in Flash memories. DDECS 2009: 120-123 - 2008
- [j2]Hassen Aziza, Emmanuel Bergeret, Jean-Michel Portal, Olivier Ginez:
A Novel Low Power Oriented Design Methodology for Analog Blocks. J. Low Power Electron. 4(1): 60-67 (2008) - [c6]Hassen Aziza, Emmanuel Bergeret, Annie Pérez:
A novel design methodology for current reference circuits. ICECS 2008: 238-241 - [c5]Olivier Ginez, Jean-Michel Portal, Hassen Aziza:
A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories. ITC 2008: 1-10 - 2007
- [c4]Hassen Aziza, Emmanuel Bergeret, Annie Pérez:
An Automated Design Methodology for Charge Pump Circuits. ICECS 2007: 214-217 - 2005
- [j1]Jean-Michel Portal, Hassen Aziza, Didier Née:
EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement. J. Electron. Test. 21(1): 33-42 (2005) - 2003
- [c3]Jean-Michel Portal, Hassen Aziza, Didier Née:
EEPROM Memory: Threshold Voltage Built In Self Diagnosis. ITC 2003: 23-28 - 2002
- [c2]Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née:
An Automated Methodology to Diagnose Geometric Defect in the EEPROM Cell. ITC 2002: 31-36 - [c1]Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née:
An Automated Design Methodology for EEPROM Cell (ADE). MTDT 2002: 137-142
Coauthor Index
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