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Zhao Zhang 0010
Person information
- affiliation: Iowa State University, Department of Electrical and Computer Engineering, Ames, IA, USA
- affiliation (PhD 2002): College of William and Mary, Department of Computer Science, Williamsburg, VA, USA
Other persons with the same name
- Zhao Zhang — disambiguation page
- Zhao Zhang 0001 — Hefei University of Technology, School of Computer Science and Information Engineering (School of Artificial Intelligence), China (and 2 more)
- Zhao Zhang 0002 — Zhejiang Normal University, College of Mathematics Physics and Information Engineering, Jinhua, China (and 1 more)
- Zhao Zhang 0003 — Northeastern University, School of Information Science and Engineering, Shenyang, China
- Zhao Zhang 0004 — Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China
- Zhao Zhang 0005 — Nanjing Forestry University, Department of Computer Science and Technology, China
- Zhao Zhang 0006 — Heriot-Watt University, Edinburgh, UK (and 1 more)
- Zhao Zhang 0007 — University of Texas at Austin, Texas Advanced Computing Center, Austin, TX, USA (and 2 more)
- Zhao Zhang 0008 — University of Illinois at Chicago, IL, USA
- Zhao Zhang 0009 — Guilin University of Electronic Technology, Guangxi Key Laboratory of Trusted Software, China (and 1 more)
- Zhao Zhang 0011 — Chinese Academy of Sciences, Institute of Computing Technology, Key Lab of Intelligent Information Processing, Beijing, China
- Zhao Zhang 0012 — University of Texas, Health Science Center, San Antonio, TX, USA (and 1 more)
- Zhao Zhang 0013 — Dalian University of Technology, Faculty of Vehicle Engineering and Mechanics, Department of Engineering Mechanics, China
- Zhao Zhang 0014 — Beihang University, School of Transportation Science and Engineering, Beijing, China (and 2 more)
- Zhao Zhang 0015 — Nanchang Hangkong University, School of Information Technology, China
- Zhao Zhang 0016 — North Dakota State University, Department of Agricultural and Biosystems Engineering, Fargo, ND, USA (and 1 more)
- Zhao Zhang 0017 — Tianjin University, School of Precision Instrument and Opto-electronics Engineering, China
- Zhao Zhang 0018 — Nankai University, College of Computer Science, TKLNDST, Tianjin, China (and 1 more)
- Zhao Zhang 0019 — Qilu University of Technology (Shandong Academy of Sciences), School of Electrical Engineering and Automation, Jinan, China
- Zhao Zhang 0020 — Nanjing University of Aeronautics and Astronautics, College of Automation Engineering, China
- Zhao Zhang 0021 — PLA Information Engineering University, Zhengzhou Information Science and Technology Institute, China
- Zhao Zhang 0022 — University of Lorraine, CNRS Loria, Nancy, France
- Zhao Zhang 0023 — Beijing University of Posts and Telecommunication, School of Electronic Engineering, China
- Zhao Zhang 0024 — Tsinghua University, Department of Automation, Beijing, China
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2020 – today
- 2021
- [c33]Yicheng Wang, Yang Liu, Peiyun Wu, Zhao Zhang:
Discreet-PARA: Rowhammer Defense with Low Cost and High Efficiency. ICCD 2021: 433-441
2010 – 2019
- 2015
- [c32]Yanan Cao, Long Chen, Zhao Zhang:
Memory design for selective error protection. ICCD 2015: 133-140 - [c31]Yanan Cao, Long Chen, Zhao Zhang:
Flexible memory: A novel main memory architecture with block-level memory compression. NAS 2015: 285-294 - 2014
- [j17]Sparsh Mittal, Zhao Zhang:
Encache: a Dynamic Profiling-Based Reconfiguration Technique for Improving Cache Energy Efficiency. J. Circuits Syst. Comput. 23(10) (2014) - [j16]Songqing Chen, Lei Liu, Xinyuan Wang, Xinwen Zhang, Zhao Zhang:
A Host-Based Approach for Unknown Fast-Spreading Worm Detection and Containment. ACM Trans. Auton. Adapt. Syst. 8(4): 21:1-21:18 (2014) - [j15]Kun Fang, Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Mini-Rank: A Power-EfficientDDRx DRAM Memory Architecture. IEEE Trans. Computers 63(6): 1500-1512 (2014) - [j14]Heng He, Ruixuan Li, Xinhua Dong, Zhao Zhang:
Secure, Efficient and Fine-Grained Data Access Control Mechanism for P2P Storage Cloud. IEEE Trans. Cloud Comput. 2(4): 471-484 (2014) - [j13]Vaibhav Sundriyal, Masha Sosonkina, Zhao Zhang:
Automatic runtime frequency-scaling system for energy savings in parallel applications. J. Supercomput. 68(2): 777-797 (2014) - [j12]Sparsh Mittal, Yanan Cao, Zhao Zhang:
MASTER: A Multicore Cache Energy-Saving Technique Using Dynamic Cache Reconfiguration. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1653-1665 (2014) - [c30]Long Chen, Zhao Zhang:
MemGuard: A low cost and energy efficient design to support and enhance memory system reliability. ISCA 2014: 49-60 - 2013
- [j11]Vaibhav Sundriyal, Masha Sosonkina, Zhao Zhang:
Achieving energy efficiency during collective communications. Concurr. Comput. Pract. Exp. 25(15): 2140-2156 (2013) - [j10]Vaibhav Sundriyal, Masha Sosonkina, Alexander Gaenko, Zhao Zhang:
Energy saving strategies for parallel applications with point-to-point communication phases. J. Parallel Distributed Comput. 73(8): 1157-1169 (2013) - [j9]Long Chen, Yanan Cao, Zhao Zhang:
E3CC: A memory error protection scheme with novel address mapping for subranked and low-power memories. ACM Trans. Archit. Code Optim. 10(4): 32:1-32:22 (2013) - [j8]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang:
Thermal Modeling and Management of DRAM Systems. IEEE Trans. Computers 62(10): 2069-2082 (2013) - [c29]Sparsh Mittal, Zhao Zhang, Jeffrey S. Vetter:
FlexiWay: A cache energy saving technique using fine-grained cache reconfiguration. ICCD 2013: 100-107 - [c28]Long Chen, Yanan Cao, Zhao Zhang:
Free ECC: An efficient error protection for compressed last-level caches. ICCD 2013: 278-285 - [c27]Sparsh Mittal, Zhao Zhang, Yanan Cao:
CASHIER: A Cache Energy Saving Technique for QoS Systems. VLSI Design 2013: 43-48 - 2012
- [c26]Sparsh Mittal, Zhao Zhang:
Palette: A Cache Leakage Energy Saving Technique for Green Computing. High Performance Computing Workshop (2) 2012: 46-61 - 2011
- [c25]Kun Fang, Long Chen, Zhao Zhang, Zhichun Zhu:
Memory Architecture for Integrating Emerging Memory Technologies. PACT 2011: 403-412 - 2010
- [j7]Songqing Chen, Shiping Chen, Xinyuan Wang, Zhao Zhang, Sushil Jajodia:
An Application-Level Data Transparent Authentication Scheme without Communication Overhead. IEEE Trans. Computers 59(7): 943-954 (2010) - [c24]Lakshminarasimhan Seshagiri, Meng-Shiou Wu, Masha Sosonkina, Zhao Zhang, Mark S. Gordon, Michael W. Schmidt:
Enhancing adaptive middleware for quantum chemistry applications with a database framework. IPDPS Workshops 2010: 1-8 - [p1]Lakshminarasimhan Seshagiri, Meng-Shiou Wu, Masha Sosonkina, Zhao Zhang:
Exploring Tuning Strategies for Quantum Chemistry Computations. Software Automatic Tuning, From Concepts to State-of-the-Art Results 2010: 193-208
2000 – 2009
- 2009
- [c23]Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan:
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning. PACT 2009: 246-257 - [c22]Yong-Joon Park, Zhao Zhang, Songqing Chen:
Run-Time Detection of Malwares via Dynamic Control-Flow Inspection. ASAP 2009: 223-226 - [c21]Lakshminarasimhan Seshagiri, Masha Sosonkina, Zhao Zhang:
Electronic Structure Calculations and Adaptation Scheme in Multi-core Computing Environments. ICCS (1) 2009: 3-12 - [c20]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices. ISCA 2009: 255-266 - [c19]Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan:
Enabling software management for multicore caches with a lightweight hardware support. SC 2009 - 2008
- [j6]Diane T. Rover, Ramon Mercado, Zhao Zhang, Mack C. Shelley, Daniel S. Helvick:
Reflections on Teaching and Learning in an Advanced Undergraduate Course in Embedded Systems. IEEE Trans. Educ. 51(3): 400-412 (2008) - [c18]Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan:
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems. HPCA 2008: 367-378 - [c17]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Memory Access Scheduling Schemes for Systems with Multi-Core Processors. ICPP 2008: 406-413 - [c16]Lei Liu, Songqing Chen, Guanhua Yan, Zhao Zhang:
BotTracer: Execution-Based Bot-Like Malware Detection. ISC 2008: 97-113 - [c15]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu:
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency. MICRO 2008: 210-221 - [c14]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang:
Software thermal management of dram memory for multicore systems. SIGMETRICS 2008: 337-348 - 2007
- [c13]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang:
Thermal modeling and management of DRAM memory systems. ISCA 2007: 312-322 - [c12]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David:
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. ISPASS 2007: 94-104 - 2006
- [c11]Tien N. Nguyen, Zhao Zhang:
Component-oriented version management for hardware software co-design. CASCON 2006: 357-360 - 2005
- [c10]Zhichun Zhu, Zhao Zhang:
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors. HPCA 2005: 213-224 - [c9]Wei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang:
Performance Characterization of Java Applications on SMT Processors. ISPASS 2005: 102-111 - [c8]Wei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang:
Towards Pairing Java Applications on SMT Processors. MASCOTS 2005: 7-14 - [c7]Meng-Shiou Wu, Ricky A. Kendall, Kyle Wright, Zhao Zhang:
Performance Modeling and Tuning Strategies of Mixed Mode Collective Communications. SC 2005: 45 - 2004
- [j5]Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
Design and Optimization of Large Size and Low Overhead Off-Chip Caches. IEEE Trans. Computers 53(7): 843-855 (2004) - [c6]Souvik Ray, Zhao Zhang:
An Efficient Anonymity Protocol for Grid Computing. GRID 2004: 200-207 - [c5]Souvik Ray, Zhao Zhang:
Heuristic-Based Scheduling to Maximize Throughput of Data-Intensive Grid Applications. IWDC 2004: 63-74 - 2002
- [c4]Zhichun Zhu, Zhao Zhang, Xiaodong Zhang:
Fine-Grain Priority Scheduling on Multi-Channel Memory Systems. HPCA 2002: 107-116 - 2001
- [j4]Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
Breaking Address Mapping Symmetry at Multi-levels of Memory Heirarchy to Reduce DRAM Row-buffer Conflicts. J. Instr. Level Parallelism 3 (2001) - [j3]Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
Cached DRAM for ILP Processor Memory Access Latency Reduction. IEEE Micro 21(4): 22-32 (2001) - [j2]Zhao Zhang, Xiaodong Zhang:
Fast Bit-Reversals on Uniprocessors and Shared-Memory Multiprocessors. SIAM J. Sci. Comput. 22(6): 2113-2134 (2001) - 2000
- [j1]Yong Yan, Xiaodong Zhang, Zhao Zhang:
Cacheminer: A Runtime Approach to Exploit Cache Locality on SMP. IEEE Trans. Parallel Distributed Syst. 11(4): 357-374 (2000) - [c3]Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
A permutation-based page interleaving scheme to reduce row-buffer conflicts and exploit data locality. MICRO 2000: 32-41
1990 – 1999
- 1999
- [c2]Zhao Zhang, Xiaodong Zhang:
Cache-Optimal Methods for Bit-Reversals. SC 1999: 26 - 1998
- [c1]Yong Yan, Xiaodong Zhang, Zhao Zhang:
A memory-layout oriented run-time technique for locality optimization. ICPP 1998: 189-197
Coauthor Index
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last updated on 2024-11-25 22:48 CET by the dblp team
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