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ORCIDS. Couet
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2020 – today
- 2024
[j1]Surendra Hemaram
, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Valerio Pica, Gouri Sankar Kar:
Soft and Hard Error-Correction Techniques in STT-MRAM. IEEE Des. Test 41(5): 65-82 (2024)- [c24]Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Gouri Sankar Kar:
Hard Error Correction in STT-MRAM. ASPDAC 2024: 752-757 - [c23]Sicong Yuan, Mohammad Amin Yaldagard, Hanzhi Xun, Moritz Fieback, Erik Jan Marinissen, Woojin Kim, Siddharth Rao, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui:
Design-for-Test for Intermittent Faults in STT-MRAMs. ETS 2024: 1-6 - [c22]W. Kim, V. Pica, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao:
A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays. IMW 2024: 1-4 - [c21]Taras Ravsher, Andrea Fantini, Kruti Trivedi, Nouredine Rassoul, Harold Dekkers, Attilio Belmonte, Jan Van Houdt, Valeri Afanas'ev, Kurt Wostyn, Sebastien Couet, Gouri Sankar Kar:
Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification. IMW 2024: 1-4 - [c20]Farrukh Yasin, A. Palomino, A. Kumar, V. Pica, Simon Van Beek, Giacomo Talmelli, V. D. Nguyen, Stefan Cosemans, D. Crotti, Kurt Wostyn, Gouri Sankar Kar, Sebastien Couet:
Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer. VLSI Technology and Circuits 2024: 1-2 - [i3]Christoph Adelmann, Florin Ciubotaru, Fanfan Meng, Sorin Cotofana, Sebastien Couet:
Spintronic logic: from transducers to logic gates and circuits. CoRR abs/2401.10007 (2024) - 2023
- [c19]Ahmed Aouichi, Sicong Yuan, Moritz Fieback, Siddharth Rao, Woojin Kim, Erik Jan Marinissen, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui:
Device Aware Diagnosis for Unique Defects in STT-MRAMs. ATS 2023: 1-6 - [c18]Sicong Yuan, Mottaqiallah Taouil, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Said Hamdioui:
Device-Aware Test for Back-Hopping Defects in STT-MRAMs. DATE 2023: 1-6 - [c17]M. Gupta, Siddharth Rao, Gouri Sankar Kar, S. Couet:
Magnetic Domain Wall Memory: A DTCO study for Memory Applications. ESSDERC 2023: 41-44 - [c16]Fernando García-Redondo, S. Rao, M. Gupta, Manu Perumkunnil, Y. Xiang, D. Abdi, Simon Van Beek, S. Couet, Marie Garcia Bardon:
STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes. ESSDERC 2023: 97-100 - [c15]Gaspard Hiblot, Taras Ravsher, Roger Loo, Bhuvaneshwari Yengula Venkata Ramana, Nathali Franchina-Vergel, Andrea Fantini, Shamin Houshmand Sharifi, Nina Bazzazian, Kurt Wostyn, Loris Angelo Labbate, Sebastien Couet, Gouri Sankar Kar:
NPN Si/SiGe memory selector with non-linearity>105 and ON-current>6MA/cm2. ESSDERC 2023: 164-167 - [c14]Siddharth Rao, Kaiming Cai, Giacomo Talmelli, Nathali Franchina-Vergel, Ward Janssens, Hubert Hody, Farrukh Yasin, Kurt Wostyn, Sebastien Couet:
Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications. IMW 2023: 1-4 - [c13]Simon Van Beek, Kaiming Cai, Kaiquan Fan, Giacomo Talmelli, Anna Trovato, Nico Jossart, Siddharth Rao, Adrian Vaisman Chasin, Sebastien Couet:
MTJ degradation in multi-pillar SOT-MRAM with selective writing. IRPS 2023: 1-7 - [c12]Sicong Yuan, Ziwei Zhang, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui:
Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs. ITC 2023: 236-245 - 2022
- [c11]Simon Van Beek, Kaiming Cai, Siddharth Rao, Ganesh Jayakumar, Sebastien Couet, Nico Jossart, Adrian Vaisman Chasin, Gouri Sankar Kar:
MTJ degradation in SOT-MRAM by self-heating-induced diffusion. IRPS 2022: 4 - [c10]Taras Ravsher, Andrea Fantini, Adrian Vaisman Chasin, Shamin H. Sharifi, Hubert Hody, Harold Dekkers, Thomas Witters, Jan Van Houdt, Valeri Afanas'ev, Sebastien Couet, Gouri Sankar Kar:
Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors. IRPS 2022: 10-1 - [c9]Kaiming Cai, Simon Van Beek, Siddharth Rao, K. Fan, M. Gupta, V. D. Nguyen, Ganesh Jayakumar, Giacomo Talmelli, S. Couet, Gouri Sankar Kar:
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories. VLSI Technology and Circuits 2022: 375-376 - [i2]Fanfan Meng, Florin Ciubotaru, S.-Y. Lee, Odysseas Zografos, M. Gupta, V. D. Nguyen, Sebastien Couet, Gouri Sankar Kar, Giovanni De Micheli, Christoph Adelmann, I. Asselberghs:
Challenges and targets of MRAM-enabled scaled spintronic logic circuits. CoRR abs/2209.01999 (2022) - 2021
- [c8]Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar:
STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application. IMW 2021: 1-4 - [c7]Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar:
Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution. IRPS 2021: 1-5 - [c6]Iuliana P. Radu, Roy Li, Anton Potocnik, Tsvetan Ivanov, Danny Wan, Stefan Kubicek, Nard I. Dumoulin Stuyck, Jeroen Verjauw, Julien Jussot, Yann Canvel, Clement Godfrin, Massimo Mongillo, Rohith Acharya, Asser Elsayed, Mohamed Shehata, Xiaoyu Piao, Antoine Pacco, Laurent Souriau, Sebastien Couet, B. T. Chan, Jan Craninckx, Bertrand Parvais, Alexander Grill, Subramanian Narasimhamoorthy, Steven Van Winckel, Steven Brebels, Fahd A. Mohiyaddin, George Simion, Bogdan Govoreanu:
Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing. VLSI Circuits 2021: 1-2 - 2020
- [c5]Simon Van Beek, Barry J. O'Sullivan, Sebastien Couet, Davide Crotti, Dimitri Linten, Gouri Sankar Kar:
Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJs. IRPS 2020: 1-5
2010 – 2019
- 2019
- [c4]Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar:
Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing. ETS 2019: 1-6 - [c3]Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar:
Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM. VLSI Circuits 2019: 194- - 2018
- [c2]Barry J. O'Sullivan, Simon Van Beek, Philippe J. Roussel, Sidharth Rao, Wonsub Kim, S. Couet, Johan Swerts, Farrukh Yasin, Dimitri Crotti, Dimitri Linten, Gouri Sankar Kar:
Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown. IRPS 2018: 5-1 - [c1]Kevin Garello, Kevin Garello Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar:
SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories. VLSI Circuits 2018: 81-82 - [i1]Kevin Garello, Farrukh Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar:
SOT-MRAM 300mm integration for low power and ultrafast embedded memories. CoRR abs/1810.10356 (2018)
Coauthor Index
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