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2020 – today
- 2024
[j2]Dongrui Li, Ming Ming Wong, Yi Sheng Chong, Jun Zhou, Mohit Upadhyay, Ananta Narayanan Balaji, Aarthy Mani, Weng-Fai Wong, Li-Shiuan Peh, Anh Tuan Do, Bo Wang:
1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 2085-2092 (2024)- 2023
- [c15]Lu Lu, Aarthy Mani, Anh Tuan Do:
A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips. ISCAS 2023: 1-5 - [c14]Bo Wang, Ming Ming Wong, Dongrui Li, Yi Sheng Chong, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh, Aarthy Mani, Mohit Upadhyay, Ananta Narayanan Balaji, Anh Tuan Do:
1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing. ISCAS 2023: 1-5 - [c13]Seong-Beom Kim, Aarthy Mani, Leong Xu Heng Victor, Yuanjin Zheng, Anh Tuan Do:
Stability Analysis of 6T SRAM at Deep Cryogenic Temperature for Quantum Computing Applications. ISCAS 2023: 1-5 - [c12]Aarthy Mani, Chong Yi Sheng, Di Zhu, Rasna Maruthiyodan Veetil, Moitra Parikshit, Tobias Wilhelm W. Mass, Chong Ser Choong, Xuewu Xu
, Ramon José Paniagua Domínguez, Arseniy I. Kuznetsov, P. Krishna, P. Keyi, Kevin Tshun Chuan Chai, Anh Tuan Do:
1V, 1.13μm pixel pitch Liquid Crystal Driver with Charge-Balancing Scheme for SLM Applications. ISCAS 2023: 1-5 - [c11]Dongrui Li, Tomomasa Yamasaki, Aarthy Mani, Anh Tuan Do, Niangjun Chen, Bo Wang:
LAXOR: A Bit-Accurate BNN Accelerator with Latch-XOR Logic for Local Computing. ISLPED 2023: 1-6 - [c10]Aarthy Mani, Leong Xu Heng Victor, Anh Tuan Do:
Cryogenic Characterization of 40nm CMOS for Quantum Control Applications. ISOCC 2023: 3-4 - [c9]Chan Kuen Sim, Aarthy Mani, Anh Tuan Do:
0.85 mW, 8-bit, 1GS/s, 58dB SFDR Cryogenic DAC for Superconducting Qubit Control Applications. ISOCC 2023: 93-94 - 2022
- [c8]Z. Di, Aarthy Mani, Anh Tuan Do, A. Baranikov, R. M. Veetil, R. P. Domínguez, Arseniy I. Kuznetsov, Kevin T. C. Chai:
Linearity Characterization of Hybrid Driving Scheme for Spatial Light Modulator System. ISOCC 2022: 312-313 - 2021
- [j1]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3148-3152 (2021) - [c7]Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do:
A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSCIRC 2021: 95-98 - [c6]Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do:
A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSDERC 2021: 95-98 - 2020
- [c5]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC 2020: 1-4 - [c4]Aarthy Mani, Fei Li, Ming Ming Wong, Luo Tao, Liwei Yang, Vishnu Paramasivam, Anh Tuan Do:
Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM. ISCAS 2020: 1-4 - [c3]Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do:
Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c2]Fei Li, Ming Ming Wong, Aarthy Mani, Vishnu Paramasivam, Anh-Tuan Do:
0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications. A-SSCC 2019: 141-144 - [c1]Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do:
Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC 2019: 27-32
Coauthor Index
aka: Anh Tuan Do
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last updated on 2024-11-08 20:32 CET by the dblp team
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